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lmbench: use $(TARGET_MAKE_ENV) when calling $(MAKE)

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Signed-off-by: Gustavo Zacarias <gustavo.zacarias@free-electrons.com>
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
This commit is contained in:
Gustavo Zacarias 2016-10-13 19:13:43 -03:00 committed by Thomas Petazzoni
parent 4c1ba21a74
commit 168e3eb80d
1 changed files with 2 additions and 2 deletions
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4
package/lmbench/lmbench.mk
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@ -31,11 +31,11 @@ endef
# script. So the variables override below don't take direct effect in
# src/Makefile.
define LMBENCH_BUILD_CMDS
$(MAKE) CFLAGS="$(LMBENCH_CFLAGS)" LDLIBS="$(LMBENCH_LDLIBS)" OS=$(ARCH) CC="$(TARGET_CC)" -C $(@D)/src
$(TARGET_MAKE_ENV) $(MAKE) CFLAGS="$(LMBENCH_CFLAGS)" LDLIBS="$(LMBENCH_LDLIBS)" OS=$(ARCH) CC="$(TARGET_CC)" -C $(@D)/src
endef
define LMBENCH_INSTALL_TARGET_CMDS
$(MAKE) CFLAGS="$(TARGET_CFLAGS)" OS=$(ARCH) CC="$(TARGET_CC)" BASE=$(TARGET_DIR)/usr -C $(@D)/src install
$(TARGET_MAKE_ENV) $(MAKE) CFLAGS="$(TARGET_CFLAGS)" OS=$(ARCH) CC="$(TARGET_CC)" BASE=$(TARGET_DIR)/usr -C $(@D)/src install
endef
$(eval $(generic-package))