From 36b8c9494b56b877fea62f17926f747c7c7bfb8d Mon Sep 17 00:00:00 2001 From: Ben Hutchings Date: Tue, 14 Jun 2022 21:24:45 +0200 Subject: [PATCH] package/wolfssl: disable broken asm implementations on 32-bit Arm wolfSSL has ARMv8-A assembly implementations of some functions for both A64 and A32 ISAs. However, some of the A32 versions use r11, which is usually not allowed: wolfcrypt/src/port/arm/armv8-aes.c: In function 'wc_AesCbcEncrypt': wolfcrypt/src/port/arm/armv8-aes.c:3303:5: error: fp cannot be used in 'asm' here 3303 | } | ^ That can be fixed by adding the compiler flag -fomit-frame-pointer, but then there is another failure: /tmp/ccV19DQV.s: Assembler messages: /tmp/ccV19DQV.s:248: Error: first transfer register must be even -- `ldrd r11,r10,[r14,#4*14]' make[3]: *** [Makefile:5858: wolfcrypt/src/port/arm/src_libwolfssl_la-armv8-chacha.lo] Error 1 This is definitely not a valid instruction in A32, which suggests that this code isn't being tested at all upstream. So disable it here. Fixes: http://autobuild.buildroot.net/results/502/502a2b217845eb290c1961d4740b032462f8ae53/ Signed-off-by: Ben Hutchings Signed-off-by: Thomas Petazzoni --- package/wolfssl/wolfssl.mk | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/package/wolfssl/wolfssl.mk b/package/wolfssl/wolfssl.mk index cd3acd9411..f415e11bb5 100644 --- a/package/wolfssl/wolfssl.mk +++ b/package/wolfssl/wolfssl.mk @@ -33,14 +33,12 @@ WOLFSSL_CONF_OPTS += --disable-sslv3 endif # enable ARMv8 hardware acceleration -ifeq ($(BR2_ARM_CPU_ARMV8A),y) +ifeq ($(BR2_aarch64),y) WOLFSSL_CONF_OPTS += --enable-armasm # the flag -mstrict-align is needed to prevent build errors caused by # some inline assembly in parts of the AES structure using the "m" # constraint -ifeq ($(BR2_aarch64),y) WOLFSSL_CONF_ENV += CPPFLAGS="$(TARGET_CPPFLAGS) -mstrict-align" -endif else WOLFSSL_CONF_OPTS += --disable-armasm endif