target: add symbols for i386/x86_64 cpu features
Selecting the target subarchitecture variant automatically selects the appropriated set of features. [thomas.petazzoni@free-electrons.com: removed depends on inside hidden options, not needed. removed SSE41/SSE42 options, not used.] Signed-off-by: Samuel Martin <s.martin49@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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@ -322,6 +322,19 @@ endchoice
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# gcc builds libstdc++ differently depending on the
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# host tuplet given to it, so let people choose
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#
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# i386/x86_64 cpu features
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config BR2_X86_CPU_HAS_MMX
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bool
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config BR2_X86_CPU_HAS_SSE
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bool
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config BR2_X86_CPU_HAS_SSE2
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bool
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config BR2_X86_CPU_HAS_SSE3
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bool
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config BR2_X86_CPU_HAS_SSSE3
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bool
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choice
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prompt "Target Architecture Variant"
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depends on BR2_i386
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@ -341,46 +354,95 @@ config BR2_x86_pentiumpro
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bool "pentium pro"
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config BR2_x86_pentium_mmx
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bool "pentium MMX"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_pentium_m
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bool "pentium mobile"
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config BR2_x86_pentium2
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bool "pentium2"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_pentium3
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bool "pentium3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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config BR2_x86_pentium4
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bool "pentium4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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config BR2_x86_prescott
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bool "prescott"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_nocona
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bool "nocona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_core2
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bool "core2"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_atom
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bool "atom"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_k6
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bool "k6"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_k6_2
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bool "k6-2"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_athlon
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bool "athlon"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_athlon_4
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bool "athlon-4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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config BR2_x86_opteron
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bool "opteron"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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config BR2_x86_opteron_sse3
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bool "opteron w/ SSE3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_barcelona
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bool "barcelona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_geode
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bool "geode"
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# Don't include MMX support because there several variant of geode
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# processor, some with MMX support, some without.
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# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
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config BR2_x86_c3
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bool "Via/Cyrix C3 (Samuel/Ezra cores)"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_c32
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bool "Via C3-2 (Nehemiah cores)"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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config BR2_x86_winchip_c6
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bool "IDT Winchip C6"
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select BR2_X86_CPU_HAS_MMX
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config BR2_x86_winchip2
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bool "IDT Winchip 2"
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select BR2_X86_CPU_HAS_MMX
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endchoice
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choice
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@ -394,16 +456,42 @@ config BR2_x86_64_generic
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bool "generic"
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config BR2_x86_64_barcelona
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bool "barcelona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_3DNOW
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_64_opteron_sse3
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bool "opteron w/ sse3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_64_opteron
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bool "opteron"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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config BR2_x86_64_nocona
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bool "nocona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_64_core2
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bool "core2"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_64_atom
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bool "atom"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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endchoice
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choice
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