package/wolfssl: disable broken asm implementations on 32-bit Arm
wolfSSL has ARMv8-A assembly implementations of some functions for
both A64 and A32 ISAs. However, some of the A32 versions use r11,
which is usually not allowed:
wolfcrypt/src/port/arm/armv8-aes.c: In function 'wc_AesCbcEncrypt':
wolfcrypt/src/port/arm/armv8-aes.c:3303:5: error: fp cannot be used in 'asm' here
3303 | }
| ^
That can be fixed by adding the compiler flag -fomit-frame-pointer,
but then there is another failure:
/tmp/ccV19DQV.s: Assembler messages:
/tmp/ccV19DQV.s:248: Error: first transfer register must be even -- `ldrd r11,r10,[r14,#4*14]'
make[3]: *** [Makefile:5858: wolfcrypt/src/port/arm/src_libwolfssl_la-armv8-chacha.lo] Error 1
This is definitely not a valid instruction in A32, which suggests that
this code isn't being tested at all upstream. So disable it here.
Fixes:
http://autobuild.buildroot.net/results/502/502a2b217845eb290c1961d4740b032462f8ae53/
Signed-off-by: Ben Hutchings <ben.hutchings@mind.be>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
(cherry picked from commit 36b8c9494b
)
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2022.11.x
parent
1174407c5f
commit
aca885d9ef
|
@ -33,14 +33,12 @@ WOLFSSL_CONF_OPTS += --disable-sslv3
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endif
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# enable ARMv8 hardware acceleration
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ifeq ($(BR2_ARM_CPU_ARMV8A),y)
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ifeq ($(BR2_aarch64),y)
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WOLFSSL_CONF_OPTS += --enable-armasm
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# the flag -mstrict-align is needed to prevent build errors caused by
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# some inline assembly in parts of the AES structure using the "m"
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# constraint
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ifeq ($(BR2_aarch64),y)
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WOLFSSL_CONF_ENV += CPPFLAGS="$(TARGET_CPPFLAGS) -mstrict-align"
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endif
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else
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WOLFSSL_CONF_OPTS += --disable-armasm
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endif
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