Commit Graph

16 Commits (1bc82677b65c3b003a35230f50bdb7055ac5e985)

Author SHA1 Message Date
Luca Ceresoli cc2ce5996f configs/zynq_zed: uboot: bump to xilinx-v2018.2 (fixes build)
Bump to the most recent Xilinx release.

Fixes:
  .../output/host/include/libfdt_env.h:71:30: error: conflicting types for ‘fdt64_t’
  .../output/host/include/libfdt_env.h:91:24: error: expected ‘)’ before ‘x’
  .../output/host/include/libfdt.h:150:21: error: redefinition of ‘fdt_offset_ptr_w’
...and many, many other similar errors.

[Run-time tested]
Tested-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-09-06 21:30:47 +02:00
Luca Ceresoli 2ae0780ffe configs/zynq_zed: linux: bump to latest mainline kernel
The Zynq SoCs are now well supported in the mainline kernel, thus stop
using the Xilinx fork.

As there is not xilinx_zynq defconfig in mainline, use the default
arch config.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-04-09 21:21:16 +02:00
Yann E. MORIN 7e7b9db61a configs: switch to a wget download for kernels on github
The linux git trees on github can be huge, and takes a long time to
download, which is not very nice nor convenient for newcomers.

Switch them to using a wget, with the github macro.

A nice side effect of this conversion, is that we no longer need to wait
for the git clone to finish to notice that the ref is gone; doing a wget
will instantly fail in that case.

Mechanical patch, obtained by running (hang-on tight):

$ sed -r -i -e 's/BR2_LINUX_KERNEL_CUSTOM_GIT/BR2_LINUX_KERNEL_CUSTOM_TARBALL/; /BR2_LINUX_KERNEL_CUSTOM_REPO_URL/N; s:BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https\://github.com/([^/]+)/(.+)"\nBR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="(.+)":BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="$(call github,\1,\2,\3)/linux-\3.tar.gz":; s/(call github.*)\.git/\1/;' $(grep -l 'BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com' configs/*)

olimex_a20_olinuxino_lime_mali had a comment in between, so it was
manually fixed thereafter; that comment was also moved.

Except for socrates_cyclone5 which did not work previously (missing tag
in git tree?), all the affected defconfigs still download their sources.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2018-04-02 11:35:48 +02:00
Peter Korsgaard d54123d293 boards/zynq: use genimage to generate a bootable SD card image
[Run-time tested on ZedBoard, build-tested on the other boards]
[Peter: also add host-dosfstools / host-mtools to make vfat images]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2017-12-11 22:39:19 +01:00
Luca Ceresoli 6465e4d34a boards/zynq: rename the DTB to be loaded by U-Boot
We are about to introduce genimage support for the Zynq boards. For
all of them U-Boot loads the DTB from a file named "devicetree.dtb" so
we need to rename it on the SD card image.

We could use genimage itself to rename files while creating the
image. But this would require a different genimage.cfg for each board,
leading to duplicate code.

Instead let's create a "devicetree.dtb" symlink pointing to the dtb
listed in the configuration. Currently all the Zynq-based boards have
only one DTS configured, but if one had two or more of them, the
symlink would point to the first one.

[Peter: only create symlink if dtb option is available]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2017-12-11 22:35:12 +01:00
Luca Ceresoli e2b0be78f1 zynq_zed: u-boot: bump to xilinx-v2017.3
[Run-time tested]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2017-12-11 20:16:53 +01:00
Luca Ceresoli 5396292372 zynq_zed: linux: bump to xilinx-v2017.3 (based on 4.9)
[Run-time tested]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2017-12-11 20:16:12 +01:00
Luca Ceresoli a25dce8d5f zynq_zed: bump to U-Boot xilinx-v2017.1 (fix build)
The Zynq ZedBoard defconfig does not build anymore since commit
6cda724efb ("package/gcc: switch to gcc
6.x as the default"). Fix by upgrading to the latest U-Boot version,
xilinx-v2017.1, based on mainline v2017.01.

Fixes:
  In file included from include/linux/compiler.h:54:0,
                   from include/linux/bitops.h:5,
                   from ./include/common.h:20:
  include/linux/compiler-gcc.h:114:30: fatal error: linux/compiler-gcc6.h: No such file or directory
   #include gcc_header(__GNUC__)
                                ^
  compilation terminated.

[Build- and run-tested]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-06-15 22:02:19 +02:00
Thomas Petazzoni 59b9cc7a2d configs/zynq_*: add BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
The U-Boot configuration for Zynq boards have CONFIG_FIT_SIGNATURE=y,
so they need OpenSSL to be available on the host system. In order to
add OpenSSL to the build this commit adds the
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y to the relevant defconfigs.

Fixes #9316.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-10-20 23:31:14 +02:00
Peter Korsgaard b5f8c99aac configs/zynq_*_defconfig: enable VFP support
The A9 cores inside the Xilinx Zynq have a VFP unit, so enable it.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15 18:44:02 +02:00
Masahiro Yamada df5793e309 zynq: enable BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG
The recent U-Boot adopts Kconfig for its configuration system.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-08-29 23:29:37 +02:00
Masahiro Yamada 6dd5a33c48 zynq_zed: bump U-Boot to xilinx-v2016.2
This is the latest release tag in the Xilinx repository, based on
U-Boot v2016.01 in the mainline.

Commit 46d6a561be ("zedboard: Generate BOOT.BIN automatically")
switched from the Xilinx GitHub repository to the U-Boot mainline,
but this commit gets it back to the Xilinx GitHub repository for the
following reasons:

 - This defconfig still relies on the Xilinx's local repository for
   the kernel.  The vendor does the best test for the combination of
   U-Boot and the kernel with the same release tag (xilinx-v2016.2
   in this case).

 - At the time of commit 46d6a561be, the u-boot-xlnx still needed
   manual copy of ps7_init(_gpl).c/h in order to build a working SPL
   image.  So, the mainline U-Boot had advantage in that point of
   time.  However, the improvement in the mainline U-Boot was merged
   into the u-boot-xlnx at the xilinx-v2015.3 release.  Now, the
   mainline and the u-boot-xlnx are even in this point of view.

 - The mainline U-Boot defaults to boot FIT, so something must be
   done; either patch environments around with a local patch to
   switch to uImage booting (current solution), or build an FIT
   with a post build script (chromebook snow does this).  On the
   other hand, the Xilinx repository defaults to uImage booting,
   so it is straightforward, and needs no addition care.

This commit does:

 - Switch to the Xilinx custom git repository, and stick to the
   xilinx-v2016.2 tag.

 - Delete the local patch board/avnet/zedboard/uboot/0001...
   since the Xilinx custom repository can boot uImage by default.

 - Enable BR2_TARGET_UBOOT_FORMAT_IMG instead of ..._FORMAT_DTB_IMG
   since all the Zynq boards in U-Boot enable CONFIG_OF_EMBED.

 - Replace BR2_TARGET_UBOOT_ZYNQ_IMAGE with BR2_TARGET_UBOOT_SPL_NAME
   since U-Boot can natively generate the Zynq boot image now. The
   Zynq image support for mkimage tool was upstreamed at v2016.01
   (so xilinx-v2016.1 as well), so no additional tool is needed
   any more.

 - Update readme.txt

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-07-30 18:13:01 +02:00
Masahiro Yamada 291f8397cd zynq_zed: bump Linux to xilinx-v2016.2
This is the latest release tag in the Xilinx repository, based on
Linux v4.4 in the mainline.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Matt Weber <matthew.weber@rockwellcollins.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-07-30 18:10:54 +02:00
Paul Cercueil 9e5e2ea9bb configs: Use HTTPS URL for Github repos
This makes it possible to clone git repositories hosted on Github while
behind a firewall.

Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-07-05 17:36:01 +02:00
Masahiro Yamada 2277395172 configs: zynq: revive BR2_LINUX_KERNEL_UIMAGE
Commit 5c67cb1d04 ("linux: use zImage by default on ARM") changed
the default kernel image, but missed to update Zynq defconfigs.

U-Boot on Zynq boards still loads uImage, so BR2_LINUX_KERNEL_UIMAGE
should be defined to generate uImage.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-05-28 15:50:31 +02:00
Masahiro Yamada c13f896686 configs: rename Zynq defconfig files
These three are Zynq boards and the build procedure is almost the
same.  Having the SoC name prefix "zynq_" would be more consistent.
Also, this is the way in which the Linux Device Trees and the U-Boot
configuration files do.

This commit renames as follows:

   zedboard_defconfig     -> zynq_zed_defconfig
   microzed_defconfig     -> zynq_microzed_defconfig
   xilinx_zc706_defconfig -> zynq_zc706_defconfig

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-03-31 18:40:43 +02:00