stm32/flashbdev: Support internal filesystem on STM32F722/23/32/33.

pull/1/head
badlyby 2019-07-19 08:52:48 +08:00 committed by Damien George
parent 4d94fae833
commit 0da2f6f23a
2 changed files with 15 additions and 0 deletions

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@ -62,11 +62,19 @@ static const flash_layout_t flash_layout[] = {
// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7
#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR
#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx)
static const flash_layout_t flash_layout[] = {
{ 0x08000000, 0x04000, 4 },
{ 0x08010000, 0x10000, 1 },
{ 0x08020000, 0x20000, 3 },
};
#else
static const flash_layout_t flash_layout[] = {
{ 0x08000000, 0x08000, 4 },
{ 0x08020000, 0x20000, 1 },
{ 0x08040000, 0x40000, 3 },
};
#endif
#elif defined(STM32L0) || defined(STM32L4) || defined(STM32WB)

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@ -86,6 +86,13 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18
#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k)
#elif defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx)
#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
#elif defined(STM32F746xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.