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stmhal: Change SPI phase spec to 0,1 to match standard conventions. 

Was 1 or 2, now 0 or 1 (respectively).  0 means sample MISO on first
edge, 1 means sample on second edge.

Addresses issue #936.
native-del-fast
Damien George 2014-10-26 13:54:31 +00:00
parent de3c806965
commit 480a7ce58f
3 changed files with 11 additions and 10 deletions
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15
stmhal/spi.c
View File

@ -49,11 +49,12 @@
/// parameters to init the SPI bus:
///
/// from pyb import SPI
/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=1, crc=0x7)
/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
///
/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
/// 0 or 1, and is the level the idle clock line sits at. Phase can be 1 or 2
/// for number of edges. Crc can be None for no CRC, or a polynomial specifier.
/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
/// to sample data on the first or second clock edge respectively. Crc can be
/// None for no CRC, or a polynomial specifier.
///
/// Additional method for SPI:
///
@ -223,7 +224,7 @@ STATIC void pyb_spi_print(void (*print)(void *env, const char *fmt, ...), void *
} else {
print(env, "SPI(%u, SPI.SLAVE", spi_num);
}
print(env, ", polarity=%u, phase=%u, bits=%u", self->spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, self->spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 1 : 2, self->spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
print(env, ", polarity=%u, phase=%u, bits=%u", self->spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, self->spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, self->spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
if (self->spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) {
print(env, ", crc=0x%x", self->spi->Init.CRCPolynomial);
}
@ -231,7 +232,7 @@ STATIC void pyb_spi_print(void (*print)(void *env, const char *fmt, ...), void *
}
}
/// \method init(mode, baudrate=328125, *, polarity=1, phase=1, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
///
/// Initialise the SPI bus with the given parameters:
///
@ -241,7 +242,7 @@ STATIC const mp_arg_t pyb_spi_init_args[] = {
{ MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} },
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
{ MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} },
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
{ MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} },
@ -281,7 +282,7 @@ STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, mp_uint_t n_args,
else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; }
init->CLKPolarity = vals[2].u_int == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
init->CLKPhase = vals[3].u_int == 1 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
init->CLKPhase = vals[3].u_int == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
init->Direction = vals[4].u_int;
init->DataSize = (vals[5].u_int == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
init->NSS = vals[6].u_int;

4
tests/pyb/spi.py
View File

@ -5,10 +5,10 @@ print(spi)
spi = SPI(1, SPI.MASTER)
spi = SPI(1, SPI.MASTER, baudrate=500000)
spi = SPI(1, SPI.MASTER, 500000, polarity=1, phase=1, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
spi = SPI(1, SPI.MASTER, 500000, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
print(spi)
spi.init(SPI.SLAVE)
spi.init(SPI.SLAVE, phase=1)
print(spi)
spi.init(SPI.MASTER)

2
tests/pyb/spi.py.exp
View File

@ -1,5 +1,5 @@
SPI(1)
SPI(1, SPI.MASTER, baudrate=328125, polarity=1, phase=1, bits=8)
SPI(1, SPI.MASTER, baudrate=328125, polarity=1, phase=0, bits=8)
SPI(1, SPI.SLAVE, polarity=1, phase=1, bits=8)
b'\xff'
b'\xff'