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stmhal/boards: Update F76x alternate function table to add SDMMC2.

pull/1/head
Damien George 2017-03-30 17:57:18 +11:00
parent 7876e54aa5
commit 9818c0db43
1 changed files with 15 additions and 16 deletions
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31
stmhal/boards/stm32f767_af.csv
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@ -1,5 +1,5 @@
Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15
,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS
,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS,SDMMC2/ETH,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS
PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT
PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT
PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT
@ -19,27 +19,27 @@ PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMICE,CSPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,U
PortB,PB0,,TIM1_CH2N,TIM3_CH3T,IM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT
PortB,PB1,,TIM1_CH3N,TIM3_CH4T,IM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT
PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT
PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT
PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,SDMMC2_D2,,,,,EVENTOUT
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,SDMMC2_D3,,,,,EVENTOUT
PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT
PortB,PB6,,,TIM4_CH1,HDMICEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT
PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT
PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT
PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT
PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT
PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,SDMMC2_D5,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT
PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT
PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT
PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT
PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT
PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT
PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT
PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT
PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,SDMMC2_D7,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT
PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT
PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT
PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT
@ -54,8 +54,8 @@ PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT
PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT
PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT
PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT
PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT
PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,,FMC_NE1,,,EVENTOUT
PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT
PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT
PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT
PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT
PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT
@ -105,10 +105,10 @@ PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT
PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT
PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT
PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT
PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT
PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT
PortG,PG11,,,,,,,,SPDIFRX_IN0,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT
PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT
PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT
PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT
PortG,PG11,,,,,,,,SPDIFRX_IN0,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT
PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,SDMMC2_D3,FMC_NE4,,LCD_B1,EVENTOUT
PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT
PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT
PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT
@ -168,4 +168,3 @@ PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT
PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT
PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT
PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT

1 Port AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15
2 SYS TIM1/2 TIM3/4/5 TIM8/9/10/11/LPTIM1/CEC I2C1/2/3/4/CEC SPI1/2/3/4/5/6 SPI3/SAI1 SPI2/3/USART1/2/3/UART5/SPDIFRX SAI2/USART6/UART4/5/7/8/SPDIFRX CAN1/2/TIM12/13/14/QUADSPI/LCD SAI2/QUADSPI/OTG2_HS/OTG1_FS SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS ETH/OTG1_FS SDMMC2/ETH FMC/SDMMC1/OTG2_FS DCMI LCD SYS
3 PortA PA0 TIM2_CH1/TIM2_ETR TIM5_CH1 TIM8_ETR USART2_CTS UART4_TX SAI2_SD_B ETH_MII_CRS EVENTOUT
4 PortA PA1 TIM2_CH2 TIM5_CH2 USART2_RTS UART4_RX QUADSPI_BK1_IO3 SAI2_MCK_B ETH_MII_RX_CLK/ETH_RMII_REF_CLK LCD_R2 EVENTOUT
5 PortA PA2 TIM2_CH3 TIM5_CH3 TIM9_CH1 USART2_TX SAI2_SCK_B ETH_MDIO LCD_R1 EVENTOUT
19 PortB PB0 TIM1_CH2N TIM3_CH3T IM8_CH2N UART4_CTS LCD_R3 OTG_HS_ULPI_D1 ETH_MII_RXD2 EVENTOUT
20 PortB PB1 TIM1_CH3N TIM3_CH4T IM8_CH3N LCD_R6 OTG_HS_ULPI_D2 ETH_MII_RXD3 EVENTOUT
21 PortB PB2 SAI1_SD_A SPI3_MOSI/I2S3_SD QUADSPI_CLK EVENTOUT
22 PortB PB3 JTDO/TRACESWO TIM2_CH2 SPI1_SCK/I2S1_CK SPI3_SCK/I2S3_CK SDMMC2_D2 EVENTOUT
23 PortB PB4 NJTRST TIM3_CH1 SPI1_MISO SPI3_MISO SPI2_NSS/I2S2_WS SDMMC2_D3 EVENTOUT
24 PortB PB5 TIM3_CH2 I2C1_SMBA SPI1_MOSI/I2S1_SD SPI3_MOSI/I2S3_SD CAN2_RX OTG_HS_ULPI_D7 ETH_PPS_OUT FMC_SDCKE1 DCMI_D10 EVENTOUT
25 PortB PB6 TIM4_CH1 HDMICEC I2C1_SCL USART1_TX CAN2_TX QUADSPI_BK1_NCS FMC_SDNE1 DCMI_D5 EVENTOUT
26 PortB PB7 TIM4_CH2 I2C1_SDA USART1_RX FMC_NL DCMI_VSYNC EVENTOUT
27 PortB PB8 TIM4_CH3 TIM10_CH1 I2C1_SCL CAN1_RX SDMMC2_D4 ETH_MII_TXD3 SDMMC1_D4 DCMI_D6 LCD_B6 EVENTOUT
28 PortB PB9 TIM4_CH4 TIM11_CH1 I2C1_SDA SPI2_NSS/I2S2_WS CAN1_TX SDMMC2_D5 SDMMC1_D5 DCMI_D7 LCD_B7 EVENTOUT
29 PortB PB10 TIM2_CH3 I2C2_SCL SPI2_SCK/I2S2_CK USART3_TX OTG_HS_ULPI_D3 ETH_MII_RX_ER LCD_G4 EVENTOUT
30 PortB PB11 TIM2_CH4 I2C2_SDA USART3_RX OTG_HS_ULPI_D4 ETH_MII_TX_EN/ETH_RMII_TX_EN LCD_G5 EVENTOUT
31 PortB PB12 TIM1_BKIN I2C2_SMBA SPI2_NSS/I2S2_WS USART3_CK CAN2_RX OTG_HS_ULPI_D5 ETH_MII_TXD0/ETH_RMII_TXD0 OTG_HS_ID EVENTOUT
32 PortB PB13 TIM1_CH1N SPI2_SCK/I2S2_CK USART3_CTS CAN2_TX OTG_HS_ULPI_D6 ETH_MII_TXD1/ETH_RMII_TXD1 EVENTOUT
33 PortB PB14 TIM1_CH2N TIM8_CH2N SPI2_MISO USART3_RTS TIM12_CH1 SDMMC2_D0 OTG_HS_DM EVENTOUT
34 PortB PB15 RTC_REFIN TIM1_CH3N TIM8_CH3N SPI2_MOSI/I2S2_SD TIM12_CH2 SDMMC2_D1 OTG_HS_DP EVENTOUT
35 PortC PC0 SAI2_FS_B OTG_HS_ULPI_STP FMC_SDNWE LCD_R5 EVENTOUT
36 PortC PC1 TRACED0 SPI2_MOSI/I2S2_SD SAI1_SD_A ETH_MDC EVENTOUT
37 PortC PC2 SPI2_MISO OTG_HS_ULPI_DIR ETH_MII_TXD2 FMC_SDNE0 EVENTOUT
38 PortC PC3 SPI2_MOSI/I2S2_SD OTG_HS_ULPI_NXT ETH_MII_TX_CLK FMC_SDCKE0 EVENTOUT
39 PortC PC4 I2S1_MCK SPDIFRX_IN2 ETH_MII_RXD0/ETH_RMII_RXD0 FMC_SDNE0 EVENTOUT
40 PortC PC5 SPDIFRX_IN3 ETH_MII_RXD1/ETH_RMII_RXD1 FMC_SDCKE0 EVENTOUT
41 PortC PC6 TIM3_CH1 TIM8_CH1 I2S2_MCK USART6_TX SDMMC2_D6 SDMMC1_D6 DCMI_D0 LCD_HSYNC EVENTOUT
42 PortC PC7 TIM3_CH2 TIM8_CH2 I2S3_MCK USART6_RX SDMMC2_D7 SDMMC1_D7 DCMI_D1 LCD_G6 EVENTOUT
43 PortC PC8 TRACED1 TIM3_CH3 TIM8_CH3 UART5_RTS USART6_CK SDMMC1_D0 DCMI_D2 EVENTOUT
44 PortC PC9 MCO2 TIM3_CH4 TIM8_CH4 I2C3_SDA I2S_CKIN UART5_CTS QUADSPI_BK1_IO0 SDMMC1_D1 DCMI_D3 EVENTOUT
45 PortC PC10 SPI3_SCK/I2S3_CK USART3_TX UART4_TX QUADSPI_BK1_IO1 SDMMC1_D2 DCMI_D8 LCD_R2 EVENTOUT
54 PortD PD3 SPI2_SCK/I2S2_CK USART2_CTS FMC_CLK DCMI_D5 LCD_G7 EVENTOUT
55 PortD PD4 USART2_RTS FMC_NOE EVENTOUT
56 PortD PD5 USART2_TX FMC_NWE EVENTOUT
57 PortD PD6 SPI3_MOSI/I2S3_SD SAI1_SD_A USART2_RX SDMMC2_CK FMC_NWAIT DCMI_D10 LCD_B2 EVENTOUT
58 PortD PD7 USART2_CK SPDIFRX_IN0 SDMMC2_CMD FMC_NE1 EVENTOUT
59 PortD PD8 USART3_TX SPDIFRX_IN1 FMC_D13 EVENTOUT
60 PortD PD9 USART3_RX FMC_D14 EVENTOUT
61 PortD PD10 USART3_CK FMC_D15 LCD_B3 EVENTOUT
105 PortG PG6 DCMI_D12 LCD_R7 EVENTOUT
106 PortG PG7 USART6_CK FMC_INT DCMI_D13 LCD_CLK EVENTOUT
107 PortG PG8 SPI6_NSS SPDIFRX_IN2 USART6_RTS ETH_PPS_OUT FMC_SDCLK EVENTOUT
108 PortG PG9 SPDIFRX_IN3 USART6_RX QUADSPI_BK2_IO2 SAI2_FS_B SDMMC2_D0 FMC_NE2/FMC_NCE DCMI_VSYNC EVENTOUT
109 PortG PG10 LCD_G3 SAI2_SD_B SDMMC2_D1 FMC_NE3 DCMI_D2 LCD_B2 EVENTOUT
110 PortG PG11 SPDIFRX_IN0 SDMMC2_D2 ETH_MII_TX_EN/ETH_RMII_TX_EN DCMI_D3 LCD_B3 EVENTOUT
111 PortG PG12 LPTIM1_IN1 SPI6_MISO SPDIFRX_IN1 USART6_RTS LCD_B4 SDMMC2_D3 FMC_NE4 LCD_B1 EVENTOUT
112 PortG PG13 TRACED0 LPTIM1_OUT SPI6_SCK USART6_CTS ETH_MII_TXD0/ETH_RMII_TXD0 FMC_A24 LCD_R0 EVENTOUT
113 PortG PG14 TRACED1 LPTIM1_ETR SPI6_MOSI USART6_TX QUADSPI_BK2_IO3 ETH_MII_TXD1/ETH_RMII_TXD1 FMC_A25 LCD_B0 EVENTOUT
114 PortG PG15 USART6_CTS FMC_SDNCAS DCMI_D13 EVENTOUT
168 PortK PK5 LCD_B6 EVENTOUT
169 PortK PK6 LCD_B7 EVENTOUT
170 PortK PK7 LCD_DE EVENTOUT