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stijn 25c4563f26 examples: Add example code for user C modules, both C and C++. 
Add working example code to provide a starting point for users with files
that they can just copy, and include the modules in the coverage test to
verify the complete user C module build functionality.  The cexample module
uses the code originally found in cmodules.rst, which has been updated to
reflect this and partially rewritten with more complete information.
 		2020-10-29 15:30:42 +11:00
..
bare-arm ports: Disable MICROPY_PY_ASSIGN_EXPR in bare-arm and minimal ports. 2020-06-16 22:06:21 +10:00
cc3200 ports: Add utime.gmtime() function. 2020-09-18 16:25:36 +10:00
esp32 esp32,unix: Support building C++ code. 2020-10-29 15:29:50 +11:00
esp8266 esp8266/mpconfigport.h: Seed the urandom module on import. 2020-10-29 14:12:44 +11:00
javascript all: Format code to add space after C++-style comment start. 2020-04-23 11:24:25 +10:00
mimxrt ports: Use correct in/out endpoint size in TUD_CDC_DESCRIPTOR. 2020-10-17 15:49:16 +11:00
minimal ports: Disable MICROPY_PY_ASSIGN_EXPR in bare-arm and minimal ports. 2020-06-16 22:06:21 +10:00
nrf ports: Use correct in/out endpoint size in TUD_CDC_DESCRIPTOR. 2020-10-17 15:49:16 +11:00
pic16bit all: Format code to add space after C++-style comment start. 2020-04-23 11:24:25 +10:00
powerpc powerpc/uart: Choose which UART to use at build time, not runtime. 2020-05-29 22:54:55 +10:00
qemu-arm qemu-arm/Makefile: Add CFLAGS_EXTRA to CFLAGS. 2020-06-22 13:42:24 +10:00
samd ports: Use correct in/out endpoint size in TUD_CDC_DESCRIPTOR. 2020-10-17 15:49:16 +11:00
stm32 stm32/rng: Use SysTick+RTC+unique-id to seed pRNG for MCUs without RNG. 2020-10-29 14:14:40 +11:00
teensy all: Update Python code to conform to latest black formatting. 2020-08-29 15:18:01 +10:00
unix examples: Add example code for user C modules, both C and C++. 2020-10-29 15:30:42 +11:00
windows unix,windows: Implement mp_hal_time_ns using gettimeofday. 2020-10-01 14:20:42 +10:00
zephyr ports: Support legacy soft I2C/SPI construction via id=-1 arg. 2020-10-01 12:57:10 +10:00