257 lines
6.1 KiB
C
257 lines
6.1 KiB
C
/*
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* carl9170 firmware - used by the ar9170 wireless device
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*
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* initialization and main() loop
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*
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* Copyright (c) 2000-2005 ZyDAS Technology Corporation
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* Copyright (c) 2007-2009 Atheros Communications, Inc.
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* Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
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* Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "carl9170.h"
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#include "timer.h"
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#include "hostif.h"
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#include "printf.h"
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#include "gpio.h"
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#include "wl.h"
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#include "rf.h"
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#include "usb.h"
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#define AR9170_WATCH_DOG_TIMER 0x100
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static void timer_init(const unsigned int timer, const unsigned int interval)
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{
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/* Set timer to periodic mode */
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orl(AR9170_TIMER_REG_CONTROL, BIT(timer));
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/* Set time interval */
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set(AR9170_TIMER_REG_TIMER0 + (timer << 2), interval - 1);
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/* Clear timer interrupt flag */
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orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
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}
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void clock_set(enum cpu_clock_t clock_, bool on)
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{
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/*
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* Word of Warning!
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* This setting does more than just mess with the CPU Clock.
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* So watch out, if you need _stable_ timer interrupts.
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*/
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#ifdef CONFIG_CARL9170FW_RADIO_FUNCTIONS
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if (fw.phy.frequency < 3000000)
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set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
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else
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set(AR9170_PWR_REG_PLL_ADDAC, 0x5143);
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#else
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set(AR9170_PWR_REG_PLL_ADDAC, 0x5163);
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#endif /* CONFIG_CARL9170FW_RADIO_FUNCTIONS */
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fw.ticks_per_usec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV,
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get(AR9170_PWR_REG_PLL_ADDAC));
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set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | clock_));
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switch (clock_) {
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case AHB_20_22MHZ:
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fw.ticks_per_usec >>= 1;
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case AHB_40MHZ_OSC:
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case AHB_40_44MHZ:
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fw.ticks_per_usec >>= 1;
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case AHB_80_88MHZ:
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break;
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}
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}
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static void init(void)
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{
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led_init();
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#ifdef CONFIG_CARL9170FW_DEBUG_UART
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uart_init();
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#endif /* CONFIG_CARL9170FW_DEBUG_UART */
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/* 25/50/100ms timer (depends on cpu clock) */
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timer_init(0, 50000);
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/* USB init */
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usb_init();
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/* initialize DMA memory */
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memset(&dma_mem, 0, sizeof(dma_mem));
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/* fill DMA rings */
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dma_init_descriptors();
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/* clear all interrupt */
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set(AR9170_MAC_REG_INT_CTRL, 0xffff);
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orl(AR9170_MAC_REG_AFTER_PNP, 1);
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/* Init watch dog control flag */
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fw.watchdog_enable = 1;
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set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
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#ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
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fw.cached_gpio_state.gpio = get(AR9170_GPIO_REG_PORT_DATA) &
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CARL9170_GPIO_MASK;
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#endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
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/* this will get the downqueue moving. */
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down_trigger();
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}
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static void handle_fw(void)
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{
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if (fw.watchdog_enable == 1)
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set(AR9170_TIMER_REG_WATCH_DOG, AR9170_WATCH_DOG_TIMER);
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if (fw.reboot)
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reboot();
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}
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static void timer0_isr(void)
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{
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wlan_timer();
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#ifdef CONFIG_CARL9170FW_GPIO_INTERRUPT
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gpio_timer();
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#endif /* CONFIG_CARL9170FW_GPIO_INTERRUPT */
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#ifdef CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT
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set(AR9170_GPIO_REG_PORT_DATA, get(AR9170_GPIO_REG_PORT_DATA) ^ 1);
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#endif /* CONFIG_CARL9170FW_DEBUG_LED_HEARTBEAT */
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}
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static void handle_timer(void)
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{
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uint32_t intr;
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intr = get(AR9170_TIMER_REG_INTERRUPT);
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/* ACK timer interrupt */
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set(AR9170_TIMER_REG_INTERRUPT, intr);
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#define HANDLER(intr, flag, func) \
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do { \
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if ((intr & flag) != 0) { \
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intr &= ~flag; \
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func(); \
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} \
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} while (0)
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HANDLER(intr, BIT(0), timer0_isr);
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if (intr)
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DBG("Unhandled Timer Event %x", (unsigned int) intr);
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#undef HANDLER
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}
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static void tally_update(void)
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{
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unsigned int boff, time, delta;
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time = get_clock_counter();
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if (fw.phy.state == CARL9170_PHY_ON) {
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delta = (time - fw.tally_clock);
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fw.tally.active += delta;
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boff = get(AR9170_MAC_REG_BACKOFF_STATUS);
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if (boff & AR9170_MAC_BACKOFF_TX_PE)
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fw.tally.tx_time += delta;
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if (boff & AR9170_MAC_BACKOFF_CCA)
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fw.tally.cca += delta;
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}
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fw.tally_clock = time;
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fw.counter++;
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}
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static void __noreturn main_loop(void)
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{
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/* main loop */
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while (1) {
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handle_fw();
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/*
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* Due to frame order persevation, the wlan subroutines
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* must be executed before handle_host_interface.
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*/
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handle_wlan();
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handle_host_interface();
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handle_usb();
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handle_timer();
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tally_update();
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}
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}
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/*
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* The bootcode will work with the device driver to load the firmware
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* onto the device's Program SRAM. The Program SRAM has a size of 16 KB
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* and also contains the stack, which grows down from 0x204000.
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*
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* The Program SRAM starts at address 0x200000 on the device.
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* The firmware entry point (0x200004) is located in boot.S.
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* we put _start() there with the linker script carl9170.lds.
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*/
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void __section(boot) start(void)
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{
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clock_set(AHB_40MHZ_OSC, true);
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/* watchdog magic pattern check */
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if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x12340000) {
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/* watch dog warm start */
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incl(AR9170_PWR_REG_WATCH_DOG_MAGIC);
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usb_trigger_out();
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} else if ((get(AR9170_PWR_REG_WATCH_DOG_MAGIC) & 0xffff0000) == 0x98760000) {
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/* suspend/resume */
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}
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/* write the magic pattern for watch dog */
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andl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0xFFFF);
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orl(AR9170_PWR_REG_WATCH_DOG_MAGIC, 0x12340000);
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init();
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#ifdef CONFIG_CARL9170FW_DEBUG
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BUG("TEST BUG");
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BUG_ON(0x2b || !0x2b);
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INFO("INFO MESSAGE");
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/* a set of unique characters to detect transfer data corruptions */
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DBG("AaBbCcDdEeFfGgHhIiJjKkLlMmNnOoPpQqRrSsTtUuVvWwXxYyZz"
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" ~`!1@2#3$4%%5^6&7*8(9)0_-+={[}]|\\:;\"'<,>.?/");
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#endif /* CONFIG_CARL9170FW_DEBUG */
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/*
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* Tell the host, that the firmware has booted and is
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* now ready to process requests.
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*/
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send_cmd_to_host(0, CARL9170_RSP_BOOT, 0x00, NULL);
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main_loop();
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}
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