243 lines
5.9 KiB
C
243 lines
5.9 KiB
C
![]() |
/* linux/arch/arm/plat-s5p/irq-gpioint.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* Author: Kyungmin Park <kyungmin.park@samsung.com>
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* Author: Joonyoung Shim <jy0922.shim@samsung.com>
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* Author: Marek Szyprowski <m.szyprowski@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <mach/map.h>
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
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#define GPIOINT_CON_OFFSET 0x700
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#define GPIOINT_MASK_OFFSET 0x900
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#define GPIOINT_PEND_OFFSET 0xA00
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#define GPIOINT_LEVEL_LOW 0x0
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#define GPIOINT_LEVEL_HIGH 0x1
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#define GPIOINT_EDGE_FALLING 0x2
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#define GPIOINT_EDGE_RISING 0x3
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#define GPIOINT_EDGE_BOTH 0x4
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static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];
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static int s5p_gpioint_get_group(unsigned int irq)
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{
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struct gpio_chip *chip = get_irq_data(irq);
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struct s3c_gpio_chip *s3c_chip = container_of(chip,
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struct s3c_gpio_chip, chip);
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int group;
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for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++)
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if (s3c_chip == irq_chips[group])
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break;
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return group;
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}
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static int s5p_gpioint_get_offset(unsigned int irq)
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{
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struct gpio_chip *chip = get_irq_data(irq);
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struct s3c_gpio_chip *s3c_chip = container_of(chip,
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struct s3c_gpio_chip, chip);
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return irq - s3c_chip->irq_base;
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}
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static void s5p_gpioint_ack(unsigned int irq)
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{
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int group, offset, pend_offset;
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unsigned int value;
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group = s5p_gpioint_get_group(irq);
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offset = s5p_gpioint_get_offset(irq);
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pend_offset = group << 2;
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value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
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value |= 1 << offset;
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__raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
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}
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static void s5p_gpioint_mask(unsigned int irq)
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{
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int group, offset, mask_offset;
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unsigned int value;
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group = s5p_gpioint_get_group(irq);
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offset = s5p_gpioint_get_offset(irq);
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mask_offset = group << 2;
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value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
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value |= 1 << offset;
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__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
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}
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static void s5p_gpioint_unmask(unsigned int irq)
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{
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int group, offset, mask_offset;
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unsigned int value;
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group = s5p_gpioint_get_group(irq);
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offset = s5p_gpioint_get_offset(irq);
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mask_offset = group << 2;
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value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
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value &= ~(1 << offset);
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__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
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}
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static void s5p_gpioint_mask_ack(unsigned int irq)
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{
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s5p_gpioint_mask(irq);
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s5p_gpioint_ack(irq);
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}
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static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
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{
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int group, offset, con_offset;
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unsigned int value;
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group = s5p_gpioint_get_group(irq);
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offset = s5p_gpioint_get_offset(irq);
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con_offset = group << 2;
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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type = GPIOINT_EDGE_RISING;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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type = GPIOINT_EDGE_FALLING;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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type = GPIOINT_EDGE_BOTH;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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type = GPIOINT_LEVEL_HIGH;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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type = GPIOINT_LEVEL_LOW;
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break;
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case IRQ_TYPE_NONE:
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default:
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printk(KERN_WARNING "No irq type\n");
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return -EINVAL;
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}
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value = __raw_readl(S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
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value &= ~(0x7 << (offset * 0x4));
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value |= (type << (offset * 0x4));
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__raw_writel(value, S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
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return 0;
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}
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struct irq_chip s5p_gpioint = {
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.name = "s5p_gpioint",
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.ack = s5p_gpioint_ack,
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.mask = s5p_gpioint_mask,
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.mask_ack = s5p_gpioint_mask_ack,
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.unmask = s5p_gpioint_unmask,
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.set_type = s5p_gpioint_set_type,
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};
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static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
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{
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int group, offset, pend_offset, mask_offset;
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int real_irq;
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unsigned int pend, mask;
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for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++) {
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pend_offset = group << 2;
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pend = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) +
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pend_offset);
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if (!pend)
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continue;
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mask_offset = group << 2;
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mask = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) +
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mask_offset);
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pend &= ~mask;
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for (offset = 0; offset < 8; offset++) {
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if (pend & (1 << offset)) {
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struct s3c_gpio_chip *chip = irq_chips[group];
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if (chip) {
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real_irq = chip->irq_base + offset;
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generic_handle_irq(real_irq);
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}
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}
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}
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}
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}
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static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
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{
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static int used_gpioint_groups = 0;
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static bool handler_registered = 0;
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int irq, group = chip->group;
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int i;
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if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
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return -ENOMEM;
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chip->irq_base = S5P_GPIOINT_BASE +
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used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE;
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used_gpioint_groups++;
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if (!handler_registered) {
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set_irq_chained_handler(IRQ_GPIOINT, s5p_gpioint_handler);
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handler_registered = 1;
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}
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irq_chips[group] = chip;
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for (i = 0; i < chip->chip.ngpio; i++) {
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irq = chip->irq_base + i;
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set_irq_chip(irq, &s5p_gpioint);
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set_irq_data(irq, &chip->chip);
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set_irq_handler(irq, handle_level_irq);
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set_irq_flags(irq, IRQF_VALID);
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}
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return 0;
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}
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int __init s5p_register_gpio_interrupt(int pin)
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{
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struct s3c_gpio_chip *my_chip = s3c_gpiolib_getchip(pin);
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int offset, group;
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int ret;
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if (!my_chip)
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return -EINVAL;
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offset = pin - my_chip->chip.base;
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group = my_chip->group;
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/* check if the group has been already registered */
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if (my_chip->irq_base)
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return my_chip->irq_base + offset;
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/* register gpio group */
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ret = s5p_gpioint_add(my_chip);
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if (ret == 0) {
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printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",
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group);
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return my_chip->irq_base + offset;
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}
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return ret;
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}
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