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alistair23-linux/drivers/acpi/acpica/rsinfo.c

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ACPICA: adding SPDX headers Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-03-14 17:13:07 -06:00
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
Auto-update from upstream
2005-12-06 14:27:40 -07:00
/*******************************************************************************
*
* Module Name: rsinfo - Dispatch and Info tables
*
******************************************************************************/
#include <acpi/acpi.h>
ACPICA: hide private headers Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-08 22:30:03 -07:00
#include "accommon.h"
#include "acresrc.h"
Auto-update from upstream
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#define _COMPONENT ACPI_RESOURCES
ACPI_MODULE_NAME("rsinfo")
/*
* Resource dispatch and information tables. Any new resource types (either
* Large or Small) must be reflected in each of these tables, so they are here
* in one place.
*
* The tables for Large descriptors are indexed by bits 6:0 of the AML
* descriptor type byte. The tables for Small descriptors are indexed by
* bits 6:3 of the descriptor byte. The tables for internal resource
* descriptors are indexed by the acpi_resource_type field.
*/
/* Dispatch table for resource-to-AML (Set Resource) conversion functions */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
struct acpi_rsconvert_info *acpi_gbl_set_resource_dispatch[] = {
Auto-update from upstream
2005-12-06 14:27:40 -07:00
acpi_rs_set_irq, /* 0x00, ACPI_RESOURCE_TYPE_IRQ */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_dma, /* 0x01, ACPI_RESOURCE_TYPE_DMA */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
acpi_rs_set_start_dpf, /* 0x02, ACPI_RESOURCE_TYPE_START_DEPENDENT */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_end_dpf, /* 0x03, ACPI_RESOURCE_TYPE_END_DEPENDENT */
acpi_rs_convert_io, /* 0x04, ACPI_RESOURCE_TYPE_IO */
acpi_rs_convert_fixed_io, /* 0x05, ACPI_RESOURCE_TYPE_FIXED_IO */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
acpi_rs_set_vendor, /* 0x06, ACPI_RESOURCE_TYPE_VENDOR */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_end_tag, /* 0x07, ACPI_RESOURCE_TYPE_END_TAG */
acpi_rs_convert_memory24, /* 0x08, ACPI_RESOURCE_TYPE_MEMORY24 */
acpi_rs_convert_memory32, /* 0x09, ACPI_RESOURCE_TYPE_MEMORY32 */
acpi_rs_convert_fixed_memory32, /* 0x0A, ACPI_RESOURCE_TYPE_FIXED_MEMORY32 */
acpi_rs_convert_address16, /* 0x0B, ACPI_RESOURCE_TYPE_ADDRESS16 */
acpi_rs_convert_address32, /* 0x0C, ACPI_RESOURCE_TYPE_ADDRESS32 */
acpi_rs_convert_address64, /* 0x0D, ACPI_RESOURCE_TYPE_ADDRESS64 */
acpi_rs_convert_ext_address64, /* 0x0E, ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 */
acpi_rs_convert_ext_irq, /* 0x0F, ACPI_RESOURCE_TYPE_EXTENDED_IRQ */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
acpi_rs_convert_generic_reg, /* 0x10, ACPI_RESOURCE_TYPE_GENERIC_REGISTER */
acpi_rs_convert_gpio, /* 0x11, ACPI_RESOURCE_TYPE_GPIO */
acpi_rs_convert_fixed_dma, /* 0x12, ACPI_RESOURCE_TYPE_FIXED_DMA */
NULL, /* 0x13, ACPI_RESOURCE_TYPE_SERIAL_BUS - Use subtype table below */
ACPICA: ACPI 6.2: Add support for PinFunction() resource ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0 ACPI 6.2 introduced a new resource that is used to describe how certain pins are muxed for a device. The ASL syntax of this new resource looks like below: PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {Pin List} Which is pretty similar to GpioIo()/GpioInt() resources. Teach ACPICA about this new resource. Link: https://github.com/acpica/acpica/commit/6bbc6357 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:14 -06:00
acpi_rs_convert_pin_function, /* 0x14, ACPI_RESOURCE_TYPE_PIN_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinConfig() resource ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906 ACPI 6.2 introduced a new resource that is used to specify fine-grained configuration of a pin or set of pins used by a device. The ASL syntax of this new resource looks like: PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, Vendordata) {Pin List} PinConfigType is an integer with following accepted values: 0x00 (Default) - No configuration is applied to the pin 0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor 0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor 0x03 (Bias Default) - Set to default biasing 0x04 (Bias Disable) - All bias settings will be disabled 0x05 (Bias High Impedance) - Configure the pin as hi_z 0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where it drives the last value on a tristate bus 0x07 (Drive Open Drain) - Configure the pin into open drain state 0x08 (Drive Open Source) - Configure the pin into open source state 0x09 (Drive Push Pull) - Configure the pin into push-pull state 0x0a (Drive Strength) - How much the pin can supply current 0x0b (Slew Rate) - Configure slew rate of the pin 0x0c (Input Debounce) - Enable input debouncer for the pin 0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin 0x0e - 0x7f - Reserved 0x80 - 0xff - Vendor defined types The PinConfigValue depends on the type and is expressed as units suitable for that type (for example bias uses Ohms). Link: https://github.com/acpica/acpica/commit/a06fdba6 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:19 -06:00
acpi_rs_convert_pin_config, /* 0x15, ACPI_RESOURCE_TYPE_PIN_CONFIG */
ACPICA: ACPI 6.2: Add support for PinGroup() resource ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563 ACPI 6.2 introduced a new resource that is used to declare set of pins belonging to a GPIO controller. This resource is referenced by new PinGroupFunction() and PinGroupConfig() resources using ResourceSource and ResourceLabel fields. The PinGroup() resource looks like this: PinGroup (ResourceLabel, ResourceUsage, DescriptorName, VendorData) {Pin List} This resource should be listed in _CRS under the GPIO/pincontroller device providing these pins. Link: https://github.com/acpica/acpica/commit/7d928e31 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:25 -06:00
acpi_rs_convert_pin_group, /* 0x16, ACPI_RESOURCE_TYPE_PIN_GROUP */
ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2 PinGroupFunction() is a new resource introduced with ACPI 6.2. It is used with PinGroup() to configure specific mode for a set of pins exposed by a GPIO controller. The format of the resource is: PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The resource_source and ResourceSourceLabel fields are used to specify the PinGroup() resource referenced by PinGroupFunction(). Device (GPIO) { Name (_CRS, ResourceTemplate () { PinGroup ("group1") {2, 3} PinGroup ("group2") {4, 5} ... }) } Device (I2C) { Name (_CRS, ResourceTemplate () { PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2") }) } In the above example the PinGroupFunction() references the second PinGroup() resource (using label "mygroup2" and configures pins 4 and 5 into mode 6. Link: https://github.com/acpica/acpica/commit/bd9a7457 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:31 -06:00
acpi_rs_convert_pin_group_function, /* 0x17, ACPI_RESOURCE_TYPE_PIN_GROUP_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb PinGroupConfig() is analogous to PinGroupFunction() but instead of mode (muxing), it is used to apply specific fine-grained configuration to a set of referenced pins. The format of this new resource is: PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The PinConfigType/PinConfigValue are the same used by PinConfig() resource. Here also the combination of ResourceSource and ResourceSourceLabel is used to specify the PinGroup() this resource refers to. Link: https://github.com/acpica/acpica/commit/08b83591 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:37 -06:00
acpi_rs_convert_pin_group_config, /* 0x18, ACPI_RESOURCE_TYPE_PIN_GROUP_CONFIG */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
};
/* Dispatch tables for AML-to-resource (Get Resource) conversion functions */
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
struct acpi_rsconvert_info *acpi_gbl_get_resource_dispatch[] = {
/* Small descriptors */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
NULL, /* 0x00, Reserved */
NULL, /* 0x01, Reserved */
NULL, /* 0x02, Reserved */
NULL, /* 0x03, Reserved */
acpi_rs_get_irq, /* 0x04, ACPI_RESOURCE_NAME_IRQ */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_dma, /* 0x05, ACPI_RESOURCE_NAME_DMA */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
acpi_rs_get_start_dpf, /* 0x06, ACPI_RESOURCE_NAME_START_DEPENDENT */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_end_dpf, /* 0x07, ACPI_RESOURCE_NAME_END_DEPENDENT */
acpi_rs_convert_io, /* 0x08, ACPI_RESOURCE_NAME_IO */
acpi_rs_convert_fixed_io, /* 0x09, ACPI_RESOURCE_NAME_FIXED_IO */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
acpi_rs_convert_fixed_dma, /* 0x0A, ACPI_RESOURCE_NAME_FIXED_DMA */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
NULL, /* 0x0B, Reserved */
NULL, /* 0x0C, Reserved */
NULL, /* 0x0D, Reserved */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_get_vendor_small, /* 0x0E, ACPI_RESOURCE_NAME_VENDOR_SMALL */
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
acpi_rs_convert_end_tag, /* 0x0F, ACPI_RESOURCE_NAME_END_TAG */
/* Large descriptors */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
NULL, /* 0x00, Reserved */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_convert_memory24, /* 0x01, ACPI_RESOURCE_NAME_MEMORY24 */
acpi_rs_convert_generic_reg, /* 0x02, ACPI_RESOURCE_NAME_GENERIC_REGISTER */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
NULL, /* 0x03, Reserved */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_get_vendor_large, /* 0x04, ACPI_RESOURCE_NAME_VENDOR_LARGE */
acpi_rs_convert_memory32, /* 0x05, ACPI_RESOURCE_NAME_MEMORY32 */
acpi_rs_convert_fixed_memory32, /* 0x06, ACPI_RESOURCE_NAME_FIXED_MEMORY32 */
acpi_rs_convert_address32, /* 0x07, ACPI_RESOURCE_NAME_ADDRESS32 */
acpi_rs_convert_address16, /* 0x08, ACPI_RESOURCE_NAME_ADDRESS16 */
acpi_rs_convert_ext_irq, /* 0x09, ACPI_RESOURCE_NAME_EXTENDED_IRQ */
acpi_rs_convert_address64, /* 0x0A, ACPI_RESOURCE_NAME_ADDRESS64 */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
acpi_rs_convert_ext_address64, /* 0x0B, ACPI_RESOURCE_NAME_EXTENDED_ADDRESS64 */
acpi_rs_convert_gpio, /* 0x0C, ACPI_RESOURCE_NAME_GPIO */
ACPICA: ACPI 6.2: Add support for PinFunction() resource ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0 ACPI 6.2 introduced a new resource that is used to describe how certain pins are muxed for a device. The ASL syntax of this new resource looks like below: PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {Pin List} Which is pretty similar to GpioIo()/GpioInt() resources. Teach ACPICA about this new resource. Link: https://github.com/acpica/acpica/commit/6bbc6357 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:14 -06:00
acpi_rs_convert_pin_function, /* 0x0D, ACPI_RESOURCE_NAME_PIN_FUNCTION */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
NULL, /* 0x0E, ACPI_RESOURCE_NAME_SERIAL_BUS - Use subtype table below */
ACPICA: ACPI 6.2: Add support for PinConfig() resource ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906 ACPI 6.2 introduced a new resource that is used to specify fine-grained configuration of a pin or set of pins used by a device. The ASL syntax of this new resource looks like: PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, Vendordata) {Pin List} PinConfigType is an integer with following accepted values: 0x00 (Default) - No configuration is applied to the pin 0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor 0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor 0x03 (Bias Default) - Set to default biasing 0x04 (Bias Disable) - All bias settings will be disabled 0x05 (Bias High Impedance) - Configure the pin as hi_z 0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where it drives the last value on a tristate bus 0x07 (Drive Open Drain) - Configure the pin into open drain state 0x08 (Drive Open Source) - Configure the pin into open source state 0x09 (Drive Push Pull) - Configure the pin into push-pull state 0x0a (Drive Strength) - How much the pin can supply current 0x0b (Slew Rate) - Configure slew rate of the pin 0x0c (Input Debounce) - Enable input debouncer for the pin 0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin 0x0e - 0x7f - Reserved 0x80 - 0xff - Vendor defined types The PinConfigValue depends on the type and is expressed as units suitable for that type (for example bias uses Ohms). Link: https://github.com/acpica/acpica/commit/a06fdba6 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:19 -06:00
acpi_rs_convert_pin_config, /* 0x0F, ACPI_RESOURCE_NAME_PIN_CONFIG */
ACPICA: ACPI 6.2: Add support for PinGroup() resource ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563 ACPI 6.2 introduced a new resource that is used to declare set of pins belonging to a GPIO controller. This resource is referenced by new PinGroupFunction() and PinGroupConfig() resources using ResourceSource and ResourceLabel fields. The PinGroup() resource looks like this: PinGroup (ResourceLabel, ResourceUsage, DescriptorName, VendorData) {Pin List} This resource should be listed in _CRS under the GPIO/pincontroller device providing these pins. Link: https://github.com/acpica/acpica/commit/7d928e31 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:25 -06:00
acpi_rs_convert_pin_group, /* 0x10, ACPI_RESOURCE_NAME_PIN_GROUP */
ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2 PinGroupFunction() is a new resource introduced with ACPI 6.2. It is used with PinGroup() to configure specific mode for a set of pins exposed by a GPIO controller. The format of the resource is: PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The resource_source and ResourceSourceLabel fields are used to specify the PinGroup() resource referenced by PinGroupFunction(). Device (GPIO) { Name (_CRS, ResourceTemplate () { PinGroup ("group1") {2, 3} PinGroup ("group2") {4, 5} ... }) } Device (I2C) { Name (_CRS, ResourceTemplate () { PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2") }) } In the above example the PinGroupFunction() references the second PinGroup() resource (using label "mygroup2" and configures pins 4 and 5 into mode 6. Link: https://github.com/acpica/acpica/commit/bd9a7457 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:31 -06:00
acpi_rs_convert_pin_group_function, /* 0x11, ACPI_RESOURCE_NAME_PIN_GROUP_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb PinGroupConfig() is analogous to PinGroupFunction() but instead of mode (muxing), it is used to apply specific fine-grained configuration to a set of referenced pins. The format of this new resource is: PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The PinConfigType/PinConfigValue are the same used by PinConfig() resource. Here also the combination of ResourceSource and ResourceSourceLabel is used to specify the PinGroup() this resource refers to. Link: https://github.com/acpica/acpica/commit/08b83591 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:37 -06:00
acpi_rs_convert_pin_group_config, /* 0x12, ACPI_RESOURCE_NAME_PIN_GROUP_CONFIG */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
};
/* Subtype table for serial_bus -- I2C, SPI, and UART */
struct acpi_rsconvert_info *acpi_gbl_convert_resource_serial_bus_dispatch[] = {
NULL,
acpi_rs_convert_i2c_serial_bus,
acpi_rs_convert_spi_serial_bus,
acpi_rs_convert_uart_serial_bus,
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};
ACPICA: Update the conditions to enable the utility resource dump strings. This patch enables resource dump functions for debugging purpose where ACPI_DEBUG_OUTPUT is enabled. Such functions are useful for developers to track kernel issues when composing debugging patches. They will be optimized out during link stage for normal builds. This patch updates the compilation condition used for the resource dump related string tables to match the compilation environment used for rsdump.c and rsdumpinfo.c. This patch can help to improve the ACPICA release automation. Lv Zheng. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-02-07 18:42:46 -07:00
#if defined(ACPI_DEBUG_OUTPUT) || defined(ACPI_DISASSEMBLER) || defined(ACPI_DEBUGGER)
Auto-update from upstream
2005-12-06 14:27:40 -07:00
/* Dispatch table for resource dump functions */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
struct acpi_rsdump_info *acpi_gbl_dump_resource_dispatch[] = {
Auto-update from upstream
2005-12-06 14:27:40 -07:00
acpi_rs_dump_irq, /* ACPI_RESOURCE_TYPE_IRQ */
acpi_rs_dump_dma, /* ACPI_RESOURCE_TYPE_DMA */
acpi_rs_dump_start_dpf, /* ACPI_RESOURCE_TYPE_START_DEPENDENT */
acpi_rs_dump_end_dpf, /* ACPI_RESOURCE_TYPE_END_DEPENDENT */
acpi_rs_dump_io, /* ACPI_RESOURCE_TYPE_IO */
acpi_rs_dump_fixed_io, /* ACPI_RESOURCE_TYPE_FIXED_IO */
acpi_rs_dump_vendor, /* ACPI_RESOURCE_TYPE_VENDOR */
acpi_rs_dump_end_tag, /* ACPI_RESOURCE_TYPE_END_TAG */
acpi_rs_dump_memory24, /* ACPI_RESOURCE_TYPE_MEMORY24 */
acpi_rs_dump_memory32, /* ACPI_RESOURCE_TYPE_MEMORY32 */
acpi_rs_dump_fixed_memory32, /* ACPI_RESOURCE_TYPE_FIXED_MEMORY32 */
acpi_rs_dump_address16, /* ACPI_RESOURCE_TYPE_ADDRESS16 */
acpi_rs_dump_address32, /* ACPI_RESOURCE_TYPE_ADDRESS32 */
acpi_rs_dump_address64, /* ACPI_RESOURCE_TYPE_ADDRESS64 */
acpi_rs_dump_ext_address64, /* ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 */
acpi_rs_dump_ext_irq, /* ACPI_RESOURCE_TYPE_EXTENDED_IRQ */
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
acpi_rs_dump_generic_reg, /* ACPI_RESOURCE_TYPE_GENERIC_REGISTER */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
acpi_rs_dump_gpio, /* ACPI_RESOURCE_TYPE_GPIO */
acpi_rs_dump_fixed_dma, /* ACPI_RESOURCE_TYPE_FIXED_DMA */
NULL, /* ACPI_RESOURCE_TYPE_SERIAL_BUS */
ACPICA: ACPI 6.2: Add support for PinFunction() resource ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0 ACPI 6.2 introduced a new resource that is used to describe how certain pins are muxed for a device. The ASL syntax of this new resource looks like below: PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {Pin List} Which is pretty similar to GpioIo()/GpioInt() resources. Teach ACPICA about this new resource. Link: https://github.com/acpica/acpica/commit/6bbc6357 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:14 -06:00
acpi_rs_dump_pin_function, /* ACPI_RESOURCE_TYPE_PIN_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinConfig() resource ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906 ACPI 6.2 introduced a new resource that is used to specify fine-grained configuration of a pin or set of pins used by a device. The ASL syntax of this new resource looks like: PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, Vendordata) {Pin List} PinConfigType is an integer with following accepted values: 0x00 (Default) - No configuration is applied to the pin 0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor 0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor 0x03 (Bias Default) - Set to default biasing 0x04 (Bias Disable) - All bias settings will be disabled 0x05 (Bias High Impedance) - Configure the pin as hi_z 0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where it drives the last value on a tristate bus 0x07 (Drive Open Drain) - Configure the pin into open drain state 0x08 (Drive Open Source) - Configure the pin into open source state 0x09 (Drive Push Pull) - Configure the pin into push-pull state 0x0a (Drive Strength) - How much the pin can supply current 0x0b (Slew Rate) - Configure slew rate of the pin 0x0c (Input Debounce) - Enable input debouncer for the pin 0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin 0x0e - 0x7f - Reserved 0x80 - 0xff - Vendor defined types The PinConfigValue depends on the type and is expressed as units suitable for that type (for example bias uses Ohms). Link: https://github.com/acpica/acpica/commit/a06fdba6 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:19 -06:00
acpi_rs_dump_pin_config, /* ACPI_RESOURCE_TYPE_PIN_CONFIG */
ACPICA: ACPI 6.2: Add support for PinGroup() resource ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563 ACPI 6.2 introduced a new resource that is used to declare set of pins belonging to a GPIO controller. This resource is referenced by new PinGroupFunction() and PinGroupConfig() resources using ResourceSource and ResourceLabel fields. The PinGroup() resource looks like this: PinGroup (ResourceLabel, ResourceUsage, DescriptorName, VendorData) {Pin List} This resource should be listed in _CRS under the GPIO/pincontroller device providing these pins. Link: https://github.com/acpica/acpica/commit/7d928e31 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:25 -06:00
acpi_rs_dump_pin_group, /* ACPI_RESOURCE_TYPE_PIN_GROUP */
ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2 PinGroupFunction() is a new resource introduced with ACPI 6.2. It is used with PinGroup() to configure specific mode for a set of pins exposed by a GPIO controller. The format of the resource is: PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The resource_source and ResourceSourceLabel fields are used to specify the PinGroup() resource referenced by PinGroupFunction(). Device (GPIO) { Name (_CRS, ResourceTemplate () { PinGroup ("group1") {2, 3} PinGroup ("group2") {4, 5} ... }) } Device (I2C) { Name (_CRS, ResourceTemplate () { PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2") }) } In the above example the PinGroupFunction() references the second PinGroup() resource (using label "mygroup2" and configures pins 4 and 5 into mode 6. Link: https://github.com/acpica/acpica/commit/bd9a7457 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:31 -06:00
acpi_rs_dump_pin_group_function, /* ACPI_RESOURCE_TYPE_PIN_GROUP_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb PinGroupConfig() is analogous to PinGroupFunction() but instead of mode (muxing), it is used to apply specific fine-grained configuration to a set of referenced pins. The format of this new resource is: PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The PinConfigType/PinConfigValue are the same used by PinConfig() resource. Here also the combination of ResourceSource and ResourceSourceLabel is used to specify the PinGroup() this resource refers to. Link: https://github.com/acpica/acpica/commit/08b83591 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:37 -06:00
acpi_rs_dump_pin_group_config, /* ACPI_RESOURCE_TYPE_PIN_GROUP_CONFIG */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
};
struct acpi_rsdump_info *acpi_gbl_dump_serial_bus_dispatch[] = {
NULL,
acpi_rs_dump_i2c_serial_bus, /* AML_RESOURCE_I2C_BUS_TYPE */
acpi_rs_dump_spi_serial_bus, /* AML_RESOURCE_SPI_BUS_TYPE */
acpi_rs_dump_uart_serial_bus, /* AML_RESOURCE_UART_BUS_TYPE */
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};
#endif
ACPI: ACPICA 20060310 Tagged all external interfaces to the subsystem with the new ACPI_EXPORT_SYMBOL macro. This macro can be defined as necessary to assist kernel integration. For Linux, the macro resolves to the EXPORT_SYMBOL macro. The default definition is NULL. Added the ACPI_THREAD_ID type for the return value from acpi_os_get_thread_id(). This allows the host to define this as necessary to simplify kernel integration. The default definition is ACPI_NATIVE_UINT. Valery Podrezov fixed two interpreter problems related to error processing, the deletion of objects, and placing invalid pointers onto the internal operator result stack. http://bugzilla.kernel.org/show_bug.cgi?id=6028 http://bugzilla.kernel.org/show_bug.cgi?id=6151 Increased the reference count threshold where a warning is emitted for large reference counts in order to eliminate unnecessary warnings on systems with large namespaces (especially 64-bit.) Increased the value from 0x400 to 0x800. Due to universal disagreement as to the meaning of the 'c' in the calloc() function, the ACPI_MEM_CALLOCATE macro has been renamed to ACPI_ALLOCATE_ZEROED so that the purpose of the interface is 'clear'. ACPI_MEM_ALLOCATE and ACPI_MEM_FREE are renamed to ACPI_ALLOCATE and ACPI_FREE. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2006-10-02 22:00:00 -06:00
Auto-update from upstream
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/*
* Base sizes for external AML resource descriptors, indexed by internal type.
* Includes size of the descriptor header (1 byte for small descriptors,
* 3 bytes for large descriptors)
*/
[ACPI] ACPICA 20051021 Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-10-20 22:00:00 -06:00
const u8 acpi_gbl_aml_resource_sizes[] = {
Auto-update from upstream
2005-12-06 14:27:40 -07:00
sizeof(struct aml_resource_irq), /* ACPI_RESOURCE_TYPE_IRQ (optional Byte 3 always created) */
sizeof(struct aml_resource_dma), /* ACPI_RESOURCE_TYPE_DMA */
sizeof(struct aml_resource_start_dependent), /* ACPI_RESOURCE_TYPE_START_DEPENDENT (optional Byte 1 always created) */
sizeof(struct aml_resource_end_dependent), /* ACPI_RESOURCE_TYPE_END_DEPENDENT */
sizeof(struct aml_resource_io), /* ACPI_RESOURCE_TYPE_IO */
sizeof(struct aml_resource_fixed_io), /* ACPI_RESOURCE_TYPE_FIXED_IO */
sizeof(struct aml_resource_vendor_small), /* ACPI_RESOURCE_TYPE_VENDOR */
sizeof(struct aml_resource_end_tag), /* ACPI_RESOURCE_TYPE_END_TAG */
sizeof(struct aml_resource_memory24), /* ACPI_RESOURCE_TYPE_MEMORY24 */
sizeof(struct aml_resource_memory32), /* ACPI_RESOURCE_TYPE_MEMORY32 */
sizeof(struct aml_resource_fixed_memory32), /* ACPI_RESOURCE_TYPE_FIXED_MEMORY32 */
sizeof(struct aml_resource_address16), /* ACPI_RESOURCE_TYPE_ADDRESS16 */
sizeof(struct aml_resource_address32), /* ACPI_RESOURCE_TYPE_ADDRESS32 */
sizeof(struct aml_resource_address64), /* ACPI_RESOURCE_TYPE_ADDRESS64 */
sizeof(struct aml_resource_extended_address64), /*ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 */
sizeof(struct aml_resource_extended_irq), /* ACPI_RESOURCE_TYPE_EXTENDED_IRQ */
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
sizeof(struct aml_resource_generic_register), /* ACPI_RESOURCE_TYPE_GENERIC_REGISTER */
sizeof(struct aml_resource_gpio), /* ACPI_RESOURCE_TYPE_GPIO */
sizeof(struct aml_resource_fixed_dma), /* ACPI_RESOURCE_TYPE_FIXED_DMA */
sizeof(struct aml_resource_common_serialbus), /* ACPI_RESOURCE_TYPE_SERIAL_BUS */
ACPICA: ACPI 6.2: Add support for PinFunction() resource ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0 ACPI 6.2 introduced a new resource that is used to describe how certain pins are muxed for a device. The ASL syntax of this new resource looks like below: PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {Pin List} Which is pretty similar to GpioIo()/GpioInt() resources. Teach ACPICA about this new resource. Link: https://github.com/acpica/acpica/commit/6bbc6357 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:14 -06:00
sizeof(struct aml_resource_pin_function), /* ACPI_RESOURCE_TYPE_PIN_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinConfig() resource ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906 ACPI 6.2 introduced a new resource that is used to specify fine-grained configuration of a pin or set of pins used by a device. The ASL syntax of this new resource looks like: PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, Vendordata) {Pin List} PinConfigType is an integer with following accepted values: 0x00 (Default) - No configuration is applied to the pin 0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor 0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor 0x03 (Bias Default) - Set to default biasing 0x04 (Bias Disable) - All bias settings will be disabled 0x05 (Bias High Impedance) - Configure the pin as hi_z 0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where it drives the last value on a tristate bus 0x07 (Drive Open Drain) - Configure the pin into open drain state 0x08 (Drive Open Source) - Configure the pin into open source state 0x09 (Drive Push Pull) - Configure the pin into push-pull state 0x0a (Drive Strength) - How much the pin can supply current 0x0b (Slew Rate) - Configure slew rate of the pin 0x0c (Input Debounce) - Enable input debouncer for the pin 0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin 0x0e - 0x7f - Reserved 0x80 - 0xff - Vendor defined types The PinConfigValue depends on the type and is expressed as units suitable for that type (for example bias uses Ohms). Link: https://github.com/acpica/acpica/commit/a06fdba6 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:19 -06:00
sizeof(struct aml_resource_pin_config), /* ACPI_RESOURCE_TYPE_PIN_CONFIG */
ACPICA: ACPI 6.2: Add support for PinGroup() resource ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563 ACPI 6.2 introduced a new resource that is used to declare set of pins belonging to a GPIO controller. This resource is referenced by new PinGroupFunction() and PinGroupConfig() resources using ResourceSource and ResourceLabel fields. The PinGroup() resource looks like this: PinGroup (ResourceLabel, ResourceUsage, DescriptorName, VendorData) {Pin List} This resource should be listed in _CRS under the GPIO/pincontroller device providing these pins. Link: https://github.com/acpica/acpica/commit/7d928e31 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:25 -06:00
sizeof(struct aml_resource_pin_group), /* ACPI_RESOURCE_TYPE_PIN_GROUP */
ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2 PinGroupFunction() is a new resource introduced with ACPI 6.2. It is used with PinGroup() to configure specific mode for a set of pins exposed by a GPIO controller. The format of the resource is: PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The resource_source and ResourceSourceLabel fields are used to specify the PinGroup() resource referenced by PinGroupFunction(). Device (GPIO) { Name (_CRS, ResourceTemplate () { PinGroup ("group1") {2, 3} PinGroup ("group2") {4, 5} ... }) } Device (I2C) { Name (_CRS, ResourceTemplate () { PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2") }) } In the above example the PinGroupFunction() references the second PinGroup() resource (using label "mygroup2" and configures pins 4 and 5 into mode 6. Link: https://github.com/acpica/acpica/commit/bd9a7457 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:31 -06:00
sizeof(struct aml_resource_pin_group_function), /* ACPI_RESOURCE_TYPE_PIN_GROUP_FUNCTION */
ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb PinGroupConfig() is analogous to PinGroupFunction() but instead of mode (muxing), it is used to apply specific fine-grained configuration to a set of referenced pins. The format of this new resource is: PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The PinConfigType/PinConfigValue are the same used by PinConfig() resource. Here also the combination of ResourceSource and ResourceSourceLabel is used to specify the PinGroup() this resource refers to. Link: https://github.com/acpica/acpica/commit/08b83591 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:37 -06:00
sizeof(struct aml_resource_pin_group_config), /* ACPI_RESOURCE_TYPE_PIN_GROUP_CONFIG */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
};
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
const u8 acpi_gbl_resource_struct_sizes[] = {
/* Small descriptors */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
0,
0,
0,
0,
ACPI_RS_SIZE(struct acpi_resource_irq),
ACPI_RS_SIZE(struct acpi_resource_dma),
ACPI_RS_SIZE(struct acpi_resource_start_dependent),
ACPI_RS_SIZE_MIN,
ACPI_RS_SIZE(struct acpi_resource_io),
ACPI_RS_SIZE(struct acpi_resource_fixed_io),
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
ACPI_RS_SIZE(struct acpi_resource_fixed_dma),
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
0,
0,
0,
ACPI_RS_SIZE(struct acpi_resource_vendor),
ACPI_RS_SIZE_MIN,
Auto-update from upstream
2005-12-06 14:27:40 -07:00
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
/* Large descriptors */
Auto-update from upstream
2005-12-06 14:27:40 -07:00
[ACPI] ACPICA 20051102 Modified the subsystem initialization sequence to improve GPE support. The GPE initialization has been split into two parts in order to defer execution of the _PRW methods (Power Resources for Wake) until after the hardware is fully initialized and the SCI handler is installed. This allows the _PRW methods to access fields protected by the Global Lock. This will fix systems where a NO_GLOBAL_LOCK exception has been seen during initialization. Fixed a regression with the ConcatenateResTemplate() ASL operator introduced in the 20051021 release. Implemented support for "local" internal ACPI object types within the debugger "Object" command and the acpi_walk_namespace() external interfaces. These local types include RegionFields, BankFields, IndexFields, Alias, and reference objects. Moved common AML resource handling code into a new file, "utresrc.c". This code is shared by both the Resource Manager and the AML Debugger. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2005-11-01 22:00:00 -07:00
0,
ACPI_RS_SIZE(struct acpi_resource_memory24),
ACPI_RS_SIZE(struct acpi_resource_generic_register),
0,
ACPI_RS_SIZE(struct acpi_resource_vendor),
ACPI_RS_SIZE(struct acpi_resource_memory32),
ACPI_RS_SIZE(struct acpi_resource_fixed_memory32),
ACPI_RS_SIZE(struct acpi_resource_address32),
ACPI_RS_SIZE(struct acpi_resource_address16),
ACPI_RS_SIZE(struct acpi_resource_extended_irq),
ACPI_RS_SIZE(struct acpi_resource_address64),
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
ACPI_RS_SIZE(struct acpi_resource_extended_address64),
ACPI_RS_SIZE(struct acpi_resource_gpio),
ACPICA: ACPI 6.2: Add support for PinFunction() resource ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0 ACPI 6.2 introduced a new resource that is used to describe how certain pins are muxed for a device. The ASL syntax of this new resource looks like below: PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {Pin List} Which is pretty similar to GpioIo()/GpioInt() resources. Teach ACPICA about this new resource. Link: https://github.com/acpica/acpica/commit/6bbc6357 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:14 -06:00
ACPI_RS_SIZE(struct acpi_resource_pin_function),
ACPICA: ACPI 6.2: Add support for PinConfig() resource ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906 ACPI 6.2 introduced a new resource that is used to specify fine-grained configuration of a pin or set of pins used by a device. The ASL syntax of this new resource looks like: PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceUsage, DescriptorName, Vendordata) {Pin List} PinConfigType is an integer with following accepted values: 0x00 (Default) - No configuration is applied to the pin 0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor 0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor 0x03 (Bias Default) - Set to default biasing 0x04 (Bias Disable) - All bias settings will be disabled 0x05 (Bias High Impedance) - Configure the pin as hi_z 0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where it drives the last value on a tristate bus 0x07 (Drive Open Drain) - Configure the pin into open drain state 0x08 (Drive Open Source) - Configure the pin into open source state 0x09 (Drive Push Pull) - Configure the pin into push-pull state 0x0a (Drive Strength) - How much the pin can supply current 0x0b (Slew Rate) - Configure slew rate of the pin 0x0c (Input Debounce) - Enable input debouncer for the pin 0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin 0x0e - 0x7f - Reserved 0x80 - 0xff - Vendor defined types The PinConfigValue depends on the type and is expressed as units suitable for that type (for example bias uses Ohms). Link: https://github.com/acpica/acpica/commit/a06fdba6 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:19 -06:00
ACPI_RS_SIZE(struct acpi_resource_common_serialbus),
ACPI_RS_SIZE(struct acpi_resource_pin_config),
ACPICA: ACPI 6.2: Add support for PinGroup() resource ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563 ACPI 6.2 introduced a new resource that is used to declare set of pins belonging to a GPIO controller. This resource is referenced by new PinGroupFunction() and PinGroupConfig() resources using ResourceSource and ResourceLabel fields. The PinGroup() resource looks like this: PinGroup (ResourceLabel, ResourceUsage, DescriptorName, VendorData) {Pin List} This resource should be listed in _CRS under the GPIO/pincontroller device providing these pins. Link: https://github.com/acpica/acpica/commit/7d928e31 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:25 -06:00
ACPI_RS_SIZE(struct acpi_resource_pin_group),
ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2 PinGroupFunction() is a new resource introduced with ACPI 6.2. It is used with PinGroup() to configure specific mode for a set of pins exposed by a GPIO controller. The format of the resource is: PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The resource_source and ResourceSourceLabel fields are used to specify the PinGroup() resource referenced by PinGroupFunction(). Device (GPIO) { Name (_CRS, ResourceTemplate () { PinGroup ("group1") {2, 3} PinGroup ("group2") {4, 5} ... }) } Device (I2C) { Name (_CRS, ResourceTemplate () { PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2") }) } In the above example the PinGroupFunction() references the second PinGroup() resource (using label "mygroup2" and configures pins 4 and 5 into mode 6. Link: https://github.com/acpica/acpica/commit/bd9a7457 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:31 -06:00
ACPI_RS_SIZE(struct acpi_resource_pin_group_function),
ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb PinGroupConfig() is analogous to PinGroupFunction() but instead of mode (muxing), it is used to apply specific fine-grained configuration to a set of referenced pins. The format of this new resource is: PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue, ResourceSource, ResourceSourceIndex, ResourceSourceLabel, ResourceUsage, DescriptorName, VendorData) The PinConfigType/PinConfigValue are the same used by PinConfig() resource. Here also the combination of ResourceSource and ResourceSourceLabel is used to specify the PinGroup() this resource refers to. Link: https://github.com/acpica/acpica/commit/08b83591 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-05 02:39:37 -06:00
ACPI_RS_SIZE(struct acpi_resource_pin_group_config),
ACPI 5.0: Support for all new resource descriptors FixedDMA, GPIO descriptors, SerialBus descriptors Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-15 23:38:13 -07:00
};
const u8 acpi_gbl_aml_resource_serial_bus_sizes[] = {
0,
sizeof(struct aml_resource_i2c_serialbus),
sizeof(struct aml_resource_spi_serialbus),
sizeof(struct aml_resource_uart_serialbus),
};
const u8 acpi_gbl_resource_struct_serial_bus_sizes[] = {
0,
ACPI_RS_SIZE(struct acpi_resource_i2c_serialbus),
ACPI_RS_SIZE(struct acpi_resource_spi_serialbus),
ACPI_RS_SIZE(struct acpi_resource_uart_serialbus),
Auto-update from upstream
2005-12-06 14:27:40 -07:00
};
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