2012-07-06 02:08:07 -06:00
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/*
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* Device Tree Source for the r8a7740 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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2013-11-18 19:18:25 -07:00
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#include <dt-bindings/interrupt-controller/irq.h>
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2012-07-06 02:08:07 -06:00
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/ {
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compatible = "renesas,r8a7740";
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cpus {
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2013-04-18 11:39:50 -06:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-07-06 02:08:07 -06:00
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cpu@0 {
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compatible = "arm,cortex-a9";
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2013-04-18 11:39:50 -06:00
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device_type = "cpu";
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reg = <0x0>;
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2012-07-06 02:08:07 -06:00
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};
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};
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2013-04-17 04:34:05 -06:00
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gic: interrupt-controller@c2800000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0xc2800000 0x1000>,
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<0xc2000000 0x1000>;
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};
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2013-07-23 21:59:09 -06:00
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pmu {
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compatible = "arm,cortex-a9-pmu";
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2013-11-18 19:18:25 -07:00
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interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
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2013-07-23 21:59:09 -06:00
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};
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2013-04-17 04:34:05 -06:00
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/* irqpin0: IRQ0 - IRQ7 */
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irqpin0: irqpin@e6900000 {
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2013-11-27 16:15:04 -07:00
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compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
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2013-04-17 04:34:05 -06:00
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900000 4>,
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<0xe6900010 4>,
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<0xe6900020 1>,
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<0xe6900040 1>,
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<0xe6900060 1>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH>;
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2013-04-17 04:34:05 -06:00
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};
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/* irqpin1: IRQ8 - IRQ15 */
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irqpin1: irqpin@e6900004 {
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2013-11-27 16:15:04 -07:00
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compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
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2013-04-17 04:34:05 -06:00
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900004 4>,
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<0xe6900014 4>,
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH>;
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2013-04-17 04:34:05 -06:00
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};
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/* irqpin2: IRQ16 - IRQ23 */
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irqpin2: irqpin@e6900008 {
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2013-11-27 16:15:04 -07:00
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compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
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2013-04-17 04:34:05 -06:00
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900008 4>,
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<0xe6900018 4>,
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<0xe6900028 1>,
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<0xe6900048 1>,
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<0xe6900068 1>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH>;
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2013-04-17 04:34:05 -06:00
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};
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/* irqpin3: IRQ24 - IRQ31 */
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irqpin3: irqpin@e690000c {
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2013-11-27 16:15:04 -07:00
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compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
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2013-04-17 04:34:05 -06:00
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe690000c 4>,
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<0xe690001c 4>,
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<0xe690002c 1>,
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<0xe690004c 1>,
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<0xe690006c 1>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH>;
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2013-04-17 04:34:05 -06:00
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};
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2014-05-07 14:32:29 -06:00
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ether: ethernet@e9a00000 {
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compatible = "renesas,gether-r8a7740";
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reg = <0xe9a00000 0x800>,
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<0xe9a01800 0x800>;
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interrupt-parent = <&gic>;
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
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/* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
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phy-mode = "mii";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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2013-04-17 04:34:05 -06:00
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i2c0: i2c@fff20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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2014-03-27 04:45:44 -06:00
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compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
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2013-04-17 04:34:05 -06:00
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reg = <0xfff20000 0x425>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
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0 202 IRQ_TYPE_LEVEL_HIGH
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0 203 IRQ_TYPE_LEVEL_HIGH
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0 204 IRQ_TYPE_LEVEL_HIGH>;
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2013-09-26 05:06:01 -06:00
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status = "disabled";
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2013-04-17 04:34:05 -06:00
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};
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i2c1: i2c@e6c20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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2014-03-27 04:45:44 -06:00
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compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
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2013-04-17 04:34:05 -06:00
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reg = <0xe6c20000 0x425>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
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0 71 IRQ_TYPE_LEVEL_HIGH
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0 72 IRQ_TYPE_LEVEL_HIGH
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0 73 IRQ_TYPE_LEVEL_HIGH>;
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2013-09-26 05:06:01 -06:00
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status = "disabled";
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2013-04-17 04:34:05 -06:00
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};
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2012-11-20 06:02:54 -07:00
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pfc: pfc@e6050000 {
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compatible = "renesas,pfc-r8a7740";
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reg = <0xe6050000 0x8000>,
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<0xe605800c 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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2013-12-10 20:26:28 -07:00
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interrupts-extended =
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<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
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<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
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<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
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<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
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<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
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<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
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<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
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<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
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2012-11-20 06:02:54 -07:00
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};
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ARM: Renesas SoC cleanup, refactoring and more SMP support
Lots of cleanup and refactoring and some SMP additions for Renesas
platforms. Due to some inter-dependencies with other arm-soc
branches, this Renesas stuff was separated out for sending after the
other branches were merged.
Highlights:
- remove unused board support and cleanup of unused headers
- refactoring of init and device registration
- simplify IRQ initialization
Conflicts: Too many. Most of these are because Simon chose to send
some board updates through the V4L tree that ends up colliding with
the main platform changes. We'll work with him on sorting out his
workflow:
- arch/arm/boot/dts/r8a7740.dtsi:
- Add/add conflict in a devicetree file (keep both)
- arch/arm/mach-shmobile/Makefile:
- Splitting out of clock files collides with intc move to DT.
Keep HEAD version but remove intc-* files for R8A7740 and R8A7779.
- arch/arm/mach-shmobile/board-bockw.c:
- Keep HEAD but remove i2c, hspi and mmc device init calls
- arch/arm/mach-shmobile/board-marzen.c
- Remove mach/hardware.h include and r8a7779_add_usb_phy_device() call,
everything else stays.
- arch/arm/mach-shmobile/include/mach/r8a7778.h:
- From HEAD, Keep camera-rcar.h include and r8a7778_add_vin_device()
- From branch, keep everything
- arch/arm/mach-shmobile/include/mach/r8a7779.h:
- From HEAD, Keep only camera-rcar.h include and r8a7779_add_vin_device()
- arch/arm/mach-shmobile/setup-r8a7778.c
- Keep HEAD, but drop the MMC section (struct resource + add_mmc_device())
- take the new function name from our side (r8a7778_add_dt_devices())
- arch/arm/mach-shmobile/setup-r8a7779.c
- Keep HEAD, but drop r8a7779_add_usb_phy_device()
I've also pushed a test-merge2 branch where you can see how I resolved
them.
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Merge tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Renesas SoC cleanup, refactoring and more SMP support from Kevin Hilman:
"Lots of cleanup and refactoring and some SMP additions for Renesas
platforms. Due to some inter-dependencies with other arm-soc
branches, this Renesas stuff was separated out for sending after the
other branches were merged.
Highlights:
- remove unused board support and cleanup of unused headers
- refactoring of init and device registration
- simplify IRQ initialization"
* tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
ARM: shmobile: Introduce per-CPU SMP boot / sleep code
ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
ARM: shmobile: Add shared SCU CPU Hotplug code
ARM: shmobile: Use shared SCU SMP boot code on emev2
ARM: shmobile: Use shared SCU SMP boot code on r8a7779
ARM: shmobile: Use shared SCU SMP boot code on sh73a0
ARM: shmobile: Introduce shared SCU SMP boot code
ARM: shmobile: sh73a0: Remove global GPIO_NR definition
ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
ARM: shmobile: bockw: add missing __initdata
ARM: shmobile: r8a7790: add missing __initdata
ARM: shmobile: r8a7779: add missing __initdata
ARM: shmobile: Remove unused shmobile_init_time()
ARM: shmobile: Use clocksource_of_init() on r8a7790
ARM: shmobile: Use default ->init_time() on KZM9G DT ref
...
2013-09-09 17:33:57 -06:00
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2013-07-25 16:51:00 -06:00
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tpu: pwm@e6600000 {
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compatible = "renesas,tpu-r8a7740", "renesas,tpu";
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reg = <0xe6600000 0x100>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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2013-09-27 02:02:57 -06:00
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2013-10-21 20:35:08 -06:00
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mmcif0: mmc@e6bd0000 {
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2014-03-27 04:45:44 -06:00
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compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
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2013-09-27 02:02:57 -06:00
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reg = <0xe6bd0000 0x100>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
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0 57 IRQ_TYPE_LEVEL_HIGH>;
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2013-09-27 02:02:57 -06:00
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status = "disabled";
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};
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2013-10-21 20:35:08 -06:00
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sdhi0: sd@e6850000 {
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2013-09-27 02:02:57 -06:00
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compatible = "renesas,sdhi-r8a7740";
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reg = <0xe6850000 0x100>;
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interrupt-parent = <&gic>;
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2013-11-18 19:18:25 -07:00
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interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
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0 118 IRQ_TYPE_LEVEL_HIGH
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0 119 IRQ_TYPE_LEVEL_HIGH>;
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2013-09-27 02:02:57 -06:00
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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2013-10-21 20:35:08 -06:00
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sdhi1: sd@e6860000 {
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2013-09-27 02:02:57 -06:00
|
|
|
compatible = "renesas,sdhi-r8a7740";
|
|
|
|
|
reg = <0xe6860000 0x100>;
|
|
|
|
|
interrupt-parent = <&gic>;
|
2013-11-18 19:18:25 -07:00
|
|
|
interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
|
|
|
|
|
0 122 IRQ_TYPE_LEVEL_HIGH
|
|
|
|
|
0 123 IRQ_TYPE_LEVEL_HIGH>;
|
2013-09-27 02:02:57 -06:00
|
|
|
cap-sd-highspeed;
|
|
|
|
|
cap-sdio-irq;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
2013-10-21 20:35:08 -06:00
|
|
|
|
|
|
|
|
sdhi2: sd@e6870000 {
|
|
|
|
|
compatible = "renesas,sdhi-r8a7740";
|
|
|
|
|
reg = <0xe6870000 0x100>;
|
|
|
|
|
interrupt-parent = <&gic>;
|
2013-11-18 19:18:25 -07:00
|
|
|
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
|
|
|
|
|
0 126 IRQ_TYPE_LEVEL_HIGH
|
|
|
|
|
0 127 IRQ_TYPE_LEVEL_HIGH>;
|
2013-10-21 20:35:08 -06:00
|
|
|
cap-sd-highspeed;
|
|
|
|
|
cap-sdio-irq;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
2013-12-03 18:28:41 -07:00
|
|
|
|
|
|
|
|
sh_fsi2: sound@fe1f0000 {
|
|
|
|
|
#sound-dai-cells = <1>;
|
2014-03-27 04:45:44 -06:00
|
|
|
compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
|
2013-12-03 18:28:41 -07:00
|
|
|
reg = <0xfe1f0000 0x400>;
|
|
|
|
|
interrupt-parent = <&gic>;
|
|
|
|
|
interrupts = <0 9 0x4>;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
2012-07-06 02:08:07 -06:00
|
|
|
};
|