2006-08-08 06:10:10 -06:00
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/*
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Driver for Philips tda10086 DVBS Demodulator
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(c) 2006 Andrew de Quincey
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/jiffies.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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2017-12-28 11:03:51 -07:00
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#include <media/dvb_frontend.h>
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2006-08-08 06:10:10 -06:00
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#include "tda10086.h"
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#define SACLK 96000000
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struct tda10086_state {
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struct i2c_adapter* i2c;
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const struct tda10086_config* config;
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struct dvb_frontend frontend;
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/* private demod data */
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u32 frequency;
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u32 symbol_rate;
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2007-05-28 15:06:27 -06:00
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bool has_lock;
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2006-08-08 06:10:10 -06:00
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};
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2008-04-22 11:41:48 -06:00
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static int debug;
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2006-08-08 06:10:10 -06:00
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "tda10086: " args); \
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} while (0)
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static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
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{
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int ret;
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u8 b0[] = { reg, data };
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struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
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msg.addr = state->config->demod_address;
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ret = i2c_transfer(state->i2c, &msg, 1);
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if (ret != 1)
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dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
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2008-04-08 20:20:00 -06:00
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__func__, reg, data, ret);
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2006-08-08 06:10:10 -06:00
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return (ret != 1) ? ret : 0;
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}
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static int tda10086_read_byte(struct tda10086_state *state, int reg)
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{
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int ret;
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u8 b0[] = { reg };
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u8 b1[] = { 0 };
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struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
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{ .flags = I2C_M_RD, .buf = b1, .len = 1 }};
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msg[0].addr = state->config->demod_address;
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msg[1].addr = state->config->demod_address;
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ret = i2c_transfer(state->i2c, msg, 2);
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if (ret != 2) {
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2008-04-08 20:20:00 -06:00
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dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg,
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2006-08-08 06:10:10 -06:00
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ret);
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return ret;
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}
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return b1[0];
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}
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static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
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{
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int val;
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2008-04-13 18:09:11 -06:00
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/* read a byte and check */
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2006-08-08 06:10:10 -06:00
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val = tda10086_read_byte(state, reg);
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if (val < 0)
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return val;
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2008-04-13 18:09:11 -06:00
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/* mask if off */
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2006-08-08 06:10:10 -06:00
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val = val & ~mask;
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val |= data & 0xff;
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2008-04-13 18:09:11 -06:00
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/* write it out again */
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2006-08-08 06:10:10 -06:00
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return tda10086_write_byte(state, reg, val);
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}
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static int tda10086_init(struct dvb_frontend* fe)
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{
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struct tda10086_state* state = fe->demodulator_priv;
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2008-02-09 19:54:24 -07:00
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u8 t22k_off = 0x80;
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2006-08-08 06:10:10 -06:00
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2008-04-08 20:20:00 -06:00
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dprintk ("%s\n", __func__);
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2006-08-08 06:10:10 -06:00
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2008-02-09 19:54:24 -07:00
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if (state->config->diseqc_tone)
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t22k_off = 0;
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2008-04-13 18:09:11 -06:00
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/* reset */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x00, 0x00);
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msleep(10);
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2008-04-13 18:09:11 -06:00
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/* misc setup */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x01, 0x94);
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
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2007-05-28 15:06:27 -06:00
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tda10086_write_byte(state, 0x03, 0xe4);
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x04, 0x43);
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tda10086_write_byte(state, 0x0c, 0x0c);
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
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tda10086_write_byte(state, 0x20, 0x89); /* misc */
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tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
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tda10086_write_byte(state, 0x32, 0x00); /* irq off */
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tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
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/* setup PLL (this assumes SACLK = 96MHz) */
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tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
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2008-04-09 20:07:11 -06:00
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if (state->config->xtal_freq == TDA10086_XTAL_16M) {
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
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tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
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2008-04-09 20:07:11 -06:00
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} else {
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
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tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
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2008-04-09 20:07:11 -06:00
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}
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2008-04-13 18:09:11 -06:00
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tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
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2006-08-08 06:10:10 -06:00
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2008-04-13 18:09:11 -06:00
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/* setup TS interface */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x11, 0x81);
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tda10086_write_byte(state, 0x12, 0x81);
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
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tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
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tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x10, 0x2a);
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2008-04-13 18:09:11 -06:00
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/* setup ADC */
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tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
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tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
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2006-08-08 06:10:10 -06:00
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2008-04-13 18:09:11 -06:00
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/* setup AGC */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x05, 0x0B);
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tda10086_write_byte(state, 0x37, 0x63);
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2008-04-13 18:09:11 -06:00
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tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x40, 0x64);
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tda10086_write_byte(state, 0x41, 0x4f);
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tda10086_write_byte(state, 0x42, 0x43);
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2008-04-13 18:09:11 -06:00
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/* setup viterbi */
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tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
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2006-08-08 06:10:10 -06:00
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2008-04-13 18:09:11 -06:00
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/* setup carrier recovery */
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2006-08-08 06:10:10 -06:00
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tda10086_write_byte(state, 0x3d, 0x80);
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2008-04-13 18:09:11 -06:00
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/* setup SEC */
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tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
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tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
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tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
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2006-08-08 06:10:10 -06:00
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return 0;
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}
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static void tda10086_diseqc_wait(struct tda10086_state *state)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(200);
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while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
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if(time_after(jiffies, timeout)) {
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2008-04-08 20:20:00 -06:00
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printk("%s: diseqc queue not ready, command may be lost.\n", __func__);
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2006-08-08 06:10:10 -06:00
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break;
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}
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msleep(10);
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}
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}
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2015-06-07 11:53:52 -06:00
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static int tda10086_set_tone(struct dvb_frontend *fe,
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enum fe_sec_tone_mode tone)
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2006-08-08 06:10:10 -06:00
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{
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struct tda10086_state* state = fe->demodulator_priv;
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2008-02-09 19:54:24 -07:00
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u8 t22k_off = 0x80;
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2006-08-08 06:10:10 -06:00
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2008-04-08 20:20:00 -06:00
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dprintk ("%s\n", __func__);
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2006-08-08 06:10:10 -06:00
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2008-02-09 19:54:24 -07:00
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if (state->config->diseqc_tone)
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t22k_off = 0;
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2007-11-08 04:54:53 -07:00
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switch (tone) {
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2006-08-08 06:10:10 -06:00
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case SEC_TONE_OFF:
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2008-02-09 19:54:24 -07:00
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tda10086_write_byte(state, 0x36, t22k_off);
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2006-08-08 06:10:10 -06:00
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break;
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case SEC_TONE_ON:
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2008-02-09 19:54:24 -07:00
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tda10086_write_byte(state, 0x36, 0x01 + t22k_off);
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2006-08-08 06:10:10 -06:00
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break;
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}
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return 0;
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}
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static int tda10086_send_master_cmd (struct dvb_frontend* fe,
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struct dvb_diseqc_master_cmd* cmd)
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{
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struct tda10086_state* state = fe->demodulator_priv;
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int i;
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u8 oldval;
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2008-02-09 19:54:24 -07:00
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u8 t22k_off = 0x80;
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2006-08-08 06:10:10 -06:00
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2008-04-08 20:20:00 -06:00
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dprintk ("%s\n", __func__);
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2006-08-08 06:10:10 -06:00
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2008-02-09 19:54:24 -07:00
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if (state->config->diseqc_tone)
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t22k_off = 0;
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2006-08-08 06:10:10 -06:00
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if (cmd->msg_len > 6)
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return -EINVAL;
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oldval = tda10086_read_byte(state, 0x36);
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for(i=0; i< cmd->msg_len; i++) {
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tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
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}
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2008-02-09 19:54:24 -07:00
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tda10086_write_byte(state, 0x36, (0x08 + t22k_off)
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| ((cmd->msg_len - 1) << 4));
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2006-08-08 06:10:10 -06:00
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tda10086_diseqc_wait(state);
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tda10086_write_byte(state, 0x36, oldval);
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return 0;
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}
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2015-06-07 11:53:52 -06:00
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static int tda10086_send_burst(struct dvb_frontend *fe,
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enum fe_sec_mini_cmd minicmd)
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2006-08-08 06:10:10 -06:00
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{
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struct tda10086_state* state = fe->demodulator_priv;
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u8 oldval = tda10086_read_byte(state, 0x36);
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2008-02-09 19:54:24 -07:00
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u8 t22k_off = 0x80;
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2006-08-08 06:10:10 -06:00
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2008-04-08 20:20:00 -06:00
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dprintk ("%s\n", __func__);
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2006-08-08 06:10:10 -06:00
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2008-02-09 19:54:24 -07:00
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if (state->config->diseqc_tone)
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t22k_off = 0;
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2006-08-08 06:10:10 -06:00
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switch(minicmd) {
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case SEC_MINI_A:
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2008-02-09 19:54:24 -07:00
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tda10086_write_byte(state, 0x36, 0x04 + t22k_off);
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2006-08-08 06:10:10 -06:00
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break;
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case SEC_MINI_B:
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2008-02-09 19:54:24 -07:00
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tda10086_write_byte(state, 0x36, 0x06 + t22k_off);
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2006-08-08 06:10:10 -06:00
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break;
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}
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tda10086_diseqc_wait(state);
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tda10086_write_byte(state, 0x36, oldval);
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return 0;
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}
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static int tda10086_set_inversion(struct tda10086_state *state,
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2011-12-26 10:51:41 -07:00
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struct dtv_frontend_properties *fe_params)
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2006-08-08 06:10:10 -06:00
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{
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u8 invval = 0x80;
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|
2008-04-08 20:20:00 -06:00
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dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert);
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2006-08-08 06:10:10 -06:00
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switch(fe_params->inversion) {
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case INVERSION_OFF:
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if (state->config->invert)
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invval = 0x40;
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break;
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case INVERSION_ON:
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if (!state->config->invert)
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invval = 0x40;
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break;
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case INVERSION_AUTO:
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invval = 0x00;
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break;
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}
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|
|
tda10086_write_mask(state, 0x0c, 0xc0, invval);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_set_symbol_rate(struct tda10086_state *state,
|
2011-12-26 10:51:41 -07:00
|
|
|
struct dtv_frontend_properties *fe_params)
|
2006-08-08 06:10:10 -06:00
|
|
|
{
|
|
|
|
u8 dfn = 0;
|
|
|
|
u8 afs = 0;
|
|
|
|
u8 byp = 0;
|
|
|
|
u8 reg37 = 0x43;
|
|
|
|
u8 reg42 = 0x43;
|
|
|
|
u64 big;
|
|
|
|
u32 tmp;
|
|
|
|
u32 bdr;
|
|
|
|
u32 bdri;
|
2011-12-26 10:51:41 -07:00
|
|
|
u32 symbol_rate = fe_params->symbol_rate;
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s %i\n", __func__, symbol_rate);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* setup the decimation and anti-aliasing filters.. */
|
2006-08-08 06:10:10 -06:00
|
|
|
if (symbol_rate < (u32) (SACLK * 0.0137)) {
|
|
|
|
dfn=4;
|
|
|
|
afs=1;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.0208)) {
|
|
|
|
dfn=4;
|
|
|
|
afs=0;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.0270)) {
|
|
|
|
dfn=3;
|
|
|
|
afs=1;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.0416)) {
|
|
|
|
dfn=3;
|
|
|
|
afs=0;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.0550)) {
|
|
|
|
dfn=2;
|
|
|
|
afs=1;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.0833)) {
|
|
|
|
dfn=2;
|
|
|
|
afs=0;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.1100)) {
|
|
|
|
dfn=1;
|
|
|
|
afs=1;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.1666)) {
|
|
|
|
dfn=1;
|
|
|
|
afs=0;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.2200)) {
|
|
|
|
dfn=0;
|
|
|
|
afs=1;
|
|
|
|
} else if (symbol_rate < (u32) (SACLK * 0.3333)) {
|
|
|
|
dfn=0;
|
|
|
|
afs=0;
|
|
|
|
} else {
|
|
|
|
reg37 = 0x63;
|
|
|
|
reg42 = 0x4f;
|
|
|
|
byp=1;
|
|
|
|
}
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* calculate BDR */
|
2006-08-08 06:10:10 -06:00
|
|
|
big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
|
|
|
|
big += ((SACLK/1000ULL)-1ULL);
|
|
|
|
do_div(big, (SACLK/1000ULL));
|
|
|
|
bdr = big & 0xfffff;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* calculate BDRI */
|
2006-08-08 06:10:10 -06:00
|
|
|
tmp = (1<<dfn)*(symbol_rate/1000);
|
|
|
|
bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
|
|
|
|
|
|
|
|
tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
|
|
|
|
tda10086_write_mask(state, 0x20, 0x08, byp << 3);
|
|
|
|
tda10086_write_byte(state, 0x06, bdr);
|
|
|
|
tda10086_write_byte(state, 0x07, bdr >> 8);
|
|
|
|
tda10086_write_byte(state, 0x08, bdr >> 16);
|
|
|
|
tda10086_write_byte(state, 0x09, bdri);
|
|
|
|
tda10086_write_byte(state, 0x37, reg37);
|
|
|
|
tda10086_write_byte(state, 0x42, reg42);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_set_fec(struct tda10086_state *state,
|
2011-12-26 10:51:41 -07:00
|
|
|
struct dtv_frontend_properties *fe_params)
|
2006-08-08 06:10:10 -06:00
|
|
|
{
|
|
|
|
u8 fecval;
|
|
|
|
|
2011-12-26 10:51:41 -07:00
|
|
|
dprintk("%s %i\n", __func__, fe_params->fec_inner);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2011-12-26 10:51:41 -07:00
|
|
|
switch (fe_params->fec_inner) {
|
2006-08-08 06:10:10 -06:00
|
|
|
case FEC_1_2:
|
|
|
|
fecval = 0x00;
|
|
|
|
break;
|
|
|
|
case FEC_2_3:
|
|
|
|
fecval = 0x01;
|
|
|
|
break;
|
|
|
|
case FEC_3_4:
|
|
|
|
fecval = 0x02;
|
|
|
|
break;
|
|
|
|
case FEC_4_5:
|
|
|
|
fecval = 0x03;
|
|
|
|
break;
|
|
|
|
case FEC_5_6:
|
|
|
|
fecval = 0x04;
|
|
|
|
break;
|
|
|
|
case FEC_6_7:
|
|
|
|
fecval = 0x05;
|
|
|
|
break;
|
|
|
|
case FEC_7_8:
|
|
|
|
fecval = 0x06;
|
|
|
|
break;
|
|
|
|
case FEC_8_9:
|
|
|
|
fecval = 0x07;
|
|
|
|
break;
|
|
|
|
case FEC_AUTO:
|
|
|
|
fecval = 0x08;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
tda10086_write_byte(state, 0x0d, fecval);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-26 10:51:41 -07:00
|
|
|
static int tda10086_set_frontend(struct dvb_frontend *fe)
|
2006-08-08 06:10:10 -06:00
|
|
|
{
|
2011-12-26 10:51:41 -07:00
|
|
|
struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
|
2006-08-08 06:10:10 -06:00
|
|
|
struct tda10086_state *state = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
u32 freq = 0;
|
|
|
|
int freqoff;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* modify parameters for tuning */
|
2007-05-28 15:06:27 -06:00
|
|
|
tda10086_write_byte(state, 0x02, 0x35);
|
|
|
|
state->has_lock = false;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* set params */
|
2006-08-08 06:10:10 -06:00
|
|
|
if (fe->ops.tuner_ops.set_params) {
|
2011-12-24 08:24:33 -07:00
|
|
|
fe->ops.tuner_ops.set_params(fe);
|
2006-08-08 06:10:10 -06:00
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
|
|
|
|
|
if (fe->ops.tuner_ops.get_frequency)
|
|
|
|
fe->ops.tuner_ops.get_frequency(fe, &freq);
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
|
}
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* calcluate the frequency offset (in *Hz* not kHz) */
|
2006-08-08 06:10:10 -06:00
|
|
|
freqoff = fe_params->frequency - freq;
|
|
|
|
freqoff = ((1<<16) * freqoff) / (SACLK/1000);
|
|
|
|
tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
|
|
|
|
tda10086_write_byte(state, 0x3e, freqoff);
|
|
|
|
|
|
|
|
if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
|
|
|
|
return ret;
|
|
|
|
if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
|
|
|
|
return ret;
|
|
|
|
if ((ret = tda10086_set_fec(state, fe_params)) < 0)
|
|
|
|
return ret;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* soft reset + disable TS output until lock */
|
2006-08-08 06:10:10 -06:00
|
|
|
tda10086_write_mask(state, 0x10, 0x40, 0x40);
|
|
|
|
tda10086_write_mask(state, 0x00, 0x01, 0x00);
|
|
|
|
|
2011-12-26 10:51:41 -07:00
|
|
|
state->symbol_rate = fe_params->symbol_rate;
|
2006-08-08 06:10:10 -06:00
|
|
|
state->frequency = fe_params->frequency;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-04 07:58:30 -07:00
|
|
|
static int tda10086_get_frontend(struct dvb_frontend *fe,
|
|
|
|
struct dtv_frontend_properties *fe_params)
|
2006-08-08 06:10:10 -06:00
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
u8 val;
|
|
|
|
int tmp;
|
|
|
|
u64 tmp64;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* check for invalid symbol rate */
|
2011-12-26 10:51:41 -07:00
|
|
|
if (fe_params->symbol_rate < 500000)
|
2006-11-22 14:01:21 -07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* calculate the updated frequency (note: we convert from Hz->kHz) */
|
2015-04-29 12:48:10 -06:00
|
|
|
tmp64 = ((u64)tda10086_read_byte(state, 0x52)
|
|
|
|
| (tda10086_read_byte(state, 0x51) << 8));
|
2006-08-08 06:10:10 -06:00
|
|
|
if (tmp64 & 0x8000)
|
|
|
|
tmp64 |= 0xffffffffffff0000ULL;
|
|
|
|
tmp64 = (tmp64 * (SACLK/1000ULL));
|
|
|
|
do_div(tmp64, (1ULL<<15) * (1ULL<<1));
|
|
|
|
fe_params->frequency = (int) state->frequency + (int) tmp64;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* the inversion */
|
2006-08-08 06:10:10 -06:00
|
|
|
val = tda10086_read_byte(state, 0x0c);
|
|
|
|
if (val & 0x80) {
|
|
|
|
switch(val & 0x40) {
|
|
|
|
case 0x00:
|
|
|
|
fe_params->inversion = INVERSION_OFF;
|
|
|
|
if (state->config->invert)
|
|
|
|
fe_params->inversion = INVERSION_ON;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
fe_params->inversion = INVERSION_ON;
|
|
|
|
if (state->config->invert)
|
|
|
|
fe_params->inversion = INVERSION_OFF;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
tda10086_read_byte(state, 0x0f);
|
|
|
|
switch(val & 0x02) {
|
|
|
|
case 0x00:
|
|
|
|
fe_params->inversion = INVERSION_OFF;
|
|
|
|
if (state->config->invert)
|
|
|
|
fe_params->inversion = INVERSION_ON;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
fe_params->inversion = INVERSION_ON;
|
|
|
|
if (state->config->invert)
|
|
|
|
fe_params->inversion = INVERSION_OFF;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* calculate the updated symbol rate */
|
2006-08-08 06:10:10 -06:00
|
|
|
tmp = tda10086_read_byte(state, 0x1d);
|
|
|
|
if (tmp & 0x80)
|
|
|
|
tmp |= 0xffffff00;
|
|
|
|
tmp = (tmp * 480 * (1<<1)) / 128;
|
|
|
|
tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->symbol_rate = state->symbol_rate + tmp;
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* the FEC */
|
2006-08-08 06:10:10 -06:00
|
|
|
val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
|
|
|
|
switch(val) {
|
|
|
|
case 0x00:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_1_2;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x01:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_2_3;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x02:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_3_4;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x03:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_4_5;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x04:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_5_6;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x05:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_6_7;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x06:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_7_8;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
case 0x07:
|
2011-12-26 10:51:41 -07:00
|
|
|
fe_params->fec_inner = FEC_8_9;
|
2006-08-08 06:10:10 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-07 11:53:52 -06:00
|
|
|
static int tda10086_read_status(struct dvb_frontend *fe,
|
|
|
|
enum fe_status *fe_status)
|
2006-08-08 06:10:10 -06:00
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
u8 val;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
|
|
|
val = tda10086_read_byte(state, 0x0e);
|
|
|
|
*fe_status = 0;
|
|
|
|
if (val & 0x01)
|
|
|
|
*fe_status |= FE_HAS_SIGNAL;
|
|
|
|
if (val & 0x02)
|
|
|
|
*fe_status |= FE_HAS_CARRIER;
|
|
|
|
if (val & 0x04)
|
|
|
|
*fe_status |= FE_HAS_VITERBI;
|
|
|
|
if (val & 0x08)
|
|
|
|
*fe_status |= FE_HAS_SYNC;
|
2007-05-28 15:06:27 -06:00
|
|
|
if (val & 0x10) {
|
2006-08-08 06:10:10 -06:00
|
|
|
*fe_status |= FE_HAS_LOCK;
|
2007-05-28 15:06:27 -06:00
|
|
|
if (!state->has_lock) {
|
|
|
|
state->has_lock = true;
|
2008-04-13 18:09:11 -06:00
|
|
|
/* modify parameters for stable reception */
|
2007-05-28 15:06:27 -06:00
|
|
|
tda10086_write_byte(state, 0x02, 0x00);
|
|
|
|
}
|
|
|
|
}
|
2006-08-08 06:10:10 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
u8 _str;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2007-05-28 15:06:27 -06:00
|
|
|
_str = 0xff - tda10086_read_byte(state, 0x43);
|
2006-08-08 06:10:10 -06:00
|
|
|
*signal = (_str << 8) | _str;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
u8 _snr;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2007-05-28 15:06:27 -06:00
|
|
|
_snr = 0xff - tda10086_read_byte(state, 0x1c);
|
2006-08-08 06:10:10 -06:00
|
|
|
*snr = (_snr << 8) | _snr;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* read it */
|
2006-08-08 06:10:10 -06:00
|
|
|
*ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
|
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* reset counter */
|
2006-08-08 06:10:10 -06:00
|
|
|
tda10086_write_byte(state, 0x18, 0x00);
|
|
|
|
tda10086_write_byte(state, 0x18, 0x80);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
2008-04-13 18:09:11 -06:00
|
|
|
/* read it */
|
2006-08-08 06:10:10 -06:00
|
|
|
*ber = 0;
|
|
|
|
*ber |= tda10086_read_byte(state, 0x15);
|
|
|
|
*ber |= tda10086_read_byte(state, 0x16) << 8;
|
|
|
|
*ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_sleep(struct dvb_frontend* fe)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
|
|
|
tda10086_write_mask(state, 0x00, 0x08, 0x08);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
|
|
|
|
{
|
|
|
|
struct tda10086_state* state = fe->demodulator_priv;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
|
|
|
if (enable) {
|
|
|
|
tda10086_write_mask(state, 0x00, 0x10, 0x10);
|
|
|
|
} else {
|
|
|
|
tda10086_write_mask(state, 0x00, 0x10, 0x00);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
|
|
|
|
{
|
2011-12-26 12:59:09 -07:00
|
|
|
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
|
|
|
|
|
|
|
if (p->symbol_rate > 20000000) {
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->min_delay_ms = 50;
|
|
|
|
fesettings->step_size = 2000;
|
|
|
|
fesettings->max_drift = 8000;
|
2011-12-26 12:59:09 -07:00
|
|
|
} else if (p->symbol_rate > 12000000) {
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->min_delay_ms = 100;
|
|
|
|
fesettings->step_size = 1500;
|
|
|
|
fesettings->max_drift = 9000;
|
2011-12-26 12:59:09 -07:00
|
|
|
} else if (p->symbol_rate > 8000000) {
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->min_delay_ms = 100;
|
|
|
|
fesettings->step_size = 1000;
|
|
|
|
fesettings->max_drift = 8000;
|
2011-12-26 12:59:09 -07:00
|
|
|
} else if (p->symbol_rate > 4000000) {
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->min_delay_ms = 100;
|
|
|
|
fesettings->step_size = 500;
|
|
|
|
fesettings->max_drift = 7000;
|
2011-12-26 12:59:09 -07:00
|
|
|
} else if (p->symbol_rate > 2000000) {
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->min_delay_ms = 200;
|
2011-12-26 12:59:09 -07:00
|
|
|
fesettings->step_size = p->symbol_rate / 8000;
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->max_drift = 14 * fesettings->step_size;
|
|
|
|
} else {
|
|
|
|
fesettings->min_delay_ms = 200;
|
2011-12-26 12:59:09 -07:00
|
|
|
fesettings->step_size = p->symbol_rate / 8000;
|
2006-08-08 06:10:10 -06:00
|
|
|
fesettings->max_drift = 18 * fesettings->step_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tda10086_release(struct dvb_frontend* fe)
|
|
|
|
{
|
|
|
|
struct tda10086_state *state = fe->demodulator_priv;
|
|
|
|
tda10086_sleep(fe);
|
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
2016-08-09 15:32:21 -06:00
|
|
|
static const struct dvb_frontend_ops tda10086_ops = {
|
2011-12-26 10:51:41 -07:00
|
|
|
.delsys = { SYS_DVBS },
|
2006-08-08 06:10:10 -06:00
|
|
|
.info = {
|
|
|
|
.name = "Philips TDA10086 DVB-S",
|
|
|
|
.frequency_min = 950000,
|
|
|
|
.frequency_max = 2150000,
|
|
|
|
.frequency_stepsize = 125, /* kHz for QPSK frontends */
|
|
|
|
.symbol_rate_min = 1000000,
|
|
|
|
.symbol_rate_max = 45000000,
|
|
|
|
.caps = FE_CAN_INVERSION_AUTO |
|
|
|
|
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
|
|
FE_CAN_QPSK
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = tda10086_release,
|
|
|
|
|
|
|
|
.init = tda10086_init,
|
|
|
|
.sleep = tda10086_sleep,
|
|
|
|
.i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
|
|
|
|
|
2011-12-26 10:51:41 -07:00
|
|
|
.set_frontend = tda10086_set_frontend,
|
|
|
|
.get_frontend = tda10086_get_frontend,
|
2006-08-08 06:10:10 -06:00
|
|
|
.get_tune_settings = tda10086_get_tune_settings,
|
|
|
|
|
|
|
|
.read_status = tda10086_read_status,
|
|
|
|
.read_ber = tda10086_read_ber,
|
|
|
|
.read_signal_strength = tda10086_read_signal_strength,
|
|
|
|
.read_snr = tda10086_read_snr,
|
|
|
|
.read_ucblocks = tda10086_read_ucblocks,
|
|
|
|
|
|
|
|
.diseqc_send_master_cmd = tda10086_send_master_cmd,
|
|
|
|
.diseqc_send_burst = tda10086_send_burst,
|
|
|
|
.set_tone = tda10086_set_tone,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
|
|
|
|
struct i2c_adapter* i2c)
|
|
|
|
{
|
|
|
|
struct tda10086_state *state;
|
|
|
|
|
2008-04-08 20:20:00 -06:00
|
|
|
dprintk ("%s\n", __func__);
|
2006-08-08 06:10:10 -06:00
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
2009-08-10 19:51:01 -06:00
|
|
|
state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL);
|
2006-08-08 06:10:10 -06:00
|
|
|
if (!state)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->config = config;
|
|
|
|
state->i2c = i2c;
|
|
|
|
|
|
|
|
/* check if the demod is there */
|
|
|
|
if (tda10086_read_byte(state, 0x1e) != 0xe1) {
|
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* create dvb_frontend */
|
|
|
|
memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
|
|
|
|
state->frontend.demodulator_priv = state;
|
|
|
|
return &state->frontend;
|
|
|
|
}
|
|
|
|
|
|
|
|
module_param(debug, int, 0644);
|
|
|
|
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
|
|
|
|
MODULE_AUTHOR("Andrew de Quincey");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(tda10086_attach);
|