2019-06-20 10:28:46 -06:00
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// SPDX-License-Identifier: GPL-2.0
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2006-06-26 09:31:49 -06:00
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/*
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* drivers/char/watchdog/pnx4008_wdt.c
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*
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* Watchdog driver for PNX4008 board
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*
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* Authors: Dmitry Chigirev <source@mvista.com>,
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2011-02-23 13:04:38 -07:00
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* Vitaly Wool <vitalywool@gmail.com>
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2006-06-26 09:31:49 -06:00
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* Based on sa1100 driver,
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* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
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*
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2012-02-02 10:48:11 -07:00
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* 2005-2006 (c) MontaVista Software, Inc.
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*
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* (C) 2012 Wolfram Sang, Pengutronix
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2006-06-26 09:31:49 -06:00
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*/
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2012-02-15 16:06:19 -07:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2006-06-26 09:31:49 -06:00
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/watchdog.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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2006-09-10 04:48:15 -06:00
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#include <linux/spinlock.h>
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2008-05-19 07:07:48 -06:00
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#include <linux/io.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2012-02-02 10:48:11 -07:00
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#include <linux/err.h>
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2012-04-20 13:55:29 -06:00
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#include <linux/of.h>
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2016-03-04 11:44:06 -07:00
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#include <linux/delay.h>
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#include <linux/reboot.h>
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2008-08-05 09:14:15 -06:00
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#include <mach/hardware.h>
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2006-06-26 09:31:49 -06:00
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/* WatchDog Timer - Chapter 23 Page 207 */
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#define DEFAULT_HEARTBEAT 19
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#define MAX_HEARTBEAT 60
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/* Watchdog timer register set definition */
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#define WDTIM_INT(p) ((p) + 0x0)
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#define WDTIM_CTRL(p) ((p) + 0x4)
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#define WDTIM_COUNTER(p) ((p) + 0x8)
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#define WDTIM_MCTRL(p) ((p) + 0xC)
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#define WDTIM_MATCH0(p) ((p) + 0x10)
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#define WDTIM_EMR(p) ((p) + 0x14)
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#define WDTIM_PULSE(p) ((p) + 0x18)
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#define WDTIM_RES(p) ((p) + 0x1C)
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/* WDTIM_INT bit definitions */
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#define MATCH_INT 1
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/* WDTIM_CTRL bit definitions */
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#define COUNT_ENAB 1
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2009-03-18 02:35:09 -06:00
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#define RESET_COUNT (1 << 1)
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#define DEBUG_EN (1 << 2)
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2006-06-26 09:31:49 -06:00
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/* WDTIM_MCTRL bit definitions */
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#define MR0_INT 1
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#undef RESET_COUNT0
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2009-03-18 02:35:09 -06:00
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#define RESET_COUNT0 (1 << 2)
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#define STOP_COUNT0 (1 << 2)
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#define M_RES1 (1 << 3)
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#define M_RES2 (1 << 4)
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#define RESFRC1 (1 << 5)
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#define RESFRC2 (1 << 6)
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2006-06-26 09:31:49 -06:00
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/* WDTIM_EMR bit definitions */
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#define EXT_MATCH0 1
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2009-03-18 02:35:09 -06:00
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#define MATCH_OUTPUT_HIGH (2 << 4) /*a MATCH_CTRL setting */
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2006-06-26 09:31:49 -06:00
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/* WDTIM_RES bit definitions */
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#define WDOG_RESET 1 /* read only */
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#define WDOG_COUNTER_RATE 13000000 /*the counter clock is 13 MHz fixed */
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2012-03-05 08:51:11 -07:00
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static bool nowayout = WATCHDOG_NOWAYOUT;
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2018-02-11 13:08:44 -07:00
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static unsigned int heartbeat;
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2006-06-26 09:31:49 -06:00
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2007-11-01 17:27:08 -06:00
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static DEFINE_SPINLOCK(io_lock);
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2006-06-26 09:31:49 -06:00
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static void __iomem *wdt_base;
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2015-10-27 18:55:35 -06:00
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static struct clk *wdt_clk;
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2006-06-26 09:31:49 -06:00
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2012-02-02 10:48:11 -07:00
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static int pnx4008_wdt_start(struct watchdog_device *wdd)
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2006-06-26 09:31:49 -06:00
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{
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2006-09-10 04:48:15 -06:00
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spin_lock(&io_lock);
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2006-06-26 09:31:49 -06:00
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/* stop counter, initiate counter reset */
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2012-02-02 10:48:09 -07:00
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writel(RESET_COUNT, WDTIM_CTRL(wdt_base));
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2006-06-26 09:31:49 -06:00
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/*wait for reset to complete. 100% guarantee event */
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2012-02-02 10:48:09 -07:00
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while (readl(WDTIM_COUNTER(wdt_base)))
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2006-09-11 04:42:39 -06:00
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cpu_relax();
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2006-06-26 09:31:49 -06:00
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/* internal and external reset, stop after that */
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2012-02-02 10:48:09 -07:00
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writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0, WDTIM_MCTRL(wdt_base));
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2006-06-26 09:31:49 -06:00
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/* configure match output */
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2012-02-02 10:48:09 -07:00
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writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base));
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2006-06-26 09:31:49 -06:00
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/* clear interrupt, just in case */
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2012-02-02 10:48:09 -07:00
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writel(MATCH_INT, WDTIM_INT(wdt_base));
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2006-06-26 09:31:49 -06:00
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/* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */
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2012-02-02 10:48:09 -07:00
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writel(0xFFFF, WDTIM_PULSE(wdt_base));
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2012-02-02 10:48:11 -07:00
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writel(wdd->timeout * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base));
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2006-06-26 09:31:49 -06:00
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/*enable counter, stop when debugger active */
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2012-02-02 10:48:09 -07:00
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writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base));
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2006-09-10 04:48:15 -06:00
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spin_unlock(&io_lock);
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2012-02-02 10:48:11 -07:00
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return 0;
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2006-06-26 09:31:49 -06:00
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}
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2012-02-02 10:48:11 -07:00
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static int pnx4008_wdt_stop(struct watchdog_device *wdd)
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2006-06-26 09:31:49 -06:00
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{
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2006-09-10 04:48:15 -06:00
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spin_lock(&io_lock);
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2012-02-02 10:48:09 -07:00
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writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */
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2006-09-10 04:48:15 -06:00
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spin_unlock(&io_lock);
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2012-02-02 10:48:11 -07:00
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return 0;
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2006-06-26 09:31:49 -06:00
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}
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2012-02-02 10:48:11 -07:00
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static int pnx4008_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int new_timeout)
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2006-06-26 09:31:49 -06:00
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{
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2012-02-29 12:20:58 -07:00
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wdd->timeout = new_timeout;
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2012-02-02 10:48:11 -07:00
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return 0;
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2006-06-26 09:31:49 -06:00
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}
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2016-03-04 11:44:06 -07:00
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static int pnx4008_restart_handler(struct watchdog_device *wdd,
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unsigned long mode, void *cmd)
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{
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2016-03-04 11:44:08 -07:00
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const char *boot_cmd = cmd;
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/*
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* Verify if a "cmd" passed from the userspace program rebooting
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* the system; if available, handle it.
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* - For details, see the 'reboot' syscall in kernel/reboot.c
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* - If the received "cmd" is not supported, use the default mode.
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*/
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if (boot_cmd) {
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if (boot_cmd[0] == 'h')
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mode = REBOOT_HARD;
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else if (boot_cmd[0] == 's')
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mode = REBOOT_SOFT;
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}
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2016-03-04 11:44:07 -07:00
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if (mode == REBOOT_SOFT) {
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/* Force match output active */
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writel(EXT_MATCH0, WDTIM_EMR(wdt_base));
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/* Internal reset on match output (RESOUT_N not asserted) */
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writel(M_RES1, WDTIM_MCTRL(wdt_base));
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} else {
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/* Instant assert of RESETOUT_N with pulse length 1mS */
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writel(13000, WDTIM_PULSE(wdt_base));
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writel(M_RES2 | RESFRC1 | RESFRC2, WDTIM_MCTRL(wdt_base));
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}
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2016-03-04 11:44:06 -07:00
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/* Wait for watchdog to reset system */
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mdelay(1000);
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return NOTIFY_DONE;
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}
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2012-02-02 10:48:11 -07:00
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static const struct watchdog_info pnx4008_wdt_ident = {
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2006-06-26 09:31:49 -06:00
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.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE |
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WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PNX4008 Watchdog",
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};
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2012-02-02 10:48:11 -07:00
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static const struct watchdog_ops pnx4008_wdt_ops = {
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2006-06-26 09:31:49 -06:00
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.owner = THIS_MODULE,
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2012-02-02 10:48:11 -07:00
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.start = pnx4008_wdt_start,
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.stop = pnx4008_wdt_stop,
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.set_timeout = pnx4008_wdt_set_timeout,
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2016-03-04 11:44:06 -07:00
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.restart = pnx4008_restart_handler,
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2006-06-26 09:31:49 -06:00
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};
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2012-02-02 10:48:11 -07:00
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static struct watchdog_device pnx4008_wdd = {
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.info = &pnx4008_wdt_ident,
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.ops = &pnx4008_wdt_ops,
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2013-02-14 01:14:25 -07:00
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.timeout = DEFAULT_HEARTBEAT,
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2012-02-02 10:48:11 -07:00
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.min_timeout = 1,
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.max_timeout = MAX_HEARTBEAT,
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2006-06-26 09:31:49 -06:00
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};
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2019-04-10 10:28:03 -06:00
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static void pnx4008_clk_disable_unprepare(void *data)
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{
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clk_disable_unprepare(data);
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}
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2012-11-19 11:21:41 -07:00
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static int pnx4008_wdt_probe(struct platform_device *pdev)
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2006-06-26 09:31:49 -06:00
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{
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2019-04-10 10:28:03 -06:00
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struct device *dev = &pdev->dev;
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2012-02-02 10:48:08 -07:00
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int ret = 0;
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2006-06-26 09:31:49 -06:00
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2019-04-10 10:28:03 -06:00
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watchdog_init_timeout(&pnx4008_wdd, heartbeat, dev);
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2006-06-26 09:31:49 -06:00
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watchdog: Convert to use devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to reduce source code size,
improve readability, and reduce the likelyhood of bugs.
The conversion was done automatically with coccinelle using the
following semantic patch.
@r@
identifier res, pdev;
expression a;
expression index;
expression e;
@@
<+...
- res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(e, res);
+ a = devm_platform_ioremap_resource(pdev, index);
...+>
@depends on r@
identifier r.res;
@@
- struct resource *res;
... when != res
@@
identifier res, pdev;
expression index;
expression a;
@@
- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(&pdev->dev, res);
+ a = devm_platform_ioremap_resource(pdev, index);
Cc: Joel Stanley <joel@jms.id.au>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Keguang Zhang <keguang.zhang@gmail.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Nancy Yuen <yuenn@google.com>
Cc: Brendan Higgins <brendanhiggins@google.com>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Barry Song <baohua@kernel.org>
Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Michal Simek <michal.simek@xilinx.com> (cadence/xilinx wdts)
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2019-04-02 13:01:53 -06:00
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wdt_base = devm_platform_ioremap_resource(pdev, 0);
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2013-01-21 03:09:25 -07:00
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if (IS_ERR(wdt_base))
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return PTR_ERR(wdt_base);
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2006-06-26 09:31:49 -06:00
|
|
|
|
2019-04-10 10:28:03 -06:00
|
|
|
wdt_clk = devm_clk_get(dev, NULL);
|
2012-02-02 10:48:08 -07:00
|
|
|
if (IS_ERR(wdt_clk))
|
|
|
|
return PTR_ERR(wdt_clk);
|
2009-11-20 06:04:14 -07:00
|
|
|
|
2015-10-17 12:28:16 -06:00
|
|
|
ret = clk_prepare_enable(wdt_clk);
|
2012-02-02 10:48:08 -07:00
|
|
|
if (ret)
|
2013-04-29 03:16:14 -06:00
|
|
|
return ret;
|
2019-04-10 10:28:03 -06:00
|
|
|
ret = devm_add_action_or_reset(dev, pnx4008_clk_disable_unprepare,
|
|
|
|
wdt_clk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2012-02-02 10:48:08 -07:00
|
|
|
|
2012-02-02 10:48:11 -07:00
|
|
|
pnx4008_wdd.bootstatus = (readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ?
|
2012-02-02 10:48:09 -07:00
|
|
|
WDIOF_CARDRESET : 0;
|
2019-04-10 10:28:03 -06:00
|
|
|
pnx4008_wdd.parent = dev;
|
2012-02-02 10:48:11 -07:00
|
|
|
watchdog_set_nowayout(&pnx4008_wdd, nowayout);
|
2016-03-04 11:44:06 -07:00
|
|
|
watchdog_set_restart_priority(&pnx4008_wdd, 128);
|
2012-02-02 10:48:11 -07:00
|
|
|
|
2019-04-11 13:14:37 -06:00
|
|
|
if (readl(WDTIM_CTRL(wdt_base)) & COUNT_ENAB)
|
|
|
|
set_bit(WDOG_HW_RUNNING, &pnx4008_wdd.status);
|
2006-06-26 09:31:49 -06:00
|
|
|
|
2019-04-10 10:28:03 -06:00
|
|
|
ret = devm_watchdog_register_device(dev, &pnx4008_wdd);
|
2019-05-18 15:27:47 -06:00
|
|
|
if (ret < 0)
|
2019-04-10 10:28:03 -06:00
|
|
|
return ret;
|
2006-06-26 09:31:49 -06:00
|
|
|
|
2019-04-10 10:28:03 -06:00
|
|
|
dev_info(dev, "heartbeat %d sec\n", pnx4008_wdd.timeout);
|
2009-11-20 06:04:14 -07:00
|
|
|
|
2006-06-26 09:31:49 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-04-20 13:55:29 -06:00
|
|
|
#ifdef CONFIG_OF
|
|
|
|
static const struct of_device_id pnx4008_wdt_match[] = {
|
|
|
|
{ .compatible = "nxp,pnx4008-wdt" },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, pnx4008_wdt_match);
|
|
|
|
#endif
|
|
|
|
|
2006-06-26 09:31:49 -06:00
|
|
|
static struct platform_driver platform_wdt_driver = {
|
|
|
|
.driver = {
|
2009-11-20 06:07:57 -07:00
|
|
|
.name = "pnx4008-watchdog",
|
2012-04-20 13:55:29 -06:00
|
|
|
.of_match_table = of_match_ptr(pnx4008_wdt_match),
|
2006-06-26 09:31:49 -06:00
|
|
|
},
|
|
|
|
.probe = pnx4008_wdt_probe,
|
|
|
|
};
|
|
|
|
|
2011-11-28 22:56:27 -07:00
|
|
|
module_platform_driver(platform_wdt_driver);
|
2006-06-26 09:31:49 -06:00
|
|
|
|
|
|
|
MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
|
2015-04-20 07:51:43 -06:00
|
|
|
MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
|
2006-06-26 09:31:49 -06:00
|
|
|
MODULE_DESCRIPTION("PNX4008 Watchdog Driver");
|
|
|
|
|
2012-02-02 10:48:11 -07:00
|
|
|
module_param(heartbeat, uint, 0);
|
2006-06-26 09:31:49 -06:00
|
|
|
MODULE_PARM_DESC(heartbeat,
|
|
|
|
"Watchdog heartbeat period in seconds from 1 to "
|
|
|
|
__MODULE_STRING(MAX_HEARTBEAT) ", default "
|
|
|
|
__MODULE_STRING(DEFAULT_HEARTBEAT));
|
|
|
|
|
2012-03-05 08:51:11 -07:00
|
|
|
module_param(nowayout, bool, 0);
|
2006-06-26 09:31:49 -06:00
|
|
|
MODULE_PARM_DESC(nowayout,
|
|
|
|
"Set to 1 to keep watchdog running after device release");
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
2009-11-20 06:07:57 -07:00
|
|
|
MODULE_ALIAS("platform:pnx4008-watchdog");
|