2005-04-16 16:20:36 -06:00
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/*
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* linux/kernel/irq/manage.c
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*
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2006-06-29 03:24:50 -06:00
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* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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* Copyright (C) 2005-2006 Thomas Gleixner
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2005-04-16 16:20:36 -06:00
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*
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* This file contains driver APIs to the irq subsystem.
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*/
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2012-05-31 17:26:07 -06:00
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#define pr_fmt(fmt) "genirq: " fmt
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2005-04-16 16:20:36 -06:00
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#include <linux/irq.h>
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2009-03-23 11:28:15 -06:00
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#include <linux/kthread.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/module.h>
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#include <linux/random.h>
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#include <linux/interrupt.h>
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2008-04-29 01:59:25 -06:00
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#include <linux/slab.h>
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2009-03-23 11:28:15 -06:00
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#include <linux/sched.h>
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2013-02-07 08:47:07 -07:00
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#include <linux/sched/rt.h>
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2017-02-05 07:30:50 -07:00
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#include <linux/sched/task.h>
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2017-02-01 10:07:51 -07:00
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#include <uapi/linux/sched/types.h>
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2012-05-10 18:59:08 -06:00
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#include <linux/task_work.h>
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2005-04-16 16:20:36 -06:00
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#include "internals.h"
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2011-02-23 16:52:23 -07:00
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#ifdef CONFIG_IRQ_FORCED_THREADING
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__read_mostly bool force_irqthreads;
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static int __init setup_forced_irqthreads(char *arg)
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{
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force_irqthreads = true;
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return 0;
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}
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early_param("threadirqs", setup_forced_irqthreads);
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#endif
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2014-02-14 17:55:18 -07:00
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static void __synchronize_hardirq(struct irq_desc *desc)
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2005-04-16 16:20:36 -06:00
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{
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2011-03-28 06:10:52 -06:00
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bool inprogress;
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2005-04-16 16:20:36 -06:00
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2007-10-22 21:26:25 -06:00
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do {
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unsigned long flags;
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/*
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* Wait until we're out of the critical section. This might
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* give the wrong answer due to the lack of memory barriers.
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*/
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2011-03-28 06:10:52 -06:00
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while (irqd_irq_inprogress(&desc->irq_data))
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2007-10-22 21:26:25 -06:00
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cpu_relax();
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/* Ok, that indicated we're done: double-check carefully. */
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2009-11-17 08:46:45 -07:00
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raw_spin_lock_irqsave(&desc->lock, flags);
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2011-03-28 06:10:52 -06:00
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inprogress = irqd_irq_inprogress(&desc->irq_data);
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2009-11-17 08:46:45 -07:00
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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2007-10-22 21:26:25 -06:00
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/* Oops, that failed? */
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2011-03-28 06:10:52 -06:00
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} while (inprogress);
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2014-02-14 17:55:18 -07:00
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}
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/**
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* synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
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* @irq: interrupt number to wait for
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*
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* This function waits for any pending hard IRQ handlers for this
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* interrupt to complete before returning. If you use this
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* function while holding a resource the IRQ handler may need you
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* will deadlock. It does not take associated threaded handlers
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* into account.
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*
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* Do not use this for shutdown scenarios where you must be sure
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* that all parts (hardirq and threaded handler) have completed.
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*
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2015-02-05 06:06:23 -07:00
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* Returns: false if a threaded handler is active.
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*
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2014-02-14 17:55:18 -07:00
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* This function may be called - with care - from IRQ context.
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*/
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2015-02-05 06:06:23 -07:00
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bool synchronize_hardirq(unsigned int irq)
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2014-02-14 17:55:18 -07:00
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{
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struct irq_desc *desc = irq_to_desc(irq);
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2009-03-23 11:28:15 -06:00
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2015-02-05 06:06:23 -07:00
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if (desc) {
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2014-02-14 17:55:18 -07:00
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__synchronize_hardirq(desc);
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2015-02-05 06:06:23 -07:00
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return !atomic_read(&desc->threads_active);
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}
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return true;
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2014-02-14 17:55:18 -07:00
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}
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EXPORT_SYMBOL(synchronize_hardirq);
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/**
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* synchronize_irq - wait for pending IRQ handlers (on other CPUs)
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* @irq: interrupt number to wait for
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*
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* This function waits for any pending IRQ handlers for this interrupt
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* to complete before returning. If you use this function while
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* holding a resource the IRQ handler may need you will deadlock.
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*
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* This function may be called - with care - from IRQ context.
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*/
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void synchronize_irq(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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if (desc) {
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__synchronize_hardirq(desc);
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/*
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* We made sure that no hardirq handler is
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* running. Now verify that no threaded handlers are
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* active.
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*/
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wait_event(desc->wait_for_threads,
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!atomic_read(&desc->threads_active));
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}
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2005-04-16 16:20:36 -06:00
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}
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EXPORT_SYMBOL(synchronize_irq);
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2009-03-23 11:28:15 -06:00
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#ifdef CONFIG_SMP
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cpumask_var_t irq_default_affinity;
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2016-07-04 02:39:23 -06:00
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static bool __irq_can_set_affinity(struct irq_desc *desc)
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2015-06-23 12:29:34 -06:00
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{
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if (!desc || !irqd_can_balance(&desc->irq_data) ||
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!desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
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2016-07-04 02:39:23 -06:00
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return false;
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return true;
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2015-06-23 12:29:34 -06:00
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}
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2007-02-16 02:27:25 -07:00
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/**
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* irq_can_set_affinity - Check if the affinity of a given irq can be set
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* @irq: Interrupt to check
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*
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*/
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int irq_can_set_affinity(unsigned int irq)
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{
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2015-06-23 12:29:34 -06:00
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return __irq_can_set_affinity(irq_to_desc(irq));
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2007-02-16 02:27:25 -07:00
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}
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2016-07-04 02:39:23 -06:00
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/**
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* irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
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* @irq: Interrupt to check
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*
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* Like irq_can_set_affinity() above, but additionally checks for the
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* AFFINITY_MANAGED flag.
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*/
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bool irq_can_set_affinity_usr(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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return __irq_can_set_affinity(desc) &&
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!irqd_affinity_is_managed(&desc->irq_data);
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}
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2009-07-21 03:09:39 -06:00
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/**
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* irq_set_thread_affinity - Notify irq threads to adjust affinity
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* @desc: irq descriptor which has affitnity changed
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*
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* We just set IRQTF_AFFINITY and delegate the affinity setting
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* to the interrupt thread itself. We can not call
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* set_cpus_allowed_ptr() here as we hold desc->lock and this
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* code can be called from hard interrupt context.
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*/
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void irq_set_thread_affinity(struct irq_desc *desc)
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2009-03-23 11:28:15 -06:00
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{
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2016-01-14 02:54:13 -07:00
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struct irqaction *action;
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2009-03-23 11:28:15 -06:00
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2016-01-14 02:54:13 -07:00
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for_each_action_of_desc(desc, action)
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2009-03-23 11:28:15 -06:00
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if (action->thread)
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2009-07-21 03:09:39 -06:00
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set_bit(IRQTF_AFFINITY, &action->thread_flags);
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2009-03-23 11:28:15 -06:00
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}
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2012-03-30 09:11:34 -06:00
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int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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struct irq_desc *desc = irq_data_to_desc(data);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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int ret;
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2014-04-16 08:36:44 -06:00
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ret = chip->irq_set_affinity(data, mask, force);
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2012-03-30 09:11:34 -06:00
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switch (ret) {
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case IRQ_SET_MASK_OK:
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2014-11-06 07:20:18 -07:00
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case IRQ_SET_MASK_OK_DONE:
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2015-06-02 21:47:50 -06:00
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cpumask_copy(desc->irq_common_data.affinity, mask);
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2012-03-30 09:11:34 -06:00
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case IRQ_SET_MASK_OK_NOCOPY:
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irq_set_thread_affinity(desc);
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ret = 0;
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}
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return ret;
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}
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2014-04-16 08:36:44 -06:00
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int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
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bool force)
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2007-02-16 02:27:25 -07:00
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{
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2011-03-25 13:38:50 -06:00
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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struct irq_desc *desc = irq_data_to_desc(data);
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2011-02-07 08:46:58 -07:00
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int ret = 0;
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2007-02-16 02:27:25 -07:00
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2011-03-25 13:38:50 -06:00
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if (!chip || !chip->irq_set_affinity)
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2007-02-16 02:27:25 -07:00
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return -EINVAL;
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2011-03-28 13:59:37 -06:00
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if (irq_can_move_pcntxt(data)) {
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2014-04-16 08:36:44 -06:00
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ret = irq_do_set_affinity(data, mask, force);
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2011-02-07 08:46:58 -07:00
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} else {
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2011-03-25 13:38:50 -06:00
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irqd_set_move_pending(data);
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2011-02-07 08:46:58 -07:00
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irq_copy_pending(desc, mask);
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2009-04-27 18:59:53 -06:00
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}
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2011-02-07 08:46:58 -07:00
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2011-01-19 14:01:44 -07:00
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if (desc->affinity_notify) {
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kref_get(&desc->affinity_notify->kref);
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schedule_work(&desc->affinity_notify->work);
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}
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2011-03-25 13:38:50 -06:00
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irqd_set(data, IRQD_AFFINITY_SET);
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return ret;
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}
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2014-04-16 08:36:44 -06:00
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int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
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2011-03-25 13:38:50 -06:00
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{
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struct irq_desc *desc = irq_to_desc(irq);
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unsigned long flags;
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int ret;
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if (!desc)
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return -EINVAL;
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raw_spin_lock_irqsave(&desc->lock, flags);
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2014-04-16 08:36:44 -06:00
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ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
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2009-11-17 08:46:45 -07:00
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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2011-02-07 08:46:58 -07:00
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return ret;
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2007-02-16 02:27:25 -07:00
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}
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2010-04-30 15:44:50 -06:00
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int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
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{
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unsigned long flags;
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genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
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struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
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2010-04-30 15:44:50 -06:00
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if (!desc)
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return -EINVAL;
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desc->affinity_hint = m;
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2011-02-12 02:37:36 -07:00
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irq_put_desc_unlock(desc, flags);
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genirq: Set initial affinity in irq_set_affinity_hint()
Problem:
The default behavior of the kernel is somewhat undesirable as all
requested interrupts end up on CPU0 after registration. A user can
run irqbalance daemon, or can manually configure smp_affinity via the
proc filesystem, but the default affinity of the interrupts for all
devices is always CPU zero, this can cause performance problems or
very heavy cpu use of only one core if not noticed and fixed by the
user.
Solution:
Enable the setting of the initial affinity directly when the driver
sets a hint.
This enabling means that kernel drivers can include an initial
affinity setting for the interrupt, instead of all interrupts starting
out life on CPU0. Of course if irqbalance is still running then the
interrupts will get moved as before.
This function is currently called by drivers in block, crypto,
infiniband, ethernet and scsi trees, but only a handful, so these will
be the devices affected by this change.
Tested on i40e, and default interrupts were spread across the CPUs
according to the hint.
drivers/block/mtip32xx/mtip32xx.c:3
drivers/block/nvme-core.c:2
drivers/crypto/qat/qat_dh895xcc/adf_isr.c:3
drivers/infiniband/hw/qib/qib_iba7322.c:2
drivers/net/ethernet/intel/i40e/i40e_main.c:3
drivers/net/ethernet/intel/i40evf/i40evf_main.c:3
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c:3
drivers/net/ethernet/mellanox/mlx4/en_cq.c:2
drivers/scsi/hpsa.c:3
drivers/scsi/lpfc/lpfc_init.c:3
drivers/scsi/megaraid/megaraid_sas_base.c:8
drivers/soc/ti/knav_qmss_acc.c:1
drivers/soc/ti/knav_qmss_queue.c:2
drivers/virtio/virtio_pci_common.c:2
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: netdev@vger.kernel.org
Link: http://lkml.kernel.org/r/20141219012206.4220.27491.stgit@jbrandeb-cp2.jf.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-12-18 18:22:06 -07:00
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/* set the initial affinity to prevent every interrupt being on CPU0 */
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2015-01-28 11:57:39 -07:00
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if (m)
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__irq_set_affinity(irq, m, false);
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2010-04-30 15:44:50 -06:00
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return 0;
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}
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EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
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2011-01-19 14:01:44 -07:00
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static void irq_affinity_notify(struct work_struct *work)
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{
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struct irq_affinity_notify *notify =
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container_of(work, struct irq_affinity_notify, work);
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struct irq_desc *desc = irq_to_desc(notify->irq);
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cpumask_var_t cpumask;
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unsigned long flags;
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|
|
2011-02-07 08:46:58 -07:00
|
|
|
if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
|
2011-01-19 14:01:44 -07:00
|
|
|
goto out;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2011-03-28 13:59:37 -06:00
|
|
|
if (irq_move_pending(&desc->irq_data))
|
2011-02-07 08:46:58 -07:00
|
|
|
irq_get_pending(cpumask, desc);
|
2011-01-19 14:01:44 -07:00
|
|
|
else
|
2015-06-02 21:47:50 -06:00
|
|
|
cpumask_copy(cpumask, desc->irq_common_data.affinity);
|
2011-01-19 14:01:44 -07:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
|
|
|
|
notify->notify(notify, cpumask);
|
|
|
|
|
|
|
|
free_cpumask_var(cpumask);
|
|
|
|
out:
|
|
|
|
kref_put(¬ify->kref, notify->release);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_set_affinity_notifier - control notification of IRQ affinity changes
|
|
|
|
* @irq: Interrupt for which to enable/disable notification
|
|
|
|
* @notify: Context for notification, or %NULL to disable
|
|
|
|
* notification. Function pointers must be initialised;
|
|
|
|
* the other fields will be initialised by this function.
|
|
|
|
*
|
|
|
|
* Must be called in process context. Notification may only be enabled
|
|
|
|
* after the IRQ is allocated and must be disabled before the IRQ is
|
|
|
|
* freed using free_irq().
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
struct irq_affinity_notify *old_notify;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
/* The release function is promised process context */
|
|
|
|
might_sleep();
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* Complete initialisation of *notify */
|
|
|
|
if (notify) {
|
|
|
|
notify->irq = irq;
|
|
|
|
kref_init(¬ify->kref);
|
|
|
|
INIT_WORK(¬ify->work, irq_affinity_notify);
|
|
|
|
}
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
old_notify = desc->affinity_notify;
|
|
|
|
desc->affinity_notify = notify;
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
|
|
|
|
if (old_notify)
|
|
|
|
kref_put(&old_notify->kref, old_notify->release);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
|
|
|
|
|
2008-05-29 12:02:52 -06:00
|
|
|
#ifndef CONFIG_AUTO_IRQ_AFFINITY
|
|
|
|
/*
|
|
|
|
* Generic version of the affinity autoselector.
|
|
|
|
*/
|
2017-06-19 17:37:22 -06:00
|
|
|
int irq_setup_affinity(struct irq_desc *desc)
|
2008-05-29 12:02:52 -06:00
|
|
|
{
|
2011-02-07 09:05:08 -07:00
|
|
|
struct cpumask *set = irq_default_affinity;
|
2017-06-19 17:37:21 -06:00
|
|
|
int ret, node = irq_desc_get_node(desc);
|
|
|
|
static DEFINE_RAW_SPINLOCK(mask_lock);
|
|
|
|
static struct cpumask mask;
|
2011-02-07 09:05:08 -07:00
|
|
|
|
2011-02-07 09:30:50 -07:00
|
|
|
/* Excludes PER_CPU and NO_BALANCE interrupts */
|
2015-06-23 12:29:34 -06:00
|
|
|
if (!__irq_can_set_affinity(desc))
|
2008-05-29 12:02:52 -06:00
|
|
|
return 0;
|
|
|
|
|
2017-06-19 17:37:21 -06:00
|
|
|
raw_spin_lock(&mask_lock);
|
2008-11-07 05:18:30 -07:00
|
|
|
/*
|
2017-02-27 15:28:47 -07:00
|
|
|
* Preserve the managed affinity setting and a userspace affinity
|
2016-07-04 02:39:24 -06:00
|
|
|
* setup, but make sure that one of the targets is online.
|
2008-11-07 05:18:30 -07:00
|
|
|
*/
|
2016-07-04 02:39:24 -06:00
|
|
|
if (irqd_affinity_is_managed(&desc->irq_data) ||
|
|
|
|
irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
|
2015-06-02 21:47:50 -06:00
|
|
|
if (cpumask_intersects(desc->irq_common_data.affinity,
|
2011-02-07 09:05:08 -07:00
|
|
|
cpu_online_mask))
|
2015-06-02 21:47:50 -06:00
|
|
|
set = desc->irq_common_data.affinity;
|
2011-03-28 05:32:20 -06:00
|
|
|
else
|
2011-02-08 09:22:00 -07:00
|
|
|
irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
|
2008-11-07 05:18:30 -07:00
|
|
|
}
|
2008-05-29 12:02:52 -06:00
|
|
|
|
2017-06-19 17:37:21 -06:00
|
|
|
cpumask_and(&mask, cpu_online_mask, set);
|
2012-03-26 13:02:18 -06:00
|
|
|
if (node != NUMA_NO_NODE) {
|
|
|
|
const struct cpumask *nodemask = cpumask_of_node(node);
|
|
|
|
|
|
|
|
/* make sure at least one of the cpus in nodemask is online */
|
2017-06-19 17:37:21 -06:00
|
|
|
if (cpumask_intersects(&mask, nodemask))
|
|
|
|
cpumask_and(&mask, &mask, nodemask);
|
2012-03-26 13:02:18 -06:00
|
|
|
}
|
2017-06-19 17:37:21 -06:00
|
|
|
ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
|
|
|
|
raw_spin_unlock(&mask_lock);
|
|
|
|
return ret;
|
2008-05-29 12:02:52 -06:00
|
|
|
}
|
2008-11-07 05:18:30 -07:00
|
|
|
#else
|
2015-06-03 22:13:30 -06:00
|
|
|
/* Wrapper for ALPHA specific affinity selector magic */
|
2017-06-19 17:37:21 -06:00
|
|
|
int irq_setup_affinity(struct irq_desc *desc)
|
2008-11-07 05:18:30 -07:00
|
|
|
{
|
2017-06-19 17:37:21 -06:00
|
|
|
return irq_select_affinity(irq_desc_get_irq(desc));
|
2008-11-07 05:18:30 -07:00
|
|
|
}
|
2008-05-29 12:02:52 -06:00
|
|
|
#endif
|
|
|
|
|
2008-11-07 05:18:30 -07:00
|
|
|
/*
|
2017-06-19 17:37:21 -06:00
|
|
|
* Called when a bogus affinity is set via /proc/irq
|
2008-11-07 05:18:30 -07:00
|
|
|
*/
|
2017-06-19 17:37:21 -06:00
|
|
|
int irq_select_affinity_usr(unsigned int irq)
|
2008-11-07 05:18:30 -07:00
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2017-06-19 17:37:21 -06:00
|
|
|
ret = irq_setup_affinity(desc);
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2008-11-07 05:18:30 -07:00
|
|
|
return ret;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif
|
|
|
|
|
2015-10-03 02:20:38 -06:00
|
|
|
/**
|
|
|
|
* irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
|
|
|
|
* @irq: interrupt number to set affinity
|
|
|
|
* @vcpu_info: vCPU specific data
|
|
|
|
*
|
|
|
|
* This function uses the vCPU specific data to set the vCPU
|
|
|
|
* affinity for an irq. The vCPU specific data is passed from
|
|
|
|
* outside, such as KVM. One example code path is as below:
|
|
|
|
* KVM -> IOMMU -> irq_set_vcpu_affinity().
|
|
|
|
*/
|
|
|
|
int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
|
|
|
struct irq_data *data;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
int ret = -ENOSYS;
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
chip = irq_data_get_irq_chip(data);
|
|
|
|
if (chip && chip->irq_set_vcpu_affinity)
|
|
|
|
ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
|
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
|
|
|
|
|
2015-06-23 11:52:36 -06:00
|
|
|
void __disable_irq(struct irq_desc *desc)
|
2009-03-16 15:33:49 -06:00
|
|
|
{
|
2011-02-04 02:17:52 -07:00
|
|
|
if (!desc->depth++)
|
2011-02-03 04:27:44 -07:00
|
|
|
irq_disable(desc);
|
2009-03-16 15:33:49 -06:00
|
|
|
}
|
|
|
|
|
2011-02-12 02:37:36 -07:00
|
|
|
static int __disable_irq_nosync(unsigned int irq)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
|
2011-02-12 02:37:36 -07:00
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
2015-06-23 11:52:36 -06:00
|
|
|
__disable_irq(desc);
|
2011-02-12 02:37:36 -07:00
|
|
|
irq_put_desc_busunlock(desc, flags);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* disable_irq_nosync - disable an irq without waiting
|
|
|
|
* @irq: Interrupt to disable
|
|
|
|
*
|
|
|
|
* Disable the selected interrupt line. Disables and Enables are
|
|
|
|
* nested.
|
|
|
|
* Unlike disable_irq(), this function does not ensure existing
|
|
|
|
* instances of the IRQ handler have completed before returning.
|
|
|
|
*
|
|
|
|
* This function may be called from IRQ context.
|
|
|
|
*/
|
|
|
|
void disable_irq_nosync(unsigned int irq)
|
|
|
|
{
|
2011-02-12 02:37:36 -07:00
|
|
|
__disable_irq_nosync(irq);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(disable_irq_nosync);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* disable_irq - disable an irq and wait for completion
|
|
|
|
* @irq: Interrupt to disable
|
|
|
|
*
|
|
|
|
* Disable the selected interrupt line. Enables and Disables are
|
|
|
|
* nested.
|
|
|
|
* This function waits for any pending IRQ handlers for this interrupt
|
|
|
|
* to complete before returning. If you use this function while
|
|
|
|
* holding a resource the IRQ handler may need you will deadlock.
|
|
|
|
*
|
|
|
|
* This function may be called - with care - from IRQ context.
|
|
|
|
*/
|
|
|
|
void disable_irq(unsigned int irq)
|
|
|
|
{
|
2011-02-12 02:37:36 -07:00
|
|
|
if (!__disable_irq_nosync(irq))
|
2005-04-16 16:20:36 -06:00
|
|
|
synchronize_irq(irq);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(disable_irq);
|
|
|
|
|
2015-02-05 06:06:23 -07:00
|
|
|
/**
|
|
|
|
* disable_hardirq - disables an irq and waits for hardirq completion
|
|
|
|
* @irq: Interrupt to disable
|
|
|
|
*
|
|
|
|
* Disable the selected interrupt line. Enables and Disables are
|
|
|
|
* nested.
|
|
|
|
* This function waits for any pending hard IRQ handlers for this
|
|
|
|
* interrupt to complete before returning. If you use this function while
|
|
|
|
* holding a resource the hard IRQ handler may need you will deadlock.
|
|
|
|
*
|
|
|
|
* When used to optimistically disable an interrupt from atomic context
|
|
|
|
* the return value must be checked.
|
|
|
|
*
|
|
|
|
* Returns: false if a threaded handler is active.
|
|
|
|
*
|
|
|
|
* This function may be called - with care - from IRQ context.
|
|
|
|
*/
|
|
|
|
bool disable_hardirq(unsigned int irq)
|
|
|
|
{
|
|
|
|
if (!__disable_irq_nosync(irq))
|
|
|
|
return synchronize_hardirq(irq);
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(disable_hardirq);
|
|
|
|
|
2015-06-23 11:52:36 -06:00
|
|
|
void __enable_irq(struct irq_desc *desc)
|
2008-04-28 09:01:56 -06:00
|
|
|
{
|
|
|
|
switch (desc->depth) {
|
|
|
|
case 0:
|
2009-03-16 15:33:49 -06:00
|
|
|
err_out:
|
2015-06-23 11:52:36 -06:00
|
|
|
WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
|
|
|
|
irq_desc_get_irq(desc));
|
2008-04-28 09:01:56 -06:00
|
|
|
break;
|
|
|
|
case 1: {
|
2011-02-08 04:44:58 -07:00
|
|
|
if (desc->istate & IRQS_SUSPENDED)
|
2009-03-16 15:33:49 -06:00
|
|
|
goto err_out;
|
2008-04-28 09:01:56 -06:00
|
|
|
/* Prevent probing on this irq: */
|
2011-02-09 06:44:17 -07:00
|
|
|
irq_settings_set_noprobe(desc);
|
2017-05-31 03:58:32 -06:00
|
|
|
/*
|
|
|
|
* Call irq_startup() not irq_enable() here because the
|
|
|
|
* interrupt might be marked NOAUTOEN. So irq_startup()
|
|
|
|
* needs to be invoked when it gets enabled the first
|
|
|
|
* time. If it was already started up, then irq_startup()
|
|
|
|
* will invoke irq_enable() under the hood.
|
|
|
|
*/
|
2017-06-19 17:37:49 -06:00
|
|
|
irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
|
2017-05-31 03:58:32 -06:00
|
|
|
break;
|
2008-04-28 09:01:56 -06:00
|
|
|
}
|
|
|
|
default:
|
|
|
|
desc->depth--;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* enable_irq - enable handling of an irq
|
|
|
|
* @irq: Interrupt to enable
|
|
|
|
*
|
|
|
|
* Undoes the effect of one call to disable_irq(). If this
|
|
|
|
* matches the last disable, processing of interrupts on this
|
|
|
|
* IRQ line is re-enabled.
|
|
|
|
*
|
2009-08-13 04:17:48 -06:00
|
|
|
* This function may be called from IRQ context only when
|
2010-10-01 04:58:38 -06:00
|
|
|
* desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
|
|
|
void enable_irq(unsigned int irq)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-08-19 21:50:14 -06:00
|
|
|
if (!desc)
|
2005-11-03 07:51:18 -07:00
|
|
|
return;
|
2011-02-03 05:23:54 -07:00
|
|
|
if (WARN(!desc->irq_data.chip,
|
|
|
|
KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
|
2011-02-12 02:37:36 -07:00
|
|
|
goto out;
|
2010-10-22 06:47:57 -06:00
|
|
|
|
2015-06-23 11:52:36 -06:00
|
|
|
__enable_irq(desc);
|
2011-02-12 02:37:36 -07:00
|
|
|
out:
|
|
|
|
irq_put_desc_busunlock(desc, flags);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(enable_irq);
|
|
|
|
|
2008-10-01 15:46:18 -06:00
|
|
|
static int set_irq_wake_real(unsigned int irq, unsigned int on)
|
2008-07-23 06:42:25 -06:00
|
|
|
{
|
2008-08-19 21:50:05 -06:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
2008-07-23 06:42:25 -06:00
|
|
|
int ret = -ENXIO;
|
|
|
|
|
2011-09-09 02:29:35 -06:00
|
|
|
if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
|
|
|
|
return 0;
|
|
|
|
|
2010-09-27 06:45:50 -06:00
|
|
|
if (desc->irq_data.chip->irq_set_wake)
|
|
|
|
ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
|
2008-07-23 06:42:25 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2006-06-29 03:24:55 -06:00
|
|
|
/**
|
2011-02-10 03:36:33 -07:00
|
|
|
* irq_set_irq_wake - control irq power management wakeup
|
2006-06-29 03:24:55 -06:00
|
|
|
* @irq: interrupt to control
|
|
|
|
* @on: enable/disable power management wakeup
|
|
|
|
*
|
2006-07-30 04:03:08 -06:00
|
|
|
* Enable/disable power management wakeup mode, which is
|
|
|
|
* disabled by default. Enables and disables must match,
|
|
|
|
* just as they match for non-wakeup mode support.
|
|
|
|
*
|
|
|
|
* Wakeup mode lets this IRQ wake the system from sleep
|
|
|
|
* states like "suspend to RAM".
|
2006-06-29 03:24:55 -06:00
|
|
|
*/
|
2011-02-10 03:36:33 -07:00
|
|
|
int irq_set_irq_wake(unsigned int irq, unsigned int on)
|
2006-06-29 03:24:55 -06:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
|
2008-07-23 06:42:25 -06:00
|
|
|
int ret = 0;
|
2006-06-29 03:24:55 -06:00
|
|
|
|
2011-06-09 15:14:58 -06:00
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2006-07-30 04:03:08 -06:00
|
|
|
/* wakeup-capable irqs can be shared between drivers that
|
|
|
|
* don't need to have the same sleep mode behaviors.
|
|
|
|
*/
|
|
|
|
if (on) {
|
2008-07-23 06:42:25 -06:00
|
|
|
if (desc->wake_depth++ == 0) {
|
|
|
|
ret = set_irq_wake_real(irq, on);
|
|
|
|
if (ret)
|
|
|
|
desc->wake_depth = 0;
|
|
|
|
else
|
2011-02-10 11:46:26 -07:00
|
|
|
irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
|
2008-07-23 06:42:25 -06:00
|
|
|
}
|
2006-07-30 04:03:08 -06:00
|
|
|
} else {
|
|
|
|
if (desc->wake_depth == 0) {
|
2008-07-25 02:45:54 -06:00
|
|
|
WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
|
2008-07-23 06:42:25 -06:00
|
|
|
} else if (--desc->wake_depth == 0) {
|
|
|
|
ret = set_irq_wake_real(irq, on);
|
|
|
|
if (ret)
|
|
|
|
desc->wake_depth = 1;
|
|
|
|
else
|
2011-02-10 11:46:26 -07:00
|
|
|
irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
|
2008-07-23 06:42:25 -06:00
|
|
|
}
|
2006-07-30 04:03:08 -06:00
|
|
|
}
|
2011-02-12 02:37:36 -07:00
|
|
|
irq_put_desc_busunlock(desc, flags);
|
2006-06-29 03:24:55 -06:00
|
|
|
return ret;
|
|
|
|
}
|
2011-02-10 03:36:33 -07:00
|
|
|
EXPORT_SYMBOL(irq_set_irq_wake);
|
2006-06-29 03:24:55 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Internal function that tells the architecture code whether a
|
|
|
|
* particular irq has been exclusively allocated or is available
|
|
|
|
* for driver use.
|
|
|
|
*/
|
|
|
|
int can_request_irq(unsigned int irq, unsigned long irqflags)
|
|
|
|
{
|
2010-03-23 15:40:53 -06:00
|
|
|
unsigned long flags;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
2011-02-12 02:37:36 -07:00
|
|
|
int canrequest = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-08-19 21:50:14 -06:00
|
|
|
if (!desc)
|
|
|
|
return 0;
|
|
|
|
|
2011-02-12 02:37:36 -07:00
|
|
|
if (irq_settings_can_request(desc)) {
|
2013-06-27 19:40:30 -06:00
|
|
|
if (!desc->action ||
|
|
|
|
irqflags & desc->action->flags & IRQF_SHARED)
|
|
|
|
canrequest = 1;
|
2011-02-12 02:37:36 -07:00
|
|
|
}
|
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
return canrequest;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2015-06-23 11:47:29 -06:00
|
|
|
int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
|
2008-07-23 22:28:54 -06:00
|
|
|
{
|
2010-10-01 04:58:38 -06:00
|
|
|
struct irq_chip *chip = desc->irq_data.chip;
|
2011-02-10 05:16:14 -07:00
|
|
|
int ret, unmask = 0;
|
2008-07-23 22:28:54 -06:00
|
|
|
|
2010-09-27 06:45:47 -06:00
|
|
|
if (!chip || !chip->irq_set_type) {
|
2008-07-23 22:28:54 -06:00
|
|
|
/*
|
|
|
|
* IRQF_TRIGGER_* but the PIC does not support multiple
|
|
|
|
* flow-types?
|
|
|
|
*/
|
2015-06-23 11:47:29 -06:00
|
|
|
pr_debug("No set_type function for IRQ %d (%s)\n",
|
|
|
|
irq_desc_get_irq(desc),
|
2012-04-19 04:06:13 -06:00
|
|
|
chip ? (chip->name ? : "unknown") : "unknown");
|
2008-07-23 22:28:54 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-02-10 05:16:14 -07:00
|
|
|
if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
|
2011-03-28 06:10:52 -06:00
|
|
|
if (!irqd_irq_masked(&desc->irq_data))
|
2011-02-10 05:16:14 -07:00
|
|
|
mask_irq(desc);
|
2011-03-28 06:10:52 -06:00
|
|
|
if (!irqd_irq_disabled(&desc->irq_data))
|
2011-02-10 05:16:14 -07:00
|
|
|
unmask = 1;
|
|
|
|
}
|
|
|
|
|
2016-07-19 03:54:08 -06:00
|
|
|
/* Mask all flags except trigger mode */
|
|
|
|
flags &= IRQ_TYPE_SENSE_MASK;
|
2010-09-27 06:45:47 -06:00
|
|
|
ret = chip->irq_set_type(&desc->irq_data, flags);
|
2008-07-23 22:28:54 -06:00
|
|
|
|
2011-02-08 09:28:12 -07:00
|
|
|
switch (ret) {
|
|
|
|
case IRQ_SET_MASK_OK:
|
2014-11-06 07:20:18 -07:00
|
|
|
case IRQ_SET_MASK_OK_DONE:
|
2011-02-08 09:28:12 -07:00
|
|
|
irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
|
|
|
|
irqd_set(&desc->irq_data, flags);
|
|
|
|
|
|
|
|
case IRQ_SET_MASK_OK_NOCOPY:
|
|
|
|
flags = irqd_get_trigger_type(&desc->irq_data);
|
|
|
|
irq_settings_set_trigger_mask(desc, flags);
|
|
|
|
irqd_clear(&desc->irq_data, IRQD_LEVEL);
|
|
|
|
irq_settings_clr_level(desc);
|
|
|
|
if (flags & IRQ_TYPE_LEVEL_MASK) {
|
|
|
|
irq_settings_set_level(desc);
|
|
|
|
irqd_set(&desc->irq_data, IRQD_LEVEL);
|
|
|
|
}
|
2010-06-07 09:53:51 -06:00
|
|
|
|
2011-02-10 05:16:14 -07:00
|
|
|
ret = 0;
|
2011-02-21 06:19:42 -07:00
|
|
|
break;
|
2011-02-08 09:28:12 -07:00
|
|
|
default:
|
2012-05-31 17:26:07 -06:00
|
|
|
pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
|
2015-06-23 11:47:29 -06:00
|
|
|
flags, irq_desc_get_irq(desc), chip->irq_set_type);
|
2008-10-01 15:46:18 -06:00
|
|
|
}
|
2011-02-10 05:16:14 -07:00
|
|
|
if (unmask)
|
|
|
|
unmask_irq(desc);
|
2008-07-23 22:28:54 -06:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-10-16 16:07:49 -06:00
|
|
|
#ifdef CONFIG_HARDIRQS_SW_RESEND
|
|
|
|
int irq_set_parent(int irq, int parent_irq)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
desc->parent_irq = parent_irq;
|
|
|
|
|
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
return 0;
|
|
|
|
}
|
2016-10-06 11:36:43 -06:00
|
|
|
EXPORT_SYMBOL_GPL(irq_set_parent);
|
2012-10-16 16:07:49 -06:00
|
|
|
#endif
|
|
|
|
|
2009-08-13 04:17:22 -06:00
|
|
|
/*
|
|
|
|
* Default primary interrupt handler for threaded interrupts. Is
|
|
|
|
* assigned as primary handler when request_threaded_irq is called
|
|
|
|
* with handler == NULL. Useful for oneshot interrupts.
|
|
|
|
*/
|
|
|
|
static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
return IRQ_WAKE_THREAD;
|
|
|
|
}
|
|
|
|
|
2009-08-13 05:21:38 -06:00
|
|
|
/*
|
|
|
|
* Primary handler for nested threaded interrupts. Should never be
|
|
|
|
* called.
|
|
|
|
*/
|
|
|
|
static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
WARN(1, "Primary handler called for nested irq %d\n", irq);
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
WARN(1, "Secondary action handler called for irq %d\n", irq);
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
static int irq_wait_for_interrupt(struct irqaction *action)
|
|
|
|
{
|
2011-12-01 04:55:08 -07:00
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
while (!kthread_should_stop()) {
|
2009-03-24 04:46:22 -06:00
|
|
|
|
|
|
|
if (test_and_clear_bit(IRQTF_RUNTHREAD,
|
|
|
|
&action->thread_flags)) {
|
2009-03-23 11:28:15 -06:00
|
|
|
__set_current_state(TASK_RUNNING);
|
|
|
|
return 0;
|
2009-03-24 04:46:22 -06:00
|
|
|
}
|
|
|
|
schedule();
|
2011-12-01 04:55:08 -07:00
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
2009-03-23 11:28:15 -06:00
|
|
|
}
|
2011-12-01 04:55:08 -07:00
|
|
|
__set_current_state(TASK_RUNNING);
|
2009-03-23 11:28:15 -06:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2009-08-13 04:17:22 -06:00
|
|
|
/*
|
|
|
|
* Oneshot interrupts keep the irq line masked until the threaded
|
|
|
|
* handler finished. unmask if the interrupt has not been disabled and
|
|
|
|
* is marked MASKED.
|
|
|
|
*/
|
2011-02-23 16:52:13 -07:00
|
|
|
static void irq_finalize_oneshot(struct irq_desc *desc,
|
2012-03-21 10:22:35 -06:00
|
|
|
struct irqaction *action)
|
2009-08-13 04:17:22 -06:00
|
|
|
{
|
2015-09-21 03:01:10 -06:00
|
|
|
if (!(desc->istate & IRQS_ONESHOT) ||
|
|
|
|
action->handler == irq_forced_secondary_handler)
|
2011-02-23 16:52:13 -07:00
|
|
|
return;
|
2010-03-09 11:45:54 -07:00
|
|
|
again:
|
2010-09-27 06:44:35 -06:00
|
|
|
chip_bus_lock(desc);
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_lock_irq(&desc->lock);
|
2010-03-09 11:45:54 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Implausible though it may be we need to protect us against
|
|
|
|
* the following scenario:
|
|
|
|
*
|
|
|
|
* The thread is faster done than the hard interrupt handler
|
|
|
|
* on the other CPU. If we unmask the irq line then the
|
|
|
|
* interrupt can come in again and masks the line, leaves due
|
2011-02-07 13:48:49 -07:00
|
|
|
* to IRQS_INPROGRESS and the irq line is masked forever.
|
2011-02-23 16:52:13 -07:00
|
|
|
*
|
|
|
|
* This also serializes the state of shared oneshot handlers
|
|
|
|
* versus "desc->threads_onehsot |= action->thread_mask;" in
|
|
|
|
* irq_wake_thread(). See the comment there which explains the
|
|
|
|
* serialization.
|
2010-03-09 11:45:54 -07:00
|
|
|
*/
|
2011-03-28 06:10:52 -06:00
|
|
|
if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
|
2010-03-09 11:45:54 -07:00
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
2010-09-27 06:44:35 -06:00
|
|
|
chip_bus_sync_unlock(desc);
|
2010-03-09 11:45:54 -07:00
|
|
|
cpu_relax();
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
|
2011-02-23 16:52:13 -07:00
|
|
|
/*
|
|
|
|
* Now check again, whether the thread should run. Otherwise
|
|
|
|
* we would clear the threads_oneshot bit of this thread which
|
|
|
|
* was just set.
|
|
|
|
*/
|
2012-03-21 10:22:35 -06:00
|
|
|
if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
|
2011-02-23 16:52:13 -07:00
|
|
|
goto out_unlock;
|
|
|
|
|
|
|
|
desc->threads_oneshot &= ~action->thread_mask;
|
|
|
|
|
2011-03-28 06:10:52 -06:00
|
|
|
if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
|
|
|
|
irqd_irq_masked(&desc->irq_data))
|
2014-03-13 12:03:51 -06:00
|
|
|
unmask_threaded_irq(desc);
|
2011-03-28 06:10:52 -06:00
|
|
|
|
2011-02-23 16:52:13 -07:00
|
|
|
out_unlock:
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
2010-09-27 06:44:35 -06:00
|
|
|
chip_bus_sync_unlock(desc);
|
2009-08-13 04:17:22 -06:00
|
|
|
}
|
|
|
|
|
2009-07-22 14:22:32 -06:00
|
|
|
#ifdef CONFIG_SMP
|
2009-07-21 03:09:39 -06:00
|
|
|
/*
|
2014-02-10 01:13:57 -07:00
|
|
|
* Check whether we need to change the affinity of the interrupt thread.
|
2009-07-21 03:09:39 -06:00
|
|
|
*/
|
|
|
|
static void
|
|
|
|
irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
|
|
|
|
{
|
|
|
|
cpumask_var_t mask;
|
2012-11-03 04:52:09 -06:00
|
|
|
bool valid = true;
|
2009-07-21 03:09:39 -06:00
|
|
|
|
|
|
|
if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In case we are out of memory we set IRQTF_AFFINITY again and
|
|
|
|
* try again next time
|
|
|
|
*/
|
|
|
|
if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
|
|
|
|
set_bit(IRQTF_AFFINITY, &action->thread_flags);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_lock_irq(&desc->lock);
|
2012-11-03 04:52:09 -06:00
|
|
|
/*
|
|
|
|
* This code is triggered unconditionally. Check the affinity
|
|
|
|
* mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
|
|
|
|
*/
|
2017-04-12 12:20:30 -06:00
|
|
|
if (cpumask_available(desc->irq_common_data.affinity))
|
2015-06-02 21:47:50 -06:00
|
|
|
cpumask_copy(mask, desc->irq_common_data.affinity);
|
2012-11-03 04:52:09 -06:00
|
|
|
else
|
|
|
|
valid = false;
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
2009-07-21 03:09:39 -06:00
|
|
|
|
2012-11-03 04:52:09 -06:00
|
|
|
if (valid)
|
|
|
|
set_cpus_allowed_ptr(current, mask);
|
2009-07-21 03:09:39 -06:00
|
|
|
free_cpumask_var(mask);
|
|
|
|
}
|
2009-07-22 14:22:32 -06:00
|
|
|
#else
|
|
|
|
static inline void
|
|
|
|
irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
|
|
|
|
#endif
|
2009-07-21 03:09:39 -06:00
|
|
|
|
2011-02-23 16:52:23 -07:00
|
|
|
/*
|
|
|
|
* Interrupts which are not explicitely requested as threaded
|
|
|
|
* interrupts rely on the implicit bh/preempt disable of the hard irq
|
|
|
|
* context. So we need to disable bh here to avoid deadlocks and other
|
|
|
|
* side effects.
|
|
|
|
*/
|
2011-05-31 00:56:11 -06:00
|
|
|
static irqreturn_t
|
2011-02-23 16:52:23 -07:00
|
|
|
irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
|
|
|
|
{
|
2011-05-31 00:56:11 -06:00
|
|
|
irqreturn_t ret;
|
|
|
|
|
2011-02-23 16:52:23 -07:00
|
|
|
local_bh_disable();
|
2011-05-31 00:56:11 -06:00
|
|
|
ret = action->thread_fn(action->irq, action->dev_id);
|
2012-03-21 10:22:35 -06:00
|
|
|
irq_finalize_oneshot(desc, action);
|
2011-02-23 16:52:23 -07:00
|
|
|
local_bh_enable();
|
2011-05-31 00:56:11 -06:00
|
|
|
return ret;
|
2011-02-23 16:52:23 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2013-10-17 19:12:04 -06:00
|
|
|
* Interrupts explicitly requested as threaded interrupts want to be
|
2011-02-23 16:52:23 -07:00
|
|
|
* preemtible - many of them need to sleep and wait for slow busses to
|
|
|
|
* complete.
|
|
|
|
*/
|
2011-05-31 00:56:11 -06:00
|
|
|
static irqreturn_t irq_thread_fn(struct irq_desc *desc,
|
|
|
|
struct irqaction *action)
|
2011-02-23 16:52:23 -07:00
|
|
|
{
|
2011-05-31 00:56:11 -06:00
|
|
|
irqreturn_t ret;
|
|
|
|
|
|
|
|
ret = action->thread_fn(action->irq, action->dev_id);
|
2012-03-21 10:22:35 -06:00
|
|
|
irq_finalize_oneshot(desc, action);
|
2011-05-31 00:56:11 -06:00
|
|
|
return ret;
|
2011-02-23 16:52:23 -07:00
|
|
|
}
|
|
|
|
|
2011-12-02 09:24:12 -07:00
|
|
|
static void wake_threads_waitq(struct irq_desc *desc)
|
|
|
|
{
|
2014-02-23 20:29:50 -07:00
|
|
|
if (atomic_dec_and_test(&desc->threads_active))
|
2011-12-02 09:24:12 -07:00
|
|
|
wake_up(&desc->wait_for_threads);
|
|
|
|
}
|
|
|
|
|
2012-06-27 01:07:19 -06:00
|
|
|
static void irq_thread_dtor(struct callback_head *unused)
|
2012-05-10 18:59:08 -06:00
|
|
|
{
|
|
|
|
struct task_struct *tsk = current;
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irqaction *action;
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
action = kthread_data(tsk);
|
|
|
|
|
2012-05-31 19:47:30 -06:00
|
|
|
pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
|
2012-12-18 15:21:25 -07:00
|
|
|
tsk->comm, tsk->pid, action->irq);
|
2012-05-10 18:59:08 -06:00
|
|
|
|
|
|
|
|
|
|
|
desc = irq_to_desc(action->irq);
|
|
|
|
/*
|
|
|
|
* If IRQTF_RUNTHREAD is set, we need to decrement
|
|
|
|
* desc->threads_active and wake possible waiters.
|
|
|
|
*/
|
|
|
|
if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
|
|
|
|
wake_threads_waitq(desc);
|
|
|
|
|
|
|
|
/* Prevent a stale desc->threads_oneshot */
|
|
|
|
irq_finalize_oneshot(desc, action);
|
|
|
|
}
|
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
|
|
|
|
{
|
|
|
|
struct irqaction *secondary = action->secondary;
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!secondary))
|
|
|
|
return;
|
|
|
|
|
|
|
|
raw_spin_lock_irq(&desc->lock);
|
|
|
|
__irq_wake_thread(desc, secondary);
|
|
|
|
raw_spin_unlock_irq(&desc->lock);
|
|
|
|
}
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
/*
|
|
|
|
* Interrupt handler thread
|
|
|
|
*/
|
|
|
|
static int irq_thread(void *data)
|
|
|
|
{
|
2012-06-27 01:07:19 -06:00
|
|
|
struct callback_head on_exit_work;
|
2009-03-23 11:28:15 -06:00
|
|
|
struct irqaction *action = data;
|
|
|
|
struct irq_desc *desc = irq_to_desc(action->irq);
|
2011-05-31 00:56:11 -06:00
|
|
|
irqreturn_t (*handler_fn)(struct irq_desc *desc,
|
|
|
|
struct irqaction *action);
|
2009-03-23 11:28:15 -06:00
|
|
|
|
2012-03-09 06:59:13 -07:00
|
|
|
if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
|
2011-02-23 16:52:23 -07:00
|
|
|
&action->thread_flags))
|
|
|
|
handler_fn = irq_forced_thread_fn;
|
|
|
|
else
|
|
|
|
handler_fn = irq_thread_fn;
|
|
|
|
|
2012-06-26 12:10:04 -06:00
|
|
|
init_task_work(&on_exit_work, irq_thread_dtor);
|
2012-05-10 18:59:08 -06:00
|
|
|
task_work_add(current, &on_exit_work, false);
|
2009-03-23 11:28:15 -06:00
|
|
|
|
2012-10-31 14:41:23 -06:00
|
|
|
irq_thread_check_affinity(desc, action);
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
while (!irq_wait_for_interrupt(action)) {
|
2011-12-02 09:24:12 -07:00
|
|
|
irqreturn_t action_ret;
|
2009-03-23 11:28:15 -06:00
|
|
|
|
2009-07-21 03:09:39 -06:00
|
|
|
irq_thread_check_affinity(desc, action);
|
|
|
|
|
2011-12-02 09:24:12 -07:00
|
|
|
action_ret = handler_fn(desc, action);
|
2013-03-07 06:53:45 -07:00
|
|
|
if (action_ret == IRQ_HANDLED)
|
|
|
|
atomic_inc(&desc->threads_handled);
|
2015-09-21 03:01:10 -06:00
|
|
|
if (action_ret == IRQ_WAKE_THREAD)
|
|
|
|
irq_wake_secondary(desc, action);
|
2009-03-23 11:28:15 -06:00
|
|
|
|
2011-12-02 09:24:12 -07:00
|
|
|
wake_threads_waitq(desc);
|
2009-03-23 11:28:15 -06:00
|
|
|
}
|
|
|
|
|
2011-12-02 09:24:12 -07:00
|
|
|
/*
|
|
|
|
* This is the regular exit path. __free_irq() is stopping the
|
|
|
|
* thread via kthread_stop() after calling
|
|
|
|
* synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
|
2012-03-15 15:55:21 -06:00
|
|
|
* oneshot mask bit can be set. We cannot verify that as we
|
|
|
|
* cannot touch the oneshot mask at this point anymore as
|
|
|
|
* __setup_irq() might have given out currents thread_mask
|
|
|
|
* again.
|
2009-03-23 11:28:15 -06:00
|
|
|
*/
|
2012-05-10 18:59:08 -06:00
|
|
|
task_work_cancel(current, irq_thread_dtor);
|
2009-03-23 11:28:15 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-02-14 17:55:19 -07:00
|
|
|
/**
|
|
|
|
* irq_wake_thread - wake the irq thread for the action identified by dev_id
|
|
|
|
* @irq: Interrupt line
|
|
|
|
* @dev_id: Device identity for which the thread should be woken
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
void irq_wake_thread(unsigned int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
struct irqaction *action;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2016-01-14 02:54:13 -07:00
|
|
|
for_each_action_of_desc(desc, action) {
|
2014-02-14 17:55:19 -07:00
|
|
|
if (action->dev_id == dev_id) {
|
|
|
|
if (action->thread)
|
|
|
|
__irq_wake_thread(desc, action);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(irq_wake_thread);
|
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
static int irq_setup_forced_threading(struct irqaction *new)
|
2011-02-23 16:52:23 -07:00
|
|
|
{
|
|
|
|
if (!force_irqthreads)
|
2015-09-21 03:01:10 -06:00
|
|
|
return 0;
|
2011-02-23 16:52:23 -07:00
|
|
|
if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
|
2015-09-21 03:01:10 -06:00
|
|
|
return 0;
|
2011-02-23 16:52:23 -07:00
|
|
|
|
|
|
|
new->flags |= IRQF_ONESHOT;
|
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
/*
|
|
|
|
* Handle the case where we have a real primary handler and a
|
|
|
|
* thread handler. We force thread them as well by creating a
|
|
|
|
* secondary action.
|
|
|
|
*/
|
|
|
|
if (new->handler != irq_default_primary_handler && new->thread_fn) {
|
|
|
|
/* Allocate the secondary action */
|
|
|
|
new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
|
|
|
|
if (!new->secondary)
|
|
|
|
return -ENOMEM;
|
|
|
|
new->secondary->handler = irq_forced_secondary_handler;
|
|
|
|
new->secondary->thread_fn = new->thread_fn;
|
|
|
|
new->secondary->dev_id = new->dev_id;
|
|
|
|
new->secondary->irq = new->irq;
|
|
|
|
new->secondary->name = new->name;
|
2011-02-23 16:52:23 -07:00
|
|
|
}
|
2015-09-21 03:01:10 -06:00
|
|
|
/* Deal with the primary handler */
|
|
|
|
set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
|
|
|
|
new->thread_fn = new->handler;
|
|
|
|
new->handler = irq_default_primary_handler;
|
|
|
|
return 0;
|
2011-02-23 16:52:23 -07:00
|
|
|
}
|
|
|
|
|
2014-03-08 00:59:58 -07:00
|
|
|
static int irq_request_resources(struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct irq_data *d = &desc->irq_data;
|
|
|
|
struct irq_chip *c = d->chip;
|
|
|
|
|
|
|
|
return c->irq_request_resources ? c->irq_request_resources(d) : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void irq_release_resources(struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct irq_data *d = &desc->irq_data;
|
|
|
|
struct irq_chip *c = d->chip;
|
|
|
|
|
|
|
|
if (c->irq_release_resources)
|
|
|
|
c->irq_release_resources(d);
|
|
|
|
}
|
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
static int
|
|
|
|
setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
|
|
|
|
{
|
|
|
|
struct task_struct *t;
|
|
|
|
struct sched_param param = {
|
|
|
|
.sched_priority = MAX_USER_RT_PRIO/2,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (!secondary) {
|
|
|
|
t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
|
|
|
|
new->name);
|
|
|
|
} else {
|
|
|
|
t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
|
|
|
|
new->name);
|
|
|
|
param.sched_priority -= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (IS_ERR(t))
|
|
|
|
return PTR_ERR(t);
|
|
|
|
|
|
|
|
sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We keep the reference to the task struct even if
|
|
|
|
* the thread dies to avoid that the interrupt code
|
|
|
|
* references an already freed task_struct.
|
|
|
|
*/
|
|
|
|
get_task_struct(t);
|
|
|
|
new->thread = t;
|
|
|
|
/*
|
|
|
|
* Tell the thread to set its affinity. This is
|
|
|
|
* important for shared interrupt handlers as we do
|
|
|
|
* not invoke setup_affinity() for the secondary
|
|
|
|
* handlers as everything is already set up. Even for
|
|
|
|
* interrupts marked with IRQF_NO_BALANCE this is
|
|
|
|
* correct as we want the thread to move to the cpu(s)
|
|
|
|
* on which the requesting code placed the interrupt.
|
|
|
|
*/
|
|
|
|
set_bit(IRQTF_AFFINITY, &new->thread_flags);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Internal function to register an irqaction - typically used to
|
|
|
|
* allocate special interrupts that are part of the architecture.
|
|
|
|
*/
|
2008-10-16 01:55:00 -06:00
|
|
|
static int
|
2009-02-15 03:21:37 -07:00
|
|
|
__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-02-17 12:43:37 -07:00
|
|
|
struct irqaction *old, **old_ptr;
|
2011-02-23 16:52:13 -07:00
|
|
|
unsigned long flags, thread_mask = 0;
|
2011-02-07 08:02:20 -07:00
|
|
|
int ret, nested, shared = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-08-19 21:50:14 -06:00
|
|
|
if (!desc)
|
2005-11-03 07:51:18 -07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2010-10-01 04:58:38 -06:00
|
|
|
if (desc->irq_data.chip == &no_irq_chip)
|
2005-04-16 16:20:36 -06:00
|
|
|
return -ENOSYS;
|
2011-07-11 04:17:31 -06:00
|
|
|
if (!try_module_get(desc->owner))
|
|
|
|
return -ENODEV;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
new->irq = irq;
|
|
|
|
|
2016-06-07 09:12:27 -06:00
|
|
|
/*
|
|
|
|
* If the trigger type is not specified by the caller,
|
|
|
|
* then use the default for this interrupt.
|
|
|
|
*/
|
|
|
|
if (!(new->flags & IRQF_TRIGGER_MASK))
|
|
|
|
new->flags |= irqd_get_trigger_type(&desc->irq_data);
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
/*
|
2009-08-13 05:21:38 -06:00
|
|
|
* Check whether the interrupt nests into another interrupt
|
|
|
|
* thread.
|
|
|
|
*/
|
2011-02-09 06:44:17 -07:00
|
|
|
nested = irq_settings_is_nested_thread(desc);
|
2009-08-13 05:21:38 -06:00
|
|
|
if (nested) {
|
2011-07-11 04:17:31 -06:00
|
|
|
if (!new->thread_fn) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto out_mput;
|
|
|
|
}
|
2009-08-13 05:21:38 -06:00
|
|
|
/*
|
|
|
|
* Replace the primary handler which was provided from
|
|
|
|
* the driver for non nested interrupt handling by the
|
|
|
|
* dummy function which warns when called.
|
|
|
|
*/
|
|
|
|
new->handler = irq_nested_primary_handler;
|
2011-02-23 16:52:23 -07:00
|
|
|
} else {
|
2015-09-21 03:01:10 -06:00
|
|
|
if (irq_settings_can_thread(desc)) {
|
|
|
|
ret = irq_setup_forced_threading(new);
|
|
|
|
if (ret)
|
|
|
|
goto out_mput;
|
|
|
|
}
|
2009-08-13 05:21:38 -06:00
|
|
|
}
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
/*
|
2009-08-13 05:21:38 -06:00
|
|
|
* Create a handler thread when a thread function is supplied
|
|
|
|
* and the interrupt does not nest into another interrupt
|
|
|
|
* thread.
|
2009-03-23 11:28:15 -06:00
|
|
|
*/
|
2009-08-13 05:21:38 -06:00
|
|
|
if (new->thread_fn && !nested) {
|
2015-09-21 03:01:10 -06:00
|
|
|
ret = setup_irq_thread(new, irq, false);
|
|
|
|
if (ret)
|
2011-07-11 04:17:31 -06:00
|
|
|
goto out_mput;
|
2015-09-21 03:01:10 -06:00
|
|
|
if (new->secondary) {
|
|
|
|
ret = setup_irq_thread(new->secondary, irq, true);
|
|
|
|
if (ret)
|
|
|
|
goto out_thread;
|
2011-07-11 04:17:31 -06:00
|
|
|
}
|
2009-03-23 11:28:15 -06:00
|
|
|
}
|
|
|
|
|
2012-07-13 11:29:45 -06:00
|
|
|
/*
|
|
|
|
* Drivers are often written to work w/o knowledge about the
|
|
|
|
* underlying irq chip implementation, so a request for a
|
|
|
|
* threaded irq without a primary hard irq context handler
|
|
|
|
* requires the ONESHOT flag to be set. Some irq chips like
|
|
|
|
* MSI based interrupts are per se one shot safe. Check the
|
|
|
|
* chip flags, so we can avoid the unmask dance at the end of
|
|
|
|
* the threaded handler for those.
|
|
|
|
*/
|
|
|
|
if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
|
|
|
|
new->flags &= ~IRQF_ONESHOT;
|
|
|
|
|
2017-06-29 15:33:37 -06:00
|
|
|
mutex_lock(&desc->request_mutex);
|
2017-06-29 15:33:38 -06:00
|
|
|
if (!desc->action) {
|
|
|
|
ret = irq_request_resources(desc);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
|
|
|
|
new->name, irq, desc->irq_data.chip->name);
|
|
|
|
goto out_mutex;
|
|
|
|
}
|
|
|
|
}
|
2017-06-29 15:33:37 -06:00
|
|
|
|
2017-06-29 15:33:36 -06:00
|
|
|
chip_bus_lock(desc);
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* The following block of code has to be executed atomically
|
|
|
|
*/
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2009-02-17 12:43:37 -07:00
|
|
|
old_ptr = &desc->action;
|
|
|
|
old = *old_ptr;
|
2006-06-29 03:24:40 -06:00
|
|
|
if (old) {
|
2006-06-29 03:24:56 -06:00
|
|
|
/*
|
|
|
|
* Can't share interrupts unless both agree to and are
|
|
|
|
* the same type (level, edge, polarity). So both flag
|
2006-07-01 20:29:31 -06:00
|
|
|
* fields must have IRQF_SHARED set and the bits which
|
2011-02-23 16:52:16 -07:00
|
|
|
* set the trigger type must match. Also all must
|
|
|
|
* agree on ONESHOT.
|
2006-06-29 03:24:56 -06:00
|
|
|
*/
|
2017-04-15 04:08:31 -06:00
|
|
|
unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
|
|
|
|
|
2006-07-01 20:29:31 -06:00
|
|
|
if (!((old->flags & new->flags) & IRQF_SHARED) ||
|
2017-04-15 04:08:31 -06:00
|
|
|
(oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
|
2012-04-19 04:06:13 -06:00
|
|
|
((old->flags ^ new->flags) & IRQF_ONESHOT))
|
2006-03-25 04:08:23 -07:00
|
|
|
goto mismatch;
|
|
|
|
|
|
|
|
/* All handlers must agree on per-cpuness */
|
2006-07-01 20:29:31 -06:00
|
|
|
if ((old->flags & IRQF_PERCPU) !=
|
|
|
|
(new->flags & IRQF_PERCPU))
|
2006-03-25 04:08:23 -07:00
|
|
|
goto mismatch;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* add new interrupt at end of irq queue */
|
|
|
|
do {
|
2012-03-06 15:18:54 -07:00
|
|
|
/*
|
|
|
|
* Or all existing action->thread_mask bits,
|
|
|
|
* so we can find the next zero bit for this
|
|
|
|
* new action.
|
|
|
|
*/
|
2011-02-23 16:52:13 -07:00
|
|
|
thread_mask |= old->thread_mask;
|
2009-02-17 12:43:37 -07:00
|
|
|
old_ptr = &old->next;
|
|
|
|
old = *old_ptr;
|
2005-04-16 16:20:36 -06:00
|
|
|
} while (old);
|
|
|
|
shared = 1;
|
|
|
|
}
|
|
|
|
|
2011-02-23 16:52:13 -07:00
|
|
|
/*
|
2012-03-06 15:18:54 -07:00
|
|
|
* Setup the thread mask for this irqaction for ONESHOT. For
|
|
|
|
* !ONESHOT irqs the thread mask is 0 so we can avoid a
|
|
|
|
* conditional in irq_wake_thread().
|
2011-02-23 16:52:13 -07:00
|
|
|
*/
|
2012-03-06 15:18:54 -07:00
|
|
|
if (new->flags & IRQF_ONESHOT) {
|
|
|
|
/*
|
|
|
|
* Unlikely to have 32 resp 64 irqs sharing one line,
|
|
|
|
* but who knows.
|
|
|
|
*/
|
|
|
|
if (thread_mask == ~0UL) {
|
|
|
|
ret = -EBUSY;
|
2017-06-19 17:37:21 -06:00
|
|
|
goto out_unlock;
|
2012-03-06 15:18:54 -07:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* The thread_mask for the action is or'ed to
|
|
|
|
* desc->thread_active to indicate that the
|
|
|
|
* IRQF_ONESHOT thread handler has been woken, but not
|
|
|
|
* yet finished. The bit is cleared when a thread
|
|
|
|
* completes. When all threads of a shared interrupt
|
|
|
|
* line have completed desc->threads_active becomes
|
|
|
|
* zero and the interrupt line is unmasked. See
|
|
|
|
* handle.c:irq_wake_thread() for further information.
|
|
|
|
*
|
|
|
|
* If no thread is woken by primary (hard irq context)
|
|
|
|
* interrupt handlers, then desc->threads_active is
|
|
|
|
* also checked for zero to unmask the irq line in the
|
|
|
|
* affected hard irq flow handlers
|
|
|
|
* (handle_[fasteoi|level]_irq).
|
|
|
|
*
|
|
|
|
* The new action gets the first zero bit of
|
|
|
|
* thread_mask assigned. See the loop above which or's
|
|
|
|
* all existing action->thread_mask bits.
|
|
|
|
*/
|
|
|
|
new->thread_mask = 1 << ffz(thread_mask);
|
2012-04-19 02:35:17 -06:00
|
|
|
|
2012-07-13 11:29:45 -06:00
|
|
|
} else if (new->handler == irq_default_primary_handler &&
|
|
|
|
!(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
|
2012-04-19 02:35:17 -06:00
|
|
|
/*
|
|
|
|
* The interrupt was requested with handler = NULL, so
|
|
|
|
* we use the default primary handler for it. But it
|
|
|
|
* does not have the oneshot flag set. In combination
|
|
|
|
* with level interrupts this is deadly, because the
|
|
|
|
* default primary handler just wakes the thread, then
|
|
|
|
* the irq lines is reenabled, but the device still
|
|
|
|
* has the level irq asserted. Rinse and repeat....
|
|
|
|
*
|
|
|
|
* While this works for edge type interrupts, we play
|
|
|
|
* it safe and reject unconditionally because we can't
|
|
|
|
* say for sure which type this interrupt really
|
|
|
|
* has. The type flags are unreliable as the
|
|
|
|
* underlying chip implementation can override them.
|
|
|
|
*/
|
2012-05-31 17:26:07 -06:00
|
|
|
pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
|
2012-04-19 02:35:17 -06:00
|
|
|
irq);
|
|
|
|
ret = -EINVAL;
|
2017-06-19 17:37:21 -06:00
|
|
|
goto out_unlock;
|
2011-02-23 16:52:13 -07:00
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!shared) {
|
2009-03-23 11:28:15 -06:00
|
|
|
init_waitqueue_head(&desc->wait_for_threads);
|
|
|
|
|
2006-06-29 03:24:56 -06:00
|
|
|
/* Setup the type (level, edge polarity) if configured: */
|
2006-07-01 20:29:31 -06:00
|
|
|
if (new->flags & IRQF_TRIGGER_MASK) {
|
2015-06-23 11:47:29 -06:00
|
|
|
ret = __irq_set_trigger(desc,
|
|
|
|
new->flags & IRQF_TRIGGER_MASK);
|
2008-07-23 22:28:54 -06:00
|
|
|
|
2017-06-10 16:38:36 -06:00
|
|
|
if (ret) {
|
|
|
|
irq_release_resources(desc);
|
2017-06-19 17:37:21 -06:00
|
|
|
goto out_unlock;
|
2017-06-10 16:38:36 -06:00
|
|
|
}
|
2011-02-14 12:16:43 -07:00
|
|
|
}
|
2006-06-29 03:24:51 -06:00
|
|
|
|
2011-02-07 13:48:49 -07:00
|
|
|
desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
|
2011-03-28 06:10:52 -06:00
|
|
|
IRQS_ONESHOT | IRQS_WAITING);
|
|
|
|
irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
|
2006-06-29 03:24:50 -06:00
|
|
|
|
2011-02-08 09:11:03 -07:00
|
|
|
if (new->flags & IRQF_PERCPU) {
|
|
|
|
irqd_set(&desc->irq_data, IRQD_PER_CPU);
|
|
|
|
irq_settings_set_per_cpu(desc);
|
|
|
|
}
|
2011-02-08 07:40:05 -07:00
|
|
|
|
2009-08-13 04:17:22 -06:00
|
|
|
if (new->flags & IRQF_ONESHOT)
|
2011-02-07 13:02:10 -07:00
|
|
|
desc->istate |= IRQS_ONESHOT;
|
2009-08-13 04:17:22 -06:00
|
|
|
|
2017-06-19 17:37:23 -06:00
|
|
|
/* Exclude IRQ from balancing if requested */
|
|
|
|
if (new->flags & IRQF_NOBALANCING) {
|
|
|
|
irq_settings_set_no_balancing(desc);
|
|
|
|
irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
|
|
|
|
}
|
|
|
|
|
2017-05-31 03:58:33 -06:00
|
|
|
if (irq_settings_can_autoenable(desc)) {
|
2017-06-19 17:37:49 -06:00
|
|
|
irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
|
2017-05-31 03:58:33 -06:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Shared interrupts do not go well with disabling
|
|
|
|
* auto enable. The sharing interrupt might request
|
|
|
|
* it while it's still disabled and then wait for
|
|
|
|
* interrupts forever.
|
|
|
|
*/
|
|
|
|
WARN_ON_ONCE(new->flags & IRQF_SHARED);
|
2006-06-29 03:24:56 -06:00
|
|
|
/* Undo nested disables: */
|
|
|
|
desc->depth = 1;
|
2017-05-31 03:58:33 -06:00
|
|
|
}
|
2008-05-29 12:02:52 -06:00
|
|
|
|
2011-02-08 09:28:12 -07:00
|
|
|
} else if (new->flags & IRQF_TRIGGER_MASK) {
|
|
|
|
unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
|
2016-11-07 11:57:00 -07:00
|
|
|
unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
|
2011-02-08 09:28:12 -07:00
|
|
|
|
|
|
|
if (nmsk != omsk)
|
|
|
|
/* hope the handler works with current trigger mode */
|
2016-03-22 15:28:09 -06:00
|
|
|
pr_warn("irq %d uses trigger mode %u; requested %u\n",
|
2016-11-07 11:57:00 -07:00
|
|
|
irq, omsk, nmsk);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2008-07-23 22:28:54 -06:00
|
|
|
|
2009-02-17 12:43:37 -07:00
|
|
|
*old_ptr = new;
|
2008-07-23 22:28:54 -06:00
|
|
|
|
2014-08-28 03:44:31 -06:00
|
|
|
irq_pm_install_action(desc, new);
|
|
|
|
|
2007-01-23 15:16:31 -07:00
|
|
|
/* Reset broken irq detection when installing new handler */
|
|
|
|
desc->irq_count = 0;
|
|
|
|
desc->irqs_unhandled = 0;
|
2008-04-28 09:01:56 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Check whether we disabled the irq via the spurious handler
|
|
|
|
* before. Reenable it and give it another chance.
|
|
|
|
*/
|
2011-02-07 12:40:54 -07:00
|
|
|
if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
|
|
|
|
desc->istate &= ~IRQS_SPURIOUS_DISABLED;
|
2015-06-23 11:52:36 -06:00
|
|
|
__enable_irq(desc);
|
2008-04-28 09:01:56 -06:00
|
|
|
}
|
|
|
|
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2017-06-29 15:33:36 -06:00
|
|
|
chip_bus_sync_unlock(desc);
|
2017-06-29 15:33:37 -06:00
|
|
|
mutex_unlock(&desc->request_mutex);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2017-06-23 08:11:07 -06:00
|
|
|
irq_setup_timings(desc, new);
|
|
|
|
|
2009-08-17 06:07:16 -06:00
|
|
|
/*
|
|
|
|
* Strictly no need to wake it up, but hung_task complains
|
|
|
|
* when no hard interrupt wakes the thread up.
|
|
|
|
*/
|
|
|
|
if (new->thread)
|
|
|
|
wake_up_process(new->thread);
|
2015-09-21 03:01:10 -06:00
|
|
|
if (new->secondary)
|
|
|
|
wake_up_process(new->secondary->thread);
|
2009-08-17 06:07:16 -06:00
|
|
|
|
2008-08-19 21:50:11 -06:00
|
|
|
register_irq_proc(irq, desc);
|
2017-06-19 17:37:17 -06:00
|
|
|
irq_add_debugfs_entry(irq, desc);
|
2005-04-16 16:20:36 -06:00
|
|
|
new->dir = NULL;
|
|
|
|
register_handler_proc(irq, new);
|
|
|
|
return 0;
|
2006-03-25 04:08:23 -07:00
|
|
|
|
|
|
|
mismatch:
|
2006-07-01 20:29:31 -06:00
|
|
|
if (!(new->flags & IRQF_PROBE_SHARED)) {
|
2012-05-31 17:26:07 -06:00
|
|
|
pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
|
2012-04-19 04:06:13 -06:00
|
|
|
irq, new->flags, new->name, old->flags, old->name);
|
|
|
|
#ifdef CONFIG_DEBUG_SHIRQ
|
2006-04-27 19:39:18 -06:00
|
|
|
dump_stack();
|
2007-02-12 01:52:04 -07:00
|
|
|
#endif
|
2012-04-19 04:06:13 -06:00
|
|
|
}
|
2009-03-23 11:28:15 -06:00
|
|
|
ret = -EBUSY;
|
|
|
|
|
2017-06-19 17:37:21 -06:00
|
|
|
out_unlock:
|
2011-03-17 05:43:07 -06:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2011-02-07 08:02:20 -07:00
|
|
|
|
2017-06-29 15:33:36 -06:00
|
|
|
chip_bus_sync_unlock(desc);
|
|
|
|
|
2017-06-29 15:33:38 -06:00
|
|
|
if (!desc->action)
|
|
|
|
irq_release_resources(desc);
|
|
|
|
|
|
|
|
out_mutex:
|
2017-06-29 15:33:37 -06:00
|
|
|
mutex_unlock(&desc->request_mutex);
|
|
|
|
|
2009-03-23 11:28:15 -06:00
|
|
|
out_thread:
|
|
|
|
if (new->thread) {
|
|
|
|
struct task_struct *t = new->thread;
|
|
|
|
|
|
|
|
new->thread = NULL;
|
2012-03-09 06:59:40 -07:00
|
|
|
kthread_stop(t);
|
2009-03-23 11:28:15 -06:00
|
|
|
put_task_struct(t);
|
|
|
|
}
|
2015-09-21 03:01:10 -06:00
|
|
|
if (new->secondary && new->secondary->thread) {
|
|
|
|
struct task_struct *t = new->secondary->thread;
|
|
|
|
|
|
|
|
new->secondary->thread = NULL;
|
|
|
|
kthread_stop(t);
|
|
|
|
put_task_struct(t);
|
|
|
|
}
|
2011-07-11 04:17:31 -06:00
|
|
|
out_mput:
|
|
|
|
module_put(desc->owner);
|
2009-03-23 11:28:15 -06:00
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2008-10-16 01:55:00 -06:00
|
|
|
/**
|
|
|
|
* setup_irq - setup an interrupt
|
|
|
|
* @irq: Interrupt line to setup
|
|
|
|
* @act: irqaction for the interrupt
|
|
|
|
*
|
|
|
|
* Used to statically setup interrupts in the early boot process.
|
|
|
|
*/
|
|
|
|
int setup_irq(unsigned int irq, struct irqaction *act)
|
|
|
|
{
|
2011-02-09 17:04:25 -07:00
|
|
|
int retval;
|
2008-10-16 01:55:00 -06:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
2016-05-10 09:14:35 -06:00
|
|
|
if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
return -EINVAL;
|
2016-06-07 09:12:29 -06:00
|
|
|
|
|
|
|
retval = irq_chip_pm_get(&desc->irq_data);
|
|
|
|
if (retval < 0)
|
|
|
|
return retval;
|
|
|
|
|
2011-02-09 17:04:25 -07:00
|
|
|
retval = __setup_irq(irq, desc, act);
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
if (retval)
|
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
|
|
|
|
2011-02-09 17:04:25 -07:00
|
|
|
return retval;
|
2008-10-16 01:55:00 -06:00
|
|
|
}
|
2009-03-12 06:05:59 -06:00
|
|
|
EXPORT_SYMBOL_GPL(setup_irq);
|
2008-10-16 01:55:00 -06:00
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
/*
|
2009-03-12 06:05:51 -06:00
|
|
|
* Internal function to unregister an irqaction - used to free
|
|
|
|
* regular and special interrupts that are part of the architecture.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
2009-03-12 06:05:51 -06:00
|
|
|
static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2008-10-16 01:55:00 -06:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
2009-02-17 12:43:37 -07:00
|
|
|
struct irqaction *action, **action_ptr;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
2009-02-15 03:29:50 -07:00
|
|
|
WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
|
2008-08-19 21:50:14 -06:00
|
|
|
|
|
|
|
if (!desc)
|
2009-03-12 06:05:42 -06:00
|
|
|
return NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2017-06-29 15:33:37 -06:00
|
|
|
mutex_lock(&desc->request_mutex);
|
2015-12-13 10:12:30 -07:00
|
|
|
chip_bus_lock(desc);
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
2009-02-15 03:29:50 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* There can be multiple actions per IRQ descriptor, find the right
|
|
|
|
* one based on the dev_id:
|
|
|
|
*/
|
2009-02-17 12:43:37 -07:00
|
|
|
action_ptr = &desc->action;
|
2005-04-16 16:20:36 -06:00
|
|
|
for (;;) {
|
2009-02-17 12:43:37 -07:00
|
|
|
action = *action_ptr;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-02-15 03:29:50 -07:00
|
|
|
if (!action) {
|
|
|
|
WARN(1, "Trying to free already-free IRQ %d\n", irq);
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2015-12-13 10:12:30 -07:00
|
|
|
chip_bus_sync_unlock(desc);
|
2009-03-12 06:05:42 -06:00
|
|
|
return NULL;
|
2009-02-15 03:29:50 -07:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-02-17 12:28:29 -07:00
|
|
|
if (action->dev_id == dev_id)
|
|
|
|
break;
|
2009-02-17 12:43:37 -07:00
|
|
|
action_ptr = &action->next;
|
2009-02-15 03:29:50 -07:00
|
|
|
}
|
[PATCH] uml: add and use generic hw_controller_type->release
With Chris Wedgwood <cw@f00f.org>
Currently UML must explicitly call the UML-specific
free_irq_by_irq_and_dev() for each free_irq call it's done.
This is needed because ->shutdown and/or ->disable are only called when the
last "action" for that irq is removed.
Instead, for UML shared IRQs (UML IRQs are very often, if not always,
shared), for each dev_id some setup is done, which must be cleared on the
release of that fd. For instance, for each open console a new instance
(i.e. new dev_id) of the same IRQ is requested().
Exactly, a fd is stored in an array (pollfds), which is after read by a
host thread and passed to poll(). Each event registered by poll() triggers
an interrupt. So, for each free_irq() we must remove the corresponding
host fd from the table, which we do via this -release() method.
In this patch we add an appropriate hook for this, and remove all uses of
it by pointing the hook to the said procedure; this is safe to do since the
said procedure.
Also some cosmetic improvements are included.
This is heavily based on some work by Chris Wedgwood, which however didn't
get the patch merged for something I'd call a "misunderstanding" (the need
for this patch wasn't cleanly explained, thus adding the generic hook was
felt as undesirable).
Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
CC: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-21 18:16:19 -06:00
|
|
|
|
2009-02-15 03:29:50 -07:00
|
|
|
/* Found it - now remove it from the list of entries: */
|
2009-02-17 12:43:37 -07:00
|
|
|
*action_ptr = action->next;
|
2009-02-15 03:29:50 -07:00
|
|
|
|
2014-08-28 03:44:31 -06:00
|
|
|
irq_pm_remove_action(desc, action);
|
|
|
|
|
2009-02-15 03:29:50 -07:00
|
|
|
/* If this was the last handler, shut down the IRQ line: */
|
2014-03-08 00:59:58 -07:00
|
|
|
if (!desc->action) {
|
2015-10-09 15:28:58 -06:00
|
|
|
irq_settings_clr_disable_unlazy(desc);
|
2011-02-02 14:41:14 -07:00
|
|
|
irq_shutdown(desc);
|
2014-03-08 00:59:58 -07:00
|
|
|
}
|
2009-03-23 11:28:15 -06:00
|
|
|
|
2010-04-30 15:44:50 -06:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
/* make sure affinity_hint is cleaned up */
|
|
|
|
if (WARN_ON_ONCE(desc->affinity_hint))
|
|
|
|
desc->affinity_hint = NULL;
|
|
|
|
#endif
|
|
|
|
|
2009-11-17 08:46:45 -07:00
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
2015-12-13 10:12:30 -07:00
|
|
|
chip_bus_sync_unlock(desc);
|
2009-02-15 03:29:50 -07:00
|
|
|
|
|
|
|
unregister_handler_proc(irq, action);
|
|
|
|
|
|
|
|
/* Make sure it's not being used on another CPU: */
|
|
|
|
synchronize_irq(irq);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-01-30 05:33:24 -07:00
|
|
|
#ifdef CONFIG_DEBUG_SHIRQ
|
2009-02-15 03:29:50 -07:00
|
|
|
/*
|
|
|
|
* It's a shared IRQ -- the driver ought to be prepared for an IRQ
|
|
|
|
* event to happen even now it's being freed, so let's make sure that
|
|
|
|
* is so by doing an extra call to the handler ....
|
|
|
|
*
|
|
|
|
* ( We do this after actually deregistering it, to make sure that a
|
|
|
|
* 'real' IRQ doesn't run in * parallel with our fake. )
|
|
|
|
*/
|
|
|
|
if (action->flags & IRQF_SHARED) {
|
|
|
|
local_irq_save(flags);
|
|
|
|
action->handler(irq, dev_id);
|
|
|
|
local_irq_restore(flags);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-02-15 03:29:50 -07:00
|
|
|
#endif
|
2009-08-13 14:05:10 -06:00
|
|
|
|
|
|
|
if (action->thread) {
|
2012-03-09 06:59:40 -07:00
|
|
|
kthread_stop(action->thread);
|
2009-08-13 14:05:10 -06:00
|
|
|
put_task_struct(action->thread);
|
2015-09-21 03:01:10 -06:00
|
|
|
if (action->secondary && action->secondary->thread) {
|
|
|
|
kthread_stop(action->secondary->thread);
|
|
|
|
put_task_struct(action->secondary->thread);
|
|
|
|
}
|
2009-08-13 14:05:10 -06:00
|
|
|
}
|
|
|
|
|
2017-06-29 15:33:39 -06:00
|
|
|
if (!desc->action) {
|
2017-06-29 15:33:38 -06:00
|
|
|
irq_release_resources(desc);
|
2017-06-29 15:33:39 -06:00
|
|
|
irq_remove_timings(desc);
|
|
|
|
}
|
2017-06-29 15:33:38 -06:00
|
|
|
|
2017-06-29 15:33:37 -06:00
|
|
|
mutex_unlock(&desc->request_mutex);
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
2011-07-11 04:17:31 -06:00
|
|
|
module_put(desc->owner);
|
2015-09-21 03:01:10 -06:00
|
|
|
kfree(action->secondary);
|
2009-03-12 06:05:42 -06:00
|
|
|
return action;
|
|
|
|
}
|
|
|
|
|
2009-03-12 06:05:51 -06:00
|
|
|
/**
|
|
|
|
* remove_irq - free an interrupt
|
|
|
|
* @irq: Interrupt line to free
|
|
|
|
* @act: irqaction for the interrupt
|
|
|
|
*
|
|
|
|
* Used to remove interrupts statically setup by the early boot process.
|
|
|
|
*/
|
|
|
|
void remove_irq(unsigned int irq, struct irqaction *act)
|
|
|
|
{
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
|
2017-04-13 01:06:40 -06:00
|
|
|
__free_irq(irq, act->dev_id);
|
2009-03-12 06:05:51 -06:00
|
|
|
}
|
2009-03-12 06:05:59 -06:00
|
|
|
EXPORT_SYMBOL_GPL(remove_irq);
|
2009-03-12 06:05:51 -06:00
|
|
|
|
2009-03-12 06:05:42 -06:00
|
|
|
/**
|
|
|
|
* free_irq - free an interrupt allocated with request_irq
|
|
|
|
* @irq: Interrupt line to free
|
|
|
|
* @dev_id: Device identity to free
|
|
|
|
*
|
|
|
|
* Remove an interrupt handler. The handler is removed and if the
|
|
|
|
* interrupt line is no longer in use by any driver it is disabled.
|
|
|
|
* On a shared IRQ the caller must ensure the interrupt is disabled
|
|
|
|
* on the card it drives before calling this function. The function
|
|
|
|
* does not return until any executing interrupts for this IRQ
|
|
|
|
* have completed.
|
|
|
|
*
|
|
|
|
* This function must not be called from interrupt context.
|
2017-04-13 01:06:41 -06:00
|
|
|
*
|
|
|
|
* Returns the devname argument passed to request_irq.
|
2009-03-12 06:05:42 -06:00
|
|
|
*/
|
2017-04-13 01:06:41 -06:00
|
|
|
const void *free_irq(unsigned int irq, void *dev_id)
|
2009-03-12 06:05:42 -06:00
|
|
|
{
|
2009-08-13 04:17:48 -06:00
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
2017-04-13 01:06:41 -06:00
|
|
|
struct irqaction *action;
|
|
|
|
const char *devname;
|
2009-08-13 04:17:48 -06:00
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
|
2017-04-13 01:06:41 -06:00
|
|
|
return NULL;
|
2009-08-13 04:17:48 -06:00
|
|
|
|
2011-01-19 14:01:44 -07:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
if (WARN_ON(desc->affinity_notify))
|
|
|
|
desc->affinity_notify = NULL;
|
|
|
|
#endif
|
|
|
|
|
2017-04-13 01:06:41 -06:00
|
|
|
action = __free_irq(irq, dev_id);
|
|
|
|
devname = action->name;
|
|
|
|
kfree(action);
|
|
|
|
return devname;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(free_irq);
|
|
|
|
|
|
|
|
/**
|
2009-03-23 11:28:15 -06:00
|
|
|
* request_threaded_irq - allocate an interrupt line
|
2005-04-16 16:20:36 -06:00
|
|
|
* @irq: Interrupt line to allocate
|
2009-03-23 11:28:15 -06:00
|
|
|
* @handler: Function to be called when the IRQ occurs.
|
|
|
|
* Primary handler for threaded interrupts
|
2009-08-13 04:17:22 -06:00
|
|
|
* If NULL and thread_fn != NULL the default
|
|
|
|
* primary handler is installed
|
2009-03-24 04:46:22 -06:00
|
|
|
* @thread_fn: Function called from the irq handler thread
|
|
|
|
* If NULL, no irq thread is created
|
2005-04-16 16:20:36 -06:00
|
|
|
* @irqflags: Interrupt type flags
|
|
|
|
* @devname: An ascii name for the claiming device
|
|
|
|
* @dev_id: A cookie passed back to the handler function
|
|
|
|
*
|
|
|
|
* This call allocates interrupt resources and enables the
|
|
|
|
* interrupt line and IRQ handling. From the point this
|
|
|
|
* call is made your handler function may be invoked. Since
|
|
|
|
* your handler function must clear any interrupt the board
|
|
|
|
* raises, you must take care both to initialise your hardware
|
|
|
|
* and to set up the interrupt handler in the right order.
|
|
|
|
*
|
2009-03-23 11:28:15 -06:00
|
|
|
* If you want to set up a threaded irq handler for your device
|
2011-10-26 03:16:11 -06:00
|
|
|
* then you need to supply @handler and @thread_fn. @handler is
|
2009-03-23 11:28:15 -06:00
|
|
|
* still called in hard interrupt context and has to check
|
|
|
|
* whether the interrupt originates from the device. If yes it
|
|
|
|
* needs to disable the interrupt on the device and return
|
2009-05-12 12:35:54 -06:00
|
|
|
* IRQ_WAKE_THREAD which will wake up the handler thread and run
|
2009-03-23 11:28:15 -06:00
|
|
|
* @thread_fn. This split handler design is necessary to support
|
|
|
|
* shared interrupts.
|
|
|
|
*
|
2005-04-16 16:20:36 -06:00
|
|
|
* Dev_id must be globally unique. Normally the address of the
|
|
|
|
* device data structure is used as the cookie. Since the handler
|
|
|
|
* receives this value it makes sense to use it.
|
|
|
|
*
|
|
|
|
* If your interrupt is shared you must pass a non NULL dev_id
|
|
|
|
* as this is required when freeing the interrupt.
|
|
|
|
*
|
|
|
|
* Flags:
|
|
|
|
*
|
2006-07-01 20:29:31 -06:00
|
|
|
* IRQF_SHARED Interrupt is shared
|
2008-10-01 15:46:18 -06:00
|
|
|
* IRQF_TRIGGER_* Specify active edge(s) or level
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
|
|
|
*/
|
2009-03-23 11:28:15 -06:00
|
|
|
int request_threaded_irq(unsigned int irq, irq_handler_t handler,
|
|
|
|
irq_handler_t thread_fn, unsigned long irqflags,
|
|
|
|
const char *devname, void *dev_id)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2006-06-29 03:24:40 -06:00
|
|
|
struct irqaction *action;
|
2008-08-19 21:50:05 -06:00
|
|
|
struct irq_desc *desc;
|
2008-10-16 01:55:00 -06:00
|
|
|
int retval;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
x86/ACPI/PCI: Recognize that Interrupt Line 255 means "not connected"
Per the x86-specific footnote to PCI spec r3.0, sec 6.2.4, the value 255 in
the Interrupt Line register means "unknown" or "no connection."
Previously, when we couldn't derive an IRQ from the _PRT, we fell back to
using the value from Interrupt Line as an IRQ. It's questionable whether
we should do that at all, but the spec clearly suggests we shouldn't do it
for the value 255 on x86.
Calling request_irq() with IRQ 255 may succeed, but the driver won't
receive any interrupts. Or, if IRQ 255 is shared with another device, it
may succeed, and the driver's ISR will be called at random times when the
*other* device interrupts. Or it may fail if another device is using IRQ
255 with incompatible flags. What we *want* is for request_irq() to fail
predictably so the driver can fall back to polling.
On x86, assume 255 in the Interrupt Line means the INTx line is not
connected. In that case, set dev->irq to IRQ_NOTCONNECTED so request_irq()
will fail gracefully with -ENOTCONN.
We found this problem on a system where Secure Boot firmware assigned
Interrupt Line 255 to an i801_smbus device and another device was already
using MSI-X IRQ 255. This was in v3.10, where i801_probe() fails if
request_irq() fails:
i801_smbus 0000:00:1f.3: enabling device (0140 -> 0143)
i801_smbus 0000:00:1f.3: can't derive routing for PCI INT C
i801_smbus 0000:00:1f.3: PCI INT C: no GSI
genirq: Flags mismatch irq 255. 00000080 (i801_smbus) vs. 00000000 (megasa)
CPU: 0 PID: 2487 Comm: kworker/0:1 Not tainted 3.10.0-229.el7.x86_64 #1
Hardware name: FUJITSU PRIMEQUEST 2800E2/D3736, BIOS PRIMEQUEST 2000 Serie5
Call Trace:
dump_stack+0x19/0x1b
__setup_irq+0x54a/0x570
request_threaded_irq+0xcc/0x170
i801_probe+0x32f/0x508 [i2c_i801]
local_pci_probe+0x45/0xa0
i801_smbus 0000:00:1f.3: Failed to allocate irq 255: -16
i801_smbus: probe of 0000:00:1f.3 failed with error -16
After aeb8a3d16ae0 ("i2c: i801: Check if interrupts are disabled"),
i801_probe() will fall back to polling if request_irq() fails. But we
still need this patch because request_irq() may succeed or fail depending
on other devices in the system. If request_irq() fails, i801_smbus will
work by falling back to polling, but if it succeeds, i801_smbus won't work
because it expects interrupts that it may not receive.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-02-14 21:52:01 -07:00
|
|
|
if (irq == IRQ_NOTCONNECTED)
|
|
|
|
return -ENOTCONN;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* Sanity-check: shared interrupts must pass in a real dev-ID,
|
|
|
|
* otherwise we'll have trouble later trying to figure out
|
|
|
|
* which interrupt is which (messes up the interrupt freeing
|
|
|
|
* logic etc).
|
genirq / PM: Add flag for shared NO_SUSPEND interrupt lines
It currently is required that all users of NO_SUSPEND interrupt
lines pass the IRQF_NO_SUSPEND flag when requesting the IRQ or the
WARN_ON_ONCE() in irq_pm_install_action() will trigger. That is
done to warn about situations in which unprepared interrupt handlers
may be run unnecessarily for suspended devices and may attempt to
access those devices by mistake. However, it may cause drivers
that have no technical reasons for using IRQF_NO_SUSPEND to set
that flag just because they happen to share the interrupt line
with something like a timer.
Moreover, the generic handling of wakeup interrupts introduced by
commit 9ce7a25849e8 (genirq: Simplify wakeup mechanism) only works
for IRQs without any NO_SUSPEND users, so the drivers of wakeup
devices needing to use shared NO_SUSPEND interrupt lines for
signaling system wakeup generally have to detect wakeup in their
interrupt handlers. Thus if they happen to share an interrupt line
with a NO_SUSPEND user, they also need to request that their
interrupt handlers be run after suspend_device_irqs().
In both cases the reason for using IRQF_NO_SUSPEND is not because
the driver in question has a genuine need to run its interrupt
handler after suspend_device_irqs(), but because it happens to
share the line with some other NO_SUSPEND user. Otherwise, the
driver would do without IRQF_NO_SUSPEND just fine.
To make it possible to specify that condition explicitly, introduce
a new IRQ action handler flag for shared IRQs, IRQF_COND_SUSPEND,
that, when set, will indicate to the IRQ core that the interrupt
user is generally fine with suspending the IRQ, but it also can
tolerate handler invocations after suspend_device_irqs() and, in
particular, it is capable of detecting system wakeup and triggering
it as appropriate from its interrupt handler.
That will allow us to work around a problem with a shared timer
interrupt line on at91 platforms.
Link: http://marc.info/?l=linux-kernel&m=142252777602084&w=2
Link: http://marc.info/?t=142252775300011&r=1&w=2
Link: https://lkml.org/lkml/2014/12/15/552
Reported-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
2015-02-26 16:07:55 -07:00
|
|
|
*
|
|
|
|
* Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
|
|
|
|
* it cannot be set along with IRQF_NO_SUSPEND.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
genirq / PM: Add flag for shared NO_SUSPEND interrupt lines
It currently is required that all users of NO_SUSPEND interrupt
lines pass the IRQF_NO_SUSPEND flag when requesting the IRQ or the
WARN_ON_ONCE() in irq_pm_install_action() will trigger. That is
done to warn about situations in which unprepared interrupt handlers
may be run unnecessarily for suspended devices and may attempt to
access those devices by mistake. However, it may cause drivers
that have no technical reasons for using IRQF_NO_SUSPEND to set
that flag just because they happen to share the interrupt line
with something like a timer.
Moreover, the generic handling of wakeup interrupts introduced by
commit 9ce7a25849e8 (genirq: Simplify wakeup mechanism) only works
for IRQs without any NO_SUSPEND users, so the drivers of wakeup
devices needing to use shared NO_SUSPEND interrupt lines for
signaling system wakeup generally have to detect wakeup in their
interrupt handlers. Thus if they happen to share an interrupt line
with a NO_SUSPEND user, they also need to request that their
interrupt handlers be run after suspend_device_irqs().
In both cases the reason for using IRQF_NO_SUSPEND is not because
the driver in question has a genuine need to run its interrupt
handler after suspend_device_irqs(), but because it happens to
share the line with some other NO_SUSPEND user. Otherwise, the
driver would do without IRQF_NO_SUSPEND just fine.
To make it possible to specify that condition explicitly, introduce
a new IRQ action handler flag for shared IRQs, IRQF_COND_SUSPEND,
that, when set, will indicate to the IRQ core that the interrupt
user is generally fine with suspending the IRQ, but it also can
tolerate handler invocations after suspend_device_irqs() and, in
particular, it is capable of detecting system wakeup and triggering
it as appropriate from its interrupt handler.
That will allow us to work around a problem with a shared timer
interrupt line on at91 platforms.
Link: http://marc.info/?l=linux-kernel&m=142252777602084&w=2
Link: http://marc.info/?t=142252775300011&r=1&w=2
Link: https://lkml.org/lkml/2014/12/15/552
Reported-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
2015-02-26 16:07:55 -07:00
|
|
|
if (((irqflags & IRQF_SHARED) && !dev_id) ||
|
|
|
|
(!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
|
|
|
|
((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
2008-08-19 21:50:14 -06:00
|
|
|
|
2008-08-19 21:50:17 -06:00
|
|
|
desc = irq_to_desc(irq);
|
2008-08-19 21:50:14 -06:00
|
|
|
if (!desc)
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
2008-08-19 21:50:14 -06:00
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
if (!irq_settings_can_request(desc) ||
|
|
|
|
WARN_ON(irq_settings_is_per_cpu_devid(desc)))
|
2006-06-29 03:24:49 -06:00
|
|
|
return -EINVAL;
|
2009-08-13 04:17:22 -06:00
|
|
|
|
|
|
|
if (!handler) {
|
|
|
|
if (!thread_fn)
|
|
|
|
return -EINVAL;
|
|
|
|
handler = irq_default_primary_handler;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-02-22 15:00:32 -07:00
|
|
|
action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!action)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
action->handler = handler;
|
2009-03-23 11:28:15 -06:00
|
|
|
action->thread_fn = thread_fn;
|
2005-04-16 16:20:36 -06:00
|
|
|
action->flags = irqflags;
|
|
|
|
action->name = devname;
|
|
|
|
action->dev_id = dev_id;
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
retval = irq_chip_pm_get(&desc->irq_data);
|
2016-08-22 02:21:52 -06:00
|
|
|
if (retval < 0) {
|
|
|
|
kfree(action);
|
2016-06-07 09:12:29 -06:00
|
|
|
return retval;
|
2016-08-22 02:21:52 -06:00
|
|
|
}
|
2016-06-07 09:12:29 -06:00
|
|
|
|
2008-10-16 01:55:00 -06:00
|
|
|
retval = __setup_irq(irq, desc, action);
|
2009-08-13 04:17:48 -06:00
|
|
|
|
2015-09-21 03:01:10 -06:00
|
|
|
if (retval) {
|
2016-06-07 09:12:29 -06:00
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
2015-09-21 03:01:10 -06:00
|
|
|
kfree(action->secondary);
|
2008-08-21 12:58:28 -06:00
|
|
|
kfree(action);
|
2015-09-21 03:01:10 -06:00
|
|
|
}
|
2008-08-21 12:58:28 -06:00
|
|
|
|
2011-02-18 15:27:23 -07:00
|
|
|
#ifdef CONFIG_DEBUG_SHIRQ_FIXME
|
2009-04-01 11:06:35 -06:00
|
|
|
if (!retval && (irqflags & IRQF_SHARED)) {
|
2007-02-12 01:52:00 -07:00
|
|
|
/*
|
|
|
|
* It's a shared IRQ -- the driver ought to be prepared for it
|
|
|
|
* to happen immediately, so let's make sure....
|
2008-08-21 12:58:28 -06:00
|
|
|
* We disable the irq to make sure that a 'real' IRQ doesn't
|
|
|
|
* run in parallel with our fake.
|
2007-02-12 01:52:00 -07:00
|
|
|
*/
|
2007-08-31 00:56:34 -06:00
|
|
|
unsigned long flags;
|
2007-02-12 01:52:00 -07:00
|
|
|
|
2008-08-21 12:58:28 -06:00
|
|
|
disable_irq(irq);
|
2007-08-31 00:56:34 -06:00
|
|
|
local_irq_save(flags);
|
2008-08-21 12:58:28 -06:00
|
|
|
|
2007-08-31 00:56:34 -06:00
|
|
|
handler(irq, dev_id);
|
2008-08-21 12:58:28 -06:00
|
|
|
|
2007-08-31 00:56:34 -06:00
|
|
|
local_irq_restore(flags);
|
2008-08-21 12:58:28 -06:00
|
|
|
enable_irq(irq);
|
2007-02-12 01:52:00 -07:00
|
|
|
}
|
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
return retval;
|
|
|
|
}
|
2009-03-23 11:28:15 -06:00
|
|
|
EXPORT_SYMBOL(request_threaded_irq);
|
genirq: Introduce request_any_context_irq()
Now that we enjoy threaded interrupts, we're starting to see irq_chip
implementations (wm831x, pca953x) that make use of threaded interrupts
for the controller, and nested interrupts for the client interrupt. It
all works very well, with one drawback:
Drivers requesting an IRQ must now know whether the handler will
run in a thread context or not, and call request_threaded_irq() or
request_irq() accordingly.
The problem is that the requesting driver sometimes doesn't know
about the nature of the interrupt, specially when the interrupt
controller is a discrete chip (typically a GPIO expander connected
over I2C) that can be connected to a wide variety of otherwise perfectly
supported hardware.
This patch introduces the request_any_context_irq() function that mostly
mimics the usual request_irq(), except that it checks whether the irq
level is configured as nested or not, and calls the right backend.
On success, it also returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
[ tglx: Made return value an enum, simplified code and made the export
of request_any_context_irq GPL ]
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Cc: <joachim.eastwood@jotron.com>
LKML-Reference: <927ea285bd0c68934ddae1a47e44a9ba@localhost>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-03-15 16:56:33 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* request_any_context_irq - allocate an interrupt line
|
|
|
|
* @irq: Interrupt line to allocate
|
|
|
|
* @handler: Function to be called when the IRQ occurs.
|
|
|
|
* Threaded handler for threaded interrupts.
|
|
|
|
* @flags: Interrupt type flags
|
|
|
|
* @name: An ascii name for the claiming device
|
|
|
|
* @dev_id: A cookie passed back to the handler function
|
|
|
|
*
|
|
|
|
* This call allocates interrupt resources and enables the
|
|
|
|
* interrupt line and IRQ handling. It selects either a
|
|
|
|
* hardirq or threaded handling method depending on the
|
|
|
|
* context.
|
|
|
|
*
|
|
|
|
* On failure, it returns a negative value. On success,
|
|
|
|
* it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
|
|
|
|
*/
|
|
|
|
int request_any_context_irq(unsigned int irq, irq_handler_t handler,
|
|
|
|
unsigned long flags, const char *name, void *dev_id)
|
|
|
|
{
|
x86/ACPI/PCI: Recognize that Interrupt Line 255 means "not connected"
Per the x86-specific footnote to PCI spec r3.0, sec 6.2.4, the value 255 in
the Interrupt Line register means "unknown" or "no connection."
Previously, when we couldn't derive an IRQ from the _PRT, we fell back to
using the value from Interrupt Line as an IRQ. It's questionable whether
we should do that at all, but the spec clearly suggests we shouldn't do it
for the value 255 on x86.
Calling request_irq() with IRQ 255 may succeed, but the driver won't
receive any interrupts. Or, if IRQ 255 is shared with another device, it
may succeed, and the driver's ISR will be called at random times when the
*other* device interrupts. Or it may fail if another device is using IRQ
255 with incompatible flags. What we *want* is for request_irq() to fail
predictably so the driver can fall back to polling.
On x86, assume 255 in the Interrupt Line means the INTx line is not
connected. In that case, set dev->irq to IRQ_NOTCONNECTED so request_irq()
will fail gracefully with -ENOTCONN.
We found this problem on a system where Secure Boot firmware assigned
Interrupt Line 255 to an i801_smbus device and another device was already
using MSI-X IRQ 255. This was in v3.10, where i801_probe() fails if
request_irq() fails:
i801_smbus 0000:00:1f.3: enabling device (0140 -> 0143)
i801_smbus 0000:00:1f.3: can't derive routing for PCI INT C
i801_smbus 0000:00:1f.3: PCI INT C: no GSI
genirq: Flags mismatch irq 255. 00000080 (i801_smbus) vs. 00000000 (megasa)
CPU: 0 PID: 2487 Comm: kworker/0:1 Not tainted 3.10.0-229.el7.x86_64 #1
Hardware name: FUJITSU PRIMEQUEST 2800E2/D3736, BIOS PRIMEQUEST 2000 Serie5
Call Trace:
dump_stack+0x19/0x1b
__setup_irq+0x54a/0x570
request_threaded_irq+0xcc/0x170
i801_probe+0x32f/0x508 [i2c_i801]
local_pci_probe+0x45/0xa0
i801_smbus 0000:00:1f.3: Failed to allocate irq 255: -16
i801_smbus: probe of 0000:00:1f.3 failed with error -16
After aeb8a3d16ae0 ("i2c: i801: Check if interrupts are disabled"),
i801_probe() will fall back to polling if request_irq() fails. But we
still need this patch because request_irq() may succeed or fail depending
on other devices in the system. If request_irq() fails, i801_smbus will
work by falling back to polling, but if it succeeds, i801_smbus won't work
because it expects interrupts that it may not receive.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-02-14 21:52:01 -07:00
|
|
|
struct irq_desc *desc;
|
genirq: Introduce request_any_context_irq()
Now that we enjoy threaded interrupts, we're starting to see irq_chip
implementations (wm831x, pca953x) that make use of threaded interrupts
for the controller, and nested interrupts for the client interrupt. It
all works very well, with one drawback:
Drivers requesting an IRQ must now know whether the handler will
run in a thread context or not, and call request_threaded_irq() or
request_irq() accordingly.
The problem is that the requesting driver sometimes doesn't know
about the nature of the interrupt, specially when the interrupt
controller is a discrete chip (typically a GPIO expander connected
over I2C) that can be connected to a wide variety of otherwise perfectly
supported hardware.
This patch introduces the request_any_context_irq() function that mostly
mimics the usual request_irq(), except that it checks whether the irq
level is configured as nested or not, and calls the right backend.
On success, it also returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
[ tglx: Made return value an enum, simplified code and made the export
of request_any_context_irq GPL ]
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Cc: <joachim.eastwood@jotron.com>
LKML-Reference: <927ea285bd0c68934ddae1a47e44a9ba@localhost>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-03-15 16:56:33 -06:00
|
|
|
int ret;
|
|
|
|
|
x86/ACPI/PCI: Recognize that Interrupt Line 255 means "not connected"
Per the x86-specific footnote to PCI spec r3.0, sec 6.2.4, the value 255 in
the Interrupt Line register means "unknown" or "no connection."
Previously, when we couldn't derive an IRQ from the _PRT, we fell back to
using the value from Interrupt Line as an IRQ. It's questionable whether
we should do that at all, but the spec clearly suggests we shouldn't do it
for the value 255 on x86.
Calling request_irq() with IRQ 255 may succeed, but the driver won't
receive any interrupts. Or, if IRQ 255 is shared with another device, it
may succeed, and the driver's ISR will be called at random times when the
*other* device interrupts. Or it may fail if another device is using IRQ
255 with incompatible flags. What we *want* is for request_irq() to fail
predictably so the driver can fall back to polling.
On x86, assume 255 in the Interrupt Line means the INTx line is not
connected. In that case, set dev->irq to IRQ_NOTCONNECTED so request_irq()
will fail gracefully with -ENOTCONN.
We found this problem on a system where Secure Boot firmware assigned
Interrupt Line 255 to an i801_smbus device and another device was already
using MSI-X IRQ 255. This was in v3.10, where i801_probe() fails if
request_irq() fails:
i801_smbus 0000:00:1f.3: enabling device (0140 -> 0143)
i801_smbus 0000:00:1f.3: can't derive routing for PCI INT C
i801_smbus 0000:00:1f.3: PCI INT C: no GSI
genirq: Flags mismatch irq 255. 00000080 (i801_smbus) vs. 00000000 (megasa)
CPU: 0 PID: 2487 Comm: kworker/0:1 Not tainted 3.10.0-229.el7.x86_64 #1
Hardware name: FUJITSU PRIMEQUEST 2800E2/D3736, BIOS PRIMEQUEST 2000 Serie5
Call Trace:
dump_stack+0x19/0x1b
__setup_irq+0x54a/0x570
request_threaded_irq+0xcc/0x170
i801_probe+0x32f/0x508 [i2c_i801]
local_pci_probe+0x45/0xa0
i801_smbus 0000:00:1f.3: Failed to allocate irq 255: -16
i801_smbus: probe of 0000:00:1f.3 failed with error -16
After aeb8a3d16ae0 ("i2c: i801: Check if interrupts are disabled"),
i801_probe() will fall back to polling if request_irq() fails. But we
still need this patch because request_irq() may succeed or fail depending
on other devices in the system. If request_irq() fails, i801_smbus will
work by falling back to polling, but if it succeeds, i801_smbus won't work
because it expects interrupts that it may not receive.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-02-14 21:52:01 -07:00
|
|
|
if (irq == IRQ_NOTCONNECTED)
|
|
|
|
return -ENOTCONN;
|
|
|
|
|
|
|
|
desc = irq_to_desc(irq);
|
genirq: Introduce request_any_context_irq()
Now that we enjoy threaded interrupts, we're starting to see irq_chip
implementations (wm831x, pca953x) that make use of threaded interrupts
for the controller, and nested interrupts for the client interrupt. It
all works very well, with one drawback:
Drivers requesting an IRQ must now know whether the handler will
run in a thread context or not, and call request_threaded_irq() or
request_irq() accordingly.
The problem is that the requesting driver sometimes doesn't know
about the nature of the interrupt, specially when the interrupt
controller is a discrete chip (typically a GPIO expander connected
over I2C) that can be connected to a wide variety of otherwise perfectly
supported hardware.
This patch introduces the request_any_context_irq() function that mostly
mimics the usual request_irq(), except that it checks whether the irq
level is configured as nested or not, and calls the right backend.
On success, it also returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
[ tglx: Made return value an enum, simplified code and made the export
of request_any_context_irq GPL ]
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Cc: <joachim.eastwood@jotron.com>
LKML-Reference: <927ea285bd0c68934ddae1a47e44a9ba@localhost>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-03-15 16:56:33 -06:00
|
|
|
if (!desc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2011-02-09 06:44:17 -07:00
|
|
|
if (irq_settings_is_nested_thread(desc)) {
|
genirq: Introduce request_any_context_irq()
Now that we enjoy threaded interrupts, we're starting to see irq_chip
implementations (wm831x, pca953x) that make use of threaded interrupts
for the controller, and nested interrupts for the client interrupt. It
all works very well, with one drawback:
Drivers requesting an IRQ must now know whether the handler will
run in a thread context or not, and call request_threaded_irq() or
request_irq() accordingly.
The problem is that the requesting driver sometimes doesn't know
about the nature of the interrupt, specially when the interrupt
controller is a discrete chip (typically a GPIO expander connected
over I2C) that can be connected to a wide variety of otherwise perfectly
supported hardware.
This patch introduces the request_any_context_irq() function that mostly
mimics the usual request_irq(), except that it checks whether the irq
level is configured as nested or not, and calls the right backend.
On success, it also returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
[ tglx: Made return value an enum, simplified code and made the export
of request_any_context_irq GPL ]
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Cc: <joachim.eastwood@jotron.com>
LKML-Reference: <927ea285bd0c68934ddae1a47e44a9ba@localhost>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-03-15 16:56:33 -06:00
|
|
|
ret = request_threaded_irq(irq, NULL, handler,
|
|
|
|
flags, name, dev_id);
|
|
|
|
return !ret ? IRQC_IS_NESTED : ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = request_irq(irq, handler, flags, name, dev_id);
|
|
|
|
return !ret ? IRQC_IS_HARDIRQ : ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(request_any_context_irq);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
|
2011-09-30 03:48:47 -06:00
|
|
|
void enable_percpu_irq(unsigned int irq, unsigned int type)
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
{
|
|
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
unsigned long flags;
|
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return;
|
|
|
|
|
2016-06-13 03:39:44 -06:00
|
|
|
/*
|
|
|
|
* If the trigger type is not specified by the caller, then
|
|
|
|
* use the default for this interrupt.
|
|
|
|
*/
|
2011-09-30 03:48:47 -06:00
|
|
|
type &= IRQ_TYPE_SENSE_MASK;
|
2016-06-13 03:39:44 -06:00
|
|
|
if (type == IRQ_TYPE_NONE)
|
|
|
|
type = irqd_get_trigger_type(&desc->irq_data);
|
|
|
|
|
2011-09-30 03:48:47 -06:00
|
|
|
if (type != IRQ_TYPE_NONE) {
|
|
|
|
int ret;
|
|
|
|
|
2015-06-23 11:47:29 -06:00
|
|
|
ret = __irq_set_trigger(desc, type);
|
2011-09-30 03:48:47 -06:00
|
|
|
|
|
|
|
if (ret) {
|
2011-10-04 10:43:57 -06:00
|
|
|
WARN(1, "failed to set type for IRQ%d\n", irq);
|
2011-09-30 03:48:47 -06:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
irq_percpu_enable(desc, cpu);
|
2011-09-30 03:48:47 -06:00
|
|
|
out:
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
}
|
2013-02-01 13:04:26 -07:00
|
|
|
EXPORT_SYMBOL_GPL(enable_percpu_irq);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
|
2015-10-20 07:23:51 -06:00
|
|
|
/**
|
|
|
|
* irq_percpu_is_enabled - Check whether the per cpu irq is enabled
|
|
|
|
* @irq: Linux irq number to check for
|
|
|
|
*
|
|
|
|
* Must be called from a non migratable context. Returns the enable
|
|
|
|
* state of a per cpu interrupt on the current cpu.
|
|
|
|
*/
|
|
|
|
bool irq_percpu_is_enabled(unsigned int irq)
|
|
|
|
{
|
|
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
struct irq_desc *desc;
|
|
|
|
unsigned long flags;
|
|
|
|
bool is_enabled;
|
|
|
|
|
|
|
|
desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
|
|
|
|
if (!desc)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
|
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
|
|
|
|
return is_enabled;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
void disable_percpu_irq(unsigned int irq)
|
|
|
|
{
|
|
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
unsigned long flags;
|
|
|
|
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return;
|
|
|
|
|
|
|
|
irq_percpu_disable(desc, cpu);
|
|
|
|
irq_put_desc_unlock(desc, flags);
|
|
|
|
}
|
2013-02-01 13:04:26 -07:00
|
|
|
EXPORT_SYMBOL_GPL(disable_percpu_irq);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Internal function to unregister a percpu irqaction.
|
|
|
|
*/
|
|
|
|
static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
struct irqaction *action;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
|
|
|
|
action = desc->action;
|
|
|
|
if (!action || action->percpu_dev_id != dev_id) {
|
|
|
|
WARN(1, "Trying to free already-free IRQ %d\n", irq);
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!cpumask_empty(desc->percpu_enabled)) {
|
|
|
|
WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
|
|
|
|
irq, cpumask_first(desc->percpu_enabled));
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Found it - now remove it from the list of entries: */
|
|
|
|
desc->action = NULL;
|
|
|
|
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
|
|
|
|
unregister_handler_proc(irq, action);
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
module_put(desc->owner);
|
|
|
|
return action;
|
|
|
|
|
|
|
|
bad:
|
|
|
|
raw_spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* remove_percpu_irq - free a per-cpu interrupt
|
|
|
|
* @irq: Interrupt line to free
|
|
|
|
* @act: irqaction for the interrupt
|
|
|
|
*
|
|
|
|
* Used to remove interrupts statically setup by the early boot process.
|
|
|
|
*/
|
|
|
|
void remove_percpu_irq(unsigned int irq, struct irqaction *act)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (desc && irq_settings_is_per_cpu_devid(desc))
|
|
|
|
__free_percpu_irq(irq, act->percpu_dev_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* free_percpu_irq - free an interrupt allocated with request_percpu_irq
|
|
|
|
* @irq: Interrupt line to free
|
|
|
|
* @dev_id: Device identity to free
|
|
|
|
*
|
|
|
|
* Remove a percpu interrupt handler. The handler is removed, but
|
|
|
|
* the interrupt line is not disabled. This must be done on each
|
|
|
|
* CPU before calling this function. The function does not return
|
|
|
|
* until any executing interrupts for this IRQ have completed.
|
|
|
|
*
|
|
|
|
* This function must not be called from interrupt context.
|
|
|
|
*/
|
|
|
|
void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
|
|
|
|
if (!desc || !irq_settings_is_per_cpu_devid(desc))
|
|
|
|
return;
|
|
|
|
|
|
|
|
chip_bus_lock(desc);
|
|
|
|
kfree(__free_percpu_irq(irq, dev_id));
|
|
|
|
chip_bus_sync_unlock(desc);
|
|
|
|
}
|
2015-09-25 10:09:33 -06:00
|
|
|
EXPORT_SYMBOL_GPL(free_percpu_irq);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* setup_percpu_irq - setup a per-cpu interrupt
|
|
|
|
* @irq: Interrupt line to setup
|
|
|
|
* @act: irqaction for the interrupt
|
|
|
|
*
|
|
|
|
* Used to statically setup per-cpu interrupts in the early boot process.
|
|
|
|
*/
|
|
|
|
int setup_percpu_irq(unsigned int irq, struct irqaction *act)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
if (!desc || !irq_settings_is_per_cpu_devid(desc))
|
|
|
|
return -EINVAL;
|
2016-06-07 09:12:29 -06:00
|
|
|
|
|
|
|
retval = irq_chip_pm_get(&desc->irq_data);
|
|
|
|
if (retval < 0)
|
|
|
|
return retval;
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
retval = __setup_irq(irq, desc, act);
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
if (retval)
|
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* request_percpu_irq - allocate a percpu interrupt line
|
|
|
|
* @irq: Interrupt line to allocate
|
|
|
|
* @handler: Function to be called when the IRQ occurs.
|
|
|
|
* @devname: An ascii name for the claiming device
|
|
|
|
* @dev_id: A percpu cookie passed back to the handler function
|
|
|
|
*
|
2015-09-25 10:09:32 -06:00
|
|
|
* This call allocates interrupt resources and enables the
|
|
|
|
* interrupt on the local CPU. If the interrupt is supposed to be
|
|
|
|
* enabled on other CPUs, it has to be done on each CPU using
|
|
|
|
* enable_percpu_irq().
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
*
|
|
|
|
* Dev_id must be globally unique. It is a per-cpu variable, and
|
|
|
|
* the handler gets called with the interrupted CPU's instance of
|
|
|
|
* that variable.
|
|
|
|
*/
|
|
|
|
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
|
|
|
|
const char *devname, void __percpu *dev_id)
|
|
|
|
{
|
|
|
|
struct irqaction *action;
|
|
|
|
struct irq_desc *desc;
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
if (!dev_id)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
desc = irq_to_desc(irq);
|
|
|
|
if (!desc || !irq_settings_can_request(desc) ||
|
|
|
|
!irq_settings_is_per_cpu_devid(desc))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
|
|
|
|
if (!action)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
action->handler = handler;
|
2011-11-16 05:27:39 -07:00
|
|
|
action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
action->name = devname;
|
|
|
|
action->percpu_dev_id = dev_id;
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
retval = irq_chip_pm_get(&desc->irq_data);
|
2016-08-22 02:21:52 -06:00
|
|
|
if (retval < 0) {
|
|
|
|
kfree(action);
|
2016-06-07 09:12:29 -06:00
|
|
|
return retval;
|
2016-08-22 02:21:52 -06:00
|
|
|
}
|
2016-06-07 09:12:29 -06:00
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
retval = __setup_irq(irq, desc, action);
|
|
|
|
|
2016-06-07 09:12:29 -06:00
|
|
|
if (retval) {
|
|
|
|
irq_chip_pm_put(&desc->irq_data);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
kfree(action);
|
2016-06-07 09:12:29 -06:00
|
|
|
}
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-23 10:03:06 -06:00
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
2015-09-25 10:09:33 -06:00
|
|
|
EXPORT_SYMBOL_GPL(request_percpu_irq);
|
2015-03-18 05:01:22 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_get_irqchip_state - returns the irqchip state of a interrupt.
|
|
|
|
* @irq: Interrupt line that is forwarded to a VM
|
|
|
|
* @which: One of IRQCHIP_STATE_* the caller wants to know about
|
|
|
|
* @state: a pointer to a boolean where the state is to be storeed
|
|
|
|
*
|
|
|
|
* This call snapshots the internal irqchip state of an
|
|
|
|
* interrupt, returning into @state the bit corresponding to
|
|
|
|
* stage @which
|
|
|
|
*
|
|
|
|
* This function should be called with preemption disabled if the
|
|
|
|
* interrupt controller has per-cpu registers.
|
|
|
|
*/
|
|
|
|
int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
|
|
|
|
bool *state)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irq_data *data;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
unsigned long flags;
|
|
|
|
int err = -EINVAL;
|
|
|
|
|
|
|
|
desc = irq_get_desc_buslock(irq, &flags, 0);
|
|
|
|
if (!desc)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
|
|
|
|
do {
|
|
|
|
chip = irq_data_get_irq_chip(data);
|
|
|
|
if (chip->irq_get_irqchip_state)
|
|
|
|
break;
|
|
|
|
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
|
|
|
|
data = data->parent_data;
|
|
|
|
#else
|
|
|
|
data = NULL;
|
|
|
|
#endif
|
|
|
|
} while (data);
|
|
|
|
|
|
|
|
if (data)
|
|
|
|
err = chip->irq_get_irqchip_state(data, which, state);
|
|
|
|
|
|
|
|
irq_put_desc_busunlock(desc, flags);
|
|
|
|
return err;
|
|
|
|
}
|
2015-07-22 13:43:04 -06:00
|
|
|
EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
|
2015-03-18 05:01:22 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* irq_set_irqchip_state - set the state of a forwarded interrupt.
|
|
|
|
* @irq: Interrupt line that is forwarded to a VM
|
|
|
|
* @which: State to be restored (one of IRQCHIP_STATE_*)
|
|
|
|
* @val: Value corresponding to @which
|
|
|
|
*
|
|
|
|
* This call sets the internal irqchip state of an interrupt,
|
|
|
|
* depending on the value of @which.
|
|
|
|
*
|
|
|
|
* This function should be called with preemption disabled if the
|
|
|
|
* interrupt controller has per-cpu registers.
|
|
|
|
*/
|
|
|
|
int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
|
|
|
|
bool val)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irq_data *data;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
unsigned long flags;
|
|
|
|
int err = -EINVAL;
|
|
|
|
|
|
|
|
desc = irq_get_desc_buslock(irq, &flags, 0);
|
|
|
|
if (!desc)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
|
|
|
|
do {
|
|
|
|
chip = irq_data_get_irq_chip(data);
|
|
|
|
if (chip->irq_set_irqchip_state)
|
|
|
|
break;
|
|
|
|
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
|
|
|
|
data = data->parent_data;
|
|
|
|
#else
|
|
|
|
data = NULL;
|
|
|
|
#endif
|
|
|
|
} while (data);
|
|
|
|
|
|
|
|
if (data)
|
|
|
|
err = chip->irq_set_irqchip_state(data, which, val);
|
|
|
|
|
|
|
|
irq_put_desc_busunlock(desc, flags);
|
|
|
|
return err;
|
|
|
|
}
|
2015-07-22 13:43:04 -06:00
|
|
|
EXPORT_SYMBOL_GPL(irq_set_irqchip_state);
|