2008-07-29 23:33:57 -06:00
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/*
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* SN Platform GRU Driver
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*
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* FAULT HANDLER FOR GRU DETECTED TLB MISSES
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*
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* This file contains code that handles TLB misses within the GRU.
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* These misses are reported either via interrupts or user polling of
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* the user CB.
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*
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* Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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2009-04-02 17:59:07 -06:00
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#include <linux/security.h>
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2008-07-29 23:33:57 -06:00
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#include <asm/pgtable.h>
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#include "gru.h"
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#include "grutables.h"
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#include "grulib.h"
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#include "gru_instructions.h"
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#include <asm/uv/uv_hub.h>
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/*
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* Test if a physical address is a valid GRU GSEG address
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*/
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static inline int is_gru_paddr(unsigned long paddr)
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{
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return paddr >= gru_start_paddr && paddr < gru_end_paddr;
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}
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/*
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* Find the vma of a GRU segment. Caller must hold mmap_sem.
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*/
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struct vm_area_struct *gru_find_vma(unsigned long vaddr)
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{
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struct vm_area_struct *vma;
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vma = find_vma(current->mm, vaddr);
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if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
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return vma;
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return NULL;
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}
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/*
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* Find and lock the gts that contains the specified user vaddr.
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*
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* Returns:
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* - *gts with the mmap_sem locked for read and the GTS locked.
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* - NULL if vaddr invalid OR is not a valid GSEG vaddr.
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*/
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static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
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{
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struct mm_struct *mm = current->mm;
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struct vm_area_struct *vma;
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struct gru_thread_state *gts = NULL;
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down_read(&mm->mmap_sem);
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vma = gru_find_vma(vaddr);
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if (vma)
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gts = gru_find_thread_state(vma, TSID(vaddr, vma));
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if (gts)
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mutex_lock(>s->ts_ctxlock);
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else
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up_read(&mm->mmap_sem);
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return gts;
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}
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static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
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{
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struct mm_struct *mm = current->mm;
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struct vm_area_struct *vma;
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struct gru_thread_state *gts = NULL;
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down_write(&mm->mmap_sem);
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vma = gru_find_vma(vaddr);
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if (vma)
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gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
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if (gts) {
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mutex_lock(>s->ts_ctxlock);
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downgrade_write(&mm->mmap_sem);
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} else {
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up_write(&mm->mmap_sem);
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}
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return gts;
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}
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/*
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* Unlock a GTS that was previously locked with gru_find_lock_gts().
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*/
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static void gru_unlock_gts(struct gru_thread_state *gts)
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{
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mutex_unlock(>s->ts_ctxlock);
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up_read(¤t->mm->mmap_sem);
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}
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/*
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* Set a CB.istatus to active using a user virtual address. This must be done
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* just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
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* If the line is evicted, the status may be lost. The in-cache update
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* is necessary to prevent the user from seeing a stale cb.istatus that will
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* change as soon as the TFH restart is complete. Races may cause an
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* occasional failure to clear the cb.istatus, but that is ok.
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*
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* If the cb address is not valid (should not happen, but...), nothing
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* bad will happen.. The get_user()/put_user() will fail but there
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* are no bad side-effects.
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*/
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static void gru_cb_set_istatus_active(unsigned long __user *cb)
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{
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union {
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struct gru_instruction_bits bits;
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unsigned long dw;
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} u;
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if (cb) {
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get_user(u.dw, cb);
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u.bits.istatus = CBS_ACTIVE;
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put_user(u.dw, cb);
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}
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}
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/*
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* Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
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* interrupt. Interrupts are always sent to a cpu on the blade that contains the
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* GRU (except for headless blades which are not currently supported). A blade
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* has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
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* number uniquely identifies the GRU chiplet on the local blade that caused the
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* interrupt. Always called in interrupt context.
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*/
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static inline struct gru_state *irq_to_gru(int irq)
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{
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return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
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}
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/*
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* Read & clear a TFM
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*
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* The GRU has an array of fault maps. A map is private to a cpu
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* Only one cpu will be accessing a cpu's fault map.
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*
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* This function scans the cpu-private fault map & clears all bits that
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* are set. The function returns a bitmap that indicates the bits that
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* were cleared. Note that sense the maps may be updated asynchronously by
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* the GRU, atomic operations must be used to clear bits.
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*/
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static void get_clear_fault_map(struct gru_state *gru,
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2009-06-17 17:28:25 -06:00
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struct gru_tlb_fault_map *imap,
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struct gru_tlb_fault_map *dmap)
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2008-07-29 23:33:57 -06:00
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{
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unsigned long i, k;
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struct gru_tlb_fault_map *tfm;
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tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
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prefetchw(tfm); /* Helps on hardware, required for emulator */
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for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
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k = tfm->fault_bits[i];
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if (k)
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k = xchg(&tfm->fault_bits[i], 0UL);
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2009-06-17 17:28:25 -06:00
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imap->fault_bits[i] = k;
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k = tfm->done_bits[i];
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if (k)
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k = xchg(&tfm->done_bits[i], 0UL);
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dmap->fault_bits[i] = k;
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2008-07-29 23:33:57 -06:00
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}
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/*
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* Not functionally required but helps performance. (Required
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* on emulator)
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*/
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gru_flush_cache(tfm);
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}
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/*
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* Atomic (interrupt context) & non-atomic (user context) functions to
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* convert a vaddr into a physical address. The size of the page
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* is returned in pageshift.
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* returns:
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* 0 - successful
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* < 0 - error code
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* 1 - (atomic only) try again in non-atomic context
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*/
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static int non_atomic_pte_lookup(struct vm_area_struct *vma,
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unsigned long vaddr, int write,
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unsigned long *paddr, int *pageshift)
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{
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struct page *page;
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/* ZZZ Need to handle HUGE pages */
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if (is_vm_hugetlb_page(vma))
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return -EFAULT;
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*pageshift = PAGE_SHIFT;
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if (get_user_pages
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(current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
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return -EFAULT;
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*paddr = page_to_phys(page);
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put_page(page);
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return 0;
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}
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/*
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* atomic_pte_lookup
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*
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* Convert a user virtual address to a physical address
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* Only supports Intel large pages (2MB only) on x86_64.
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* ZZZ - hugepage support is incomplete
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2008-10-15 23:05:13 -06:00
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*
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* NOTE: mmap_sem is already held on entry to this function. This
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* guarantees existence of the page tables.
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2008-07-29 23:33:57 -06:00
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*/
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static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
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int write, unsigned long *paddr, int *pageshift)
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{
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pgd_t *pgdp;
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pmd_t *pmdp;
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pud_t *pudp;
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pte_t pte;
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pgdp = pgd_offset(vma->vm_mm, vaddr);
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if (unlikely(pgd_none(*pgdp)))
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goto err;
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pudp = pud_offset(pgdp, vaddr);
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if (unlikely(pud_none(*pudp)))
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goto err;
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pmdp = pmd_offset(pudp, vaddr);
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if (unlikely(pmd_none(*pmdp)))
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goto err;
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#ifdef CONFIG_X86_64
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if (unlikely(pmd_large(*pmdp)))
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pte = *(pte_t *) pmdp;
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else
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#endif
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pte = *pte_offset_kernel(pmdp, vaddr);
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if (unlikely(!pte_present(pte) ||
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(write && (!pte_write(pte) || !pte_dirty(pte)))))
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return 1;
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*paddr = pte_pfn(pte) << PAGE_SHIFT;
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2008-12-09 09:51:32 -07:00
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#ifdef CONFIG_HUGETLB_PAGE
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2008-07-29 23:33:57 -06:00
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*pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
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2008-12-09 09:51:32 -07:00
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#else
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*pageshift = PAGE_SHIFT;
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#endif
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2008-07-29 23:33:57 -06:00
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return 0;
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err:
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local_irq_enable();
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return 1;
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}
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2009-04-02 17:59:09 -06:00
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static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
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int write, int atomic, unsigned long *gpa, int *pageshift)
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{
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struct mm_struct *mm = gts->ts_mm;
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struct vm_area_struct *vma;
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unsigned long paddr;
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int ret, ps;
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vma = find_vma(mm, vaddr);
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if (!vma)
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goto inval;
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/*
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* Atomic lookup is faster & usually works even if called in non-atomic
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* context.
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*/
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rmb(); /* Must/check ms_range_active before loading PTEs */
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ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
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if (ret) {
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if (atomic)
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goto upm;
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if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
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goto inval;
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}
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if (is_gru_paddr(paddr))
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goto inval;
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paddr = paddr & ~((1UL << ps) - 1);
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*gpa = uv_soc_phys_ram_to_gpa(paddr);
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*pageshift = ps;
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return 0;
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inval:
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return -1;
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upm:
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return -2;
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}
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2008-07-29 23:33:57 -06:00
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/*
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* Drop a TLB entry into the GRU. The fault is described by info in an TFH.
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* Input:
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* cb Address of user CBR. Null if not running in user context
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* Return:
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* 0 = dropin, exception, or switch to UPM successful
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* 1 = range invalidate active
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* < 0 = error code
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*
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*/
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static int gru_try_dropin(struct gru_thread_state *gts,
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struct gru_tlb_fault_handle *tfh,
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unsigned long __user *cb)
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{
|
2009-04-02 17:59:09 -06:00
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int pageshift = 0, asid, write, ret, atomic = !cb;
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unsigned long gpa = 0, vaddr = 0;
|
2008-07-29 23:33:57 -06:00
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/*
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* NOTE: The GRU contains magic hardware that eliminates races between
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* TLB invalidates and TLB dropins. If an invalidate occurs
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* in the window between reading the TFH and the subsequent TLB dropin,
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* the dropin is ignored. This eliminates the need for additional locks.
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*/
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/*
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* Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
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* Might be a hardware race OR a stupid user. Ignore FMM because FMM
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* is a transient state.
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*/
|
2009-06-17 17:28:27 -06:00
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if (tfh->status != TFHSTATUS_EXCEPTION) {
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gru_flush_cache(tfh);
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if (tfh->status != TFHSTATUS_EXCEPTION)
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goto failnoexception;
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STAT(tfh_stale_on_fault);
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}
|
2008-07-29 23:33:57 -06:00
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if (tfh->state == TFHSTATE_IDLE)
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goto failidle;
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if (tfh->state == TFHSTATE_MISS_FMM && cb)
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goto failfmm;
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write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
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vaddr = tfh->missvaddr;
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asid = tfh->missasid;
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|
|
if (asid == 0)
|
|
|
|
goto failnoasid;
|
|
|
|
|
|
|
|
rmb(); /* TFH must be cache resident before reading ms_range_active */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* TFH is cache resident - at least briefly. Fail the dropin
|
|
|
|
* if a range invalidate is active.
|
|
|
|
*/
|
|
|
|
if (atomic_read(>s->ts_gms->ms_range_active))
|
|
|
|
goto failactive;
|
|
|
|
|
2009-04-02 17:59:09 -06:00
|
|
|
ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
|
|
|
|
if (ret == -1)
|
2008-07-29 23:33:57 -06:00
|
|
|
goto failinval;
|
2009-04-02 17:59:09 -06:00
|
|
|
if (ret == -2)
|
|
|
|
goto failupm;
|
2008-07-29 23:33:57 -06:00
|
|
|
|
2009-04-02 17:59:12 -06:00
|
|
|
if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
|
|
|
|
gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
|
|
|
|
if (atomic || !gru_update_cch(gts, 0)) {
|
|
|
|
gts->ts_force_cch_reload = 1;
|
|
|
|
goto failupm;
|
|
|
|
}
|
|
|
|
}
|
2008-07-29 23:33:57 -06:00
|
|
|
gru_cb_set_istatus_active(cb);
|
|
|
|
tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
|
|
|
|
GRU_PAGESIZE(pageshift));
|
|
|
|
STAT(tlb_dropin);
|
|
|
|
gru_dbg(grudev,
|
|
|
|
"%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
|
|
|
|
ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
|
|
|
|
pageshift, gpa);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
failnoasid:
|
|
|
|
/* No asid (delayed unload). */
|
|
|
|
STAT(tlb_dropin_fail_no_asid);
|
|
|
|
gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
|
|
|
|
if (!cb)
|
|
|
|
tfh_user_polling_mode(tfh);
|
|
|
|
else
|
|
|
|
gru_flush_cache(tfh);
|
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
failupm:
|
|
|
|
/* Atomic failure switch CBR to UPM */
|
|
|
|
tfh_user_polling_mode(tfh);
|
|
|
|
STAT(tlb_dropin_fail_upm);
|
|
|
|
gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
failfmm:
|
|
|
|
/* FMM state on UPM call */
|
2009-04-02 17:59:04 -06:00
|
|
|
gru_flush_cache(tfh);
|
2008-07-29 23:33:57 -06:00
|
|
|
STAT(tlb_dropin_fail_fmm);
|
|
|
|
gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
|
|
|
|
return 0;
|
|
|
|
|
2009-06-17 17:28:19 -06:00
|
|
|
failnoexception:
|
|
|
|
/* TFH status did not show exception pending */
|
|
|
|
gru_flush_cache(tfh);
|
|
|
|
if (cb)
|
|
|
|
gru_flush_cache(cb);
|
|
|
|
STAT(tlb_dropin_fail_no_exception);
|
|
|
|
gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state);
|
|
|
|
return 0;
|
|
|
|
|
2008-07-29 23:33:57 -06:00
|
|
|
failidle:
|
2009-06-17 17:28:19 -06:00
|
|
|
/* TFH state was idle - no miss pending */
|
2008-07-29 23:33:57 -06:00
|
|
|
gru_flush_cache(tfh);
|
|
|
|
if (cb)
|
|
|
|
gru_flush_cache(cb);
|
|
|
|
STAT(tlb_dropin_fail_idle);
|
|
|
|
gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
failinval:
|
|
|
|
/* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
|
|
|
|
tfh_exception(tfh);
|
|
|
|
STAT(tlb_dropin_fail_invalid);
|
|
|
|
gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
failactive:
|
|
|
|
/* Range invalidate active. Switch to UPM iff atomic */
|
|
|
|
if (!cb)
|
|
|
|
tfh_user_polling_mode(tfh);
|
|
|
|
else
|
|
|
|
gru_flush_cache(tfh);
|
|
|
|
STAT(tlb_dropin_fail_range_active);
|
|
|
|
gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
|
|
|
|
tfh, vaddr);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Process an external interrupt from the GRU. This interrupt is
|
|
|
|
* caused by a TLB miss.
|
|
|
|
* Note that this is the interrupt handler that is registered with linux
|
|
|
|
* interrupt handlers.
|
|
|
|
*/
|
|
|
|
irqreturn_t gru_intr(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct gru_state *gru;
|
2009-06-17 17:28:25 -06:00
|
|
|
struct gru_tlb_fault_map imap, dmap;
|
2008-07-29 23:33:57 -06:00
|
|
|
struct gru_thread_state *gts;
|
|
|
|
struct gru_tlb_fault_handle *tfh = NULL;
|
|
|
|
int cbrnum, ctxnum;
|
|
|
|
|
|
|
|
STAT(intr);
|
|
|
|
|
|
|
|
gru = irq_to_gru(irq);
|
|
|
|
if (!gru) {
|
|
|
|
dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
|
|
|
|
raw_smp_processor_id(), irq);
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
2009-06-17 17:28:25 -06:00
|
|
|
get_clear_fault_map(gru, &imap, &dmap);
|
|
|
|
|
|
|
|
for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
|
|
|
|
complete(gru->gs_blade->bs_async_wq);
|
|
|
|
gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
|
|
|
|
gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
|
|
|
|
}
|
2008-07-29 23:33:57 -06:00
|
|
|
|
2009-06-17 17:28:25 -06:00
|
|
|
for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
|
2008-07-29 23:33:57 -06:00
|
|
|
tfh = get_tfh_by_index(gru, cbrnum);
|
|
|
|
prefetchw(tfh); /* Helps on hdw, required for emulator */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* When hardware sets a bit in the faultmap, it implicitly
|
|
|
|
* locks the GRU context so that it cannot be unloaded.
|
|
|
|
* The gts cannot change until a TFH start/writestart command
|
|
|
|
* is issued.
|
|
|
|
*/
|
|
|
|
ctxnum = tfh->ctxnum;
|
|
|
|
gts = gru->gs_gts[ctxnum];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This is running in interrupt context. Trylock the mmap_sem.
|
|
|
|
* If it fails, retry the fault in user context.
|
|
|
|
*/
|
2009-06-17 17:28:19 -06:00
|
|
|
if (!gts->ts_force_cch_reload &&
|
|
|
|
down_read_trylock(>s->ts_mm->mmap_sem)) {
|
2008-07-29 23:33:57 -06:00
|
|
|
gru_try_dropin(gts, tfh, NULL);
|
|
|
|
up_read(>s->ts_mm->mmap_sem);
|
|
|
|
} else {
|
|
|
|
tfh_user_polling_mode(tfh);
|
2009-04-02 17:59:05 -06:00
|
|
|
STAT(intr_mm_lock_failed);
|
2008-07-29 23:33:57 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int gru_user_dropin(struct gru_thread_state *gts,
|
|
|
|
struct gru_tlb_fault_handle *tfh,
|
|
|
|
unsigned long __user *cb)
|
|
|
|
{
|
|
|
|
struct gru_mm_struct *gms = gts->ts_gms;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
wait_event(gms->ms_wait_queue,
|
|
|
|
atomic_read(&gms->ms_range_active) == 0);
|
|
|
|
prefetchw(tfh); /* Helps on hdw, required for emulator */
|
|
|
|
ret = gru_try_dropin(gts, tfh, cb);
|
|
|
|
if (ret <= 0)
|
|
|
|
return ret;
|
|
|
|
STAT(call_os_wait_queue);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This interface is called as a result of a user detecting a "call OS" bit
|
|
|
|
* in a user CB. Normally means that a TLB fault has occurred.
|
|
|
|
* cb - user virtual address of the CB
|
|
|
|
*/
|
|
|
|
int gru_handle_user_call_os(unsigned long cb)
|
|
|
|
{
|
|
|
|
struct gru_tlb_fault_handle *tfh;
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
unsigned long __user *cbp;
|
|
|
|
int ucbnum, cbrnum, ret = -EINVAL;
|
|
|
|
|
|
|
|
STAT(call_os);
|
|
|
|
gru_dbg(grudev, "address 0x%lx\n", cb);
|
|
|
|
|
|
|
|
/* sanity check the cb pointer */
|
|
|
|
ucbnum = get_cb_number((void *)cb);
|
|
|
|
if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
|
|
|
|
return -EINVAL;
|
|
|
|
cbp = (unsigned long *)cb;
|
|
|
|
|
|
|
|
gts = gru_find_lock_gts(cb);
|
|
|
|
if (!gts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2009-04-02 17:59:04 -06:00
|
|
|
if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
|
2008-07-29 23:33:57 -06:00
|
|
|
goto exit;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If force_unload is set, the UPM TLB fault is phony. The task
|
|
|
|
* has migrated to another node and the GSEG must be moved. Just
|
|
|
|
* unload the context. The task will page fault and assign a new
|
|
|
|
* context.
|
|
|
|
*/
|
2009-04-02 17:59:04 -06:00
|
|
|
if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
|
2009-04-02 17:59:05 -06:00
|
|
|
gts->ts_blade != uv_numa_blade_id()) {
|
|
|
|
STAT(call_os_offnode_reference);
|
2009-04-02 17:59:04 -06:00
|
|
|
gts->ts_force_unload = 1;
|
2009-04-02 17:59:05 -06:00
|
|
|
}
|
2009-04-02 17:59:04 -06:00
|
|
|
|
2009-04-02 17:59:12 -06:00
|
|
|
/*
|
|
|
|
* CCH may contain stale data if ts_force_cch_reload is set.
|
|
|
|
*/
|
|
|
|
if (gts->ts_gru && gts->ts_force_cch_reload) {
|
|
|
|
gts->ts_force_cch_reload = 0;
|
2009-06-17 17:28:20 -06:00
|
|
|
gru_update_cch(gts, 0);
|
2009-04-02 17:59:12 -06:00
|
|
|
}
|
|
|
|
|
2008-07-29 23:33:57 -06:00
|
|
|
ret = -EAGAIN;
|
|
|
|
cbrnum = thread_cbr_number(gts, ucbnum);
|
|
|
|
if (gts->ts_force_unload) {
|
|
|
|
gru_unload_context(gts, 1);
|
|
|
|
} else if (gts->ts_gru) {
|
|
|
|
tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
|
|
|
|
ret = gru_user_dropin(gts, tfh, cbp);
|
|
|
|
}
|
|
|
|
exit:
|
|
|
|
gru_unlock_gts(gts);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Fetch the exception detail information for a CB that terminated with
|
|
|
|
* an exception.
|
|
|
|
*/
|
|
|
|
int gru_get_exception_detail(unsigned long arg)
|
|
|
|
{
|
|
|
|
struct control_block_extended_exc_detail excdet;
|
|
|
|
struct gru_control_block_extended *cbe;
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
int ucbnum, cbrnum, ret;
|
|
|
|
|
|
|
|
STAT(user_exception);
|
|
|
|
if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
|
|
|
|
gts = gru_find_lock_gts(excdet.cb);
|
|
|
|
if (!gts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2009-04-02 17:59:04 -06:00
|
|
|
ucbnum = get_cb_number((void *)excdet.cb);
|
|
|
|
if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
} else if (gts->ts_gru) {
|
2008-07-29 23:33:57 -06:00
|
|
|
cbrnum = thread_cbr_number(gts, ucbnum);
|
|
|
|
cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
|
2009-04-02 17:59:04 -06:00
|
|
|
prefetchw(cbe);/* Harmless on hardware, required for emulator */
|
2008-07-29 23:33:57 -06:00
|
|
|
excdet.opc = cbe->opccpy;
|
|
|
|
excdet.exopc = cbe->exopccpy;
|
|
|
|
excdet.ecause = cbe->ecause;
|
|
|
|
excdet.exceptdet0 = cbe->idef1upd;
|
|
|
|
excdet.exceptdet1 = cbe->idef3upd;
|
2009-06-17 17:28:19 -06:00
|
|
|
excdet.cbrstate = cbe->cbrstate;
|
|
|
|
excdet.cbrexecstatus = cbe->cbrexecstatus;
|
2008-07-29 23:33:57 -06:00
|
|
|
ret = 0;
|
|
|
|
} else {
|
|
|
|
ret = -EAGAIN;
|
|
|
|
}
|
|
|
|
gru_unlock_gts(gts);
|
|
|
|
|
2009-06-17 17:28:19 -06:00
|
|
|
gru_dbg(grudev,
|
|
|
|
"cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
|
|
|
|
"exdet0 0x%lx, exdet1 0x%x\n",
|
|
|
|
excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
|
|
|
|
excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
|
2008-07-29 23:33:57 -06:00
|
|
|
if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
|
|
|
|
ret = -EFAULT;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* User request to unload a context. Content is saved for possible reload.
|
|
|
|
*/
|
2009-04-02 17:59:07 -06:00
|
|
|
static int gru_unload_all_contexts(void)
|
|
|
|
{
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
struct gru_state *gru;
|
2009-04-02 17:59:10 -06:00
|
|
|
int gid, ctxnum;
|
2009-04-02 17:59:07 -06:00
|
|
|
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
|
|
return -EPERM;
|
2009-04-02 17:59:10 -06:00
|
|
|
foreach_gid(gid) {
|
2009-04-02 17:59:07 -06:00
|
|
|
gru = GID_TO_GRU(gid);
|
|
|
|
spin_lock(&gru->gs_lock);
|
|
|
|
for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
|
|
|
|
gts = gru->gs_gts[ctxnum];
|
|
|
|
if (gts && mutex_trylock(>s->ts_ctxlock)) {
|
|
|
|
spin_unlock(&gru->gs_lock);
|
|
|
|
gru_unload_context(gts, 1);
|
2009-06-17 17:28:20 -06:00
|
|
|
mutex_unlock(>s->ts_ctxlock);
|
2009-04-02 17:59:07 -06:00
|
|
|
spin_lock(&gru->gs_lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
spin_unlock(&gru->gs_lock);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-07-29 23:33:57 -06:00
|
|
|
int gru_user_unload_context(unsigned long arg)
|
|
|
|
{
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
struct gru_unload_context_req req;
|
|
|
|
|
|
|
|
STAT(user_unload_context);
|
|
|
|
if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
|
|
|
|
|
2009-04-02 17:59:07 -06:00
|
|
|
if (!req.gseg)
|
|
|
|
return gru_unload_all_contexts();
|
|
|
|
|
2008-07-29 23:33:57 -06:00
|
|
|
gts = gru_find_lock_gts(req.gseg);
|
|
|
|
if (!gts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (gts->ts_gru)
|
|
|
|
gru_unload_context(gts, 1);
|
|
|
|
gru_unlock_gts(gts);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* User request to flush a range of virtual addresses from the GRU TLB
|
|
|
|
* (Mainly for testing).
|
|
|
|
*/
|
|
|
|
int gru_user_flush_tlb(unsigned long arg)
|
|
|
|
{
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
struct gru_flush_tlb_req req;
|
|
|
|
|
|
|
|
STAT(user_flush_tlb);
|
|
|
|
if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
|
|
|
|
req.vaddr, req.len);
|
|
|
|
|
|
|
|
gts = gru_find_lock_gts(req.gseg);
|
|
|
|
if (!gts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2009-04-02 17:59:04 -06:00
|
|
|
gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
|
2008-07-29 23:33:57 -06:00
|
|
|
gru_unlock_gts(gts);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Register the current task as the user of the GSEG slice.
|
|
|
|
* Needed for TLB fault interrupt targeting.
|
|
|
|
*/
|
|
|
|
int gru_set_task_slice(long address)
|
|
|
|
{
|
|
|
|
struct gru_thread_state *gts;
|
|
|
|
|
|
|
|
STAT(set_task_slice);
|
|
|
|
gru_dbg(grudev, "address 0x%lx\n", address);
|
|
|
|
gts = gru_alloc_locked_gts(address);
|
|
|
|
if (!gts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
gts->ts_tgid_owner = current->tgid;
|
|
|
|
gru_unlock_gts(gts);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|