blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
/*
|
2009-09-24 08:11:24 -06:00
|
|
|
* generate definitions needed by assembly language modules
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
*
|
2009-09-24 08:11:24 -06:00
|
|
|
* Copyright 2004-2009 Analog Devices Inc.
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
*
|
2009-09-24 08:11:24 -06:00
|
|
|
* Licensed under the GPL-2 or later
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/stddef.h>
|
|
|
|
#include <linux/sched.h>
|
|
|
|
#include <linux/kernel_stat.h>
|
|
|
|
#include <linux/ptrace.h>
|
|
|
|
#include <linux/hardirq.h>
|
2007-07-12 08:58:21 -06:00
|
|
|
#include <linux/irq.h>
|
|
|
|
#include <linux/thread_info.h>
|
2008-04-29 02:04:03 -06:00
|
|
|
#include <linux/kbuild.h>
|
2012-03-12 17:36:56 -06:00
|
|
|
#include <asm/pda.h>
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
|
|
|
|
int main(void)
|
|
|
|
{
|
|
|
|
/* offsets into the task struct */
|
|
|
|
DEFINE(TASK_STATE, offsetof(struct task_struct, state));
|
|
|
|
DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
|
|
|
|
DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
|
|
|
|
DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
|
|
|
|
DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
|
2007-05-09 03:35:16 -06:00
|
|
|
DEFINE(TASK_THREAD_INFO, offsetof(struct task_struct, stack));
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
DEFINE(TASK_MM, offsetof(struct task_struct, mm));
|
|
|
|
DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
|
|
|
|
DEFINE(TASK_SIGPENDING, offsetof(struct task_struct, pending));
|
|
|
|
|
|
|
|
/* offsets into the irq_cpustat_t struct */
|
|
|
|
DEFINE(CPUSTAT_SOFTIRQ_PENDING,
|
|
|
|
offsetof(irq_cpustat_t, __softirq_pending));
|
|
|
|
|
|
|
|
/* offsets into the thread struct */
|
|
|
|
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
|
|
|
|
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
|
2008-11-18 02:48:22 -07:00
|
|
|
DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
|
|
|
|
DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
|
|
|
|
DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
|
|
|
|
DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
|
|
|
|
|
2015-04-03 10:56:16 -06:00
|
|
|
/* offsets in thread_info struct */
|
|
|
|
OFFSET(TI_TASK, thread_info, task);
|
|
|
|
OFFSET(TI_FLAGS, thread_info, flags);
|
|
|
|
OFFSET(TI_CPU, thread_info, cpu);
|
|
|
|
OFFSET(TI_PREEMPT, thread_info, preempt_count);
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
/* offsets into the pt_regs */
|
2008-10-09 01:22:56 -06:00
|
|
|
DEFINE(PT_ORIG_R0, offsetof(struct pt_regs, orig_r0));
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
DEFINE(PT_ORIG_P0, offsetof(struct pt_regs, orig_p0));
|
|
|
|
DEFINE(PT_ORIG_PC, offsetof(struct pt_regs, orig_pc));
|
|
|
|
DEFINE(PT_R0, offsetof(struct pt_regs, r0));
|
|
|
|
DEFINE(PT_R1, offsetof(struct pt_regs, r1));
|
|
|
|
DEFINE(PT_R2, offsetof(struct pt_regs, r2));
|
|
|
|
DEFINE(PT_R3, offsetof(struct pt_regs, r3));
|
|
|
|
DEFINE(PT_R4, offsetof(struct pt_regs, r4));
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DEFINE(PT_R5, offsetof(struct pt_regs, r5));
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DEFINE(PT_R6, offsetof(struct pt_regs, r6));
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DEFINE(PT_R7, offsetof(struct pt_regs, r7));
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DEFINE(PT_P0, offsetof(struct pt_regs, p0));
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DEFINE(PT_P1, offsetof(struct pt_regs, p1));
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DEFINE(PT_P2, offsetof(struct pt_regs, p2));
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DEFINE(PT_P3, offsetof(struct pt_regs, p3));
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DEFINE(PT_P4, offsetof(struct pt_regs, p4));
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DEFINE(PT_P5, offsetof(struct pt_regs, p5));
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DEFINE(PT_FP, offsetof(struct pt_regs, fp));
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DEFINE(PT_USP, offsetof(struct pt_regs, usp));
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DEFINE(PT_I0, offsetof(struct pt_regs, i0));
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DEFINE(PT_I1, offsetof(struct pt_regs, i1));
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DEFINE(PT_I2, offsetof(struct pt_regs, i2));
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DEFINE(PT_I3, offsetof(struct pt_regs, i3));
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DEFINE(PT_M0, offsetof(struct pt_regs, m0));
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DEFINE(PT_M1, offsetof(struct pt_regs, m1));
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DEFINE(PT_M2, offsetof(struct pt_regs, m2));
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DEFINE(PT_M3, offsetof(struct pt_regs, m3));
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DEFINE(PT_L0, offsetof(struct pt_regs, l0));
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DEFINE(PT_L1, offsetof(struct pt_regs, l1));
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DEFINE(PT_L2, offsetof(struct pt_regs, l2));
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DEFINE(PT_L3, offsetof(struct pt_regs, l3));
|
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DEFINE(PT_B0, offsetof(struct pt_regs, b0));
|
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DEFINE(PT_B1, offsetof(struct pt_regs, b1));
|
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DEFINE(PT_B2, offsetof(struct pt_regs, b2));
|
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|
DEFINE(PT_B3, offsetof(struct pt_regs, b3));
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|
DEFINE(PT_A0X, offsetof(struct pt_regs, a0x));
|
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DEFINE(PT_A0W, offsetof(struct pt_regs, a0w));
|
|
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DEFINE(PT_A1X, offsetof(struct pt_regs, a1x));
|
|
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DEFINE(PT_A1W, offsetof(struct pt_regs, a1w));
|
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DEFINE(PT_LC0, offsetof(struct pt_regs, lc0));
|
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|
DEFINE(PT_LC1, offsetof(struct pt_regs, lc1));
|
|
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|
DEFINE(PT_LT0, offsetof(struct pt_regs, lt0));
|
|
|
|
DEFINE(PT_LT1, offsetof(struct pt_regs, lt1));
|
|
|
|
DEFINE(PT_LB0, offsetof(struct pt_regs, lb0));
|
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|
DEFINE(PT_LB1, offsetof(struct pt_regs, lb1));
|
|
|
|
DEFINE(PT_ASTAT, offsetof(struct pt_regs, astat));
|
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|
|
DEFINE(PT_RESERVED, offsetof(struct pt_regs, reserved));
|
|
|
|
DEFINE(PT_RETS, offsetof(struct pt_regs, rets));
|
|
|
|
DEFINE(PT_PC, offsetof(struct pt_regs, pc));
|
|
|
|
DEFINE(PT_RETX, offsetof(struct pt_regs, retx));
|
|
|
|
DEFINE(PT_RETN, offsetof(struct pt_regs, retn));
|
|
|
|
DEFINE(PT_RETE, offsetof(struct pt_regs, rete));
|
|
|
|
DEFINE(PT_SEQSTAT, offsetof(struct pt_regs, seqstat));
|
|
|
|
DEFINE(PT_SYSCFG, offsetof(struct pt_regs, syscfg));
|
|
|
|
DEFINE(PT_IPEND, offsetof(struct pt_regs, ipend));
|
|
|
|
DEFINE(SIZEOF_PTREGS, sizeof(struct pt_regs));
|
|
|
|
DEFINE(PT_TEXT_ADDR, sizeof(struct pt_regs)); /* Needed by gdb */
|
|
|
|
DEFINE(PT_TEXT_END_ADDR, 4 + sizeof(struct pt_regs));/* Needed by gdb */
|
|
|
|
DEFINE(PT_DATA_ADDR, 8 + sizeof(struct pt_regs)); /* Needed by gdb */
|
|
|
|
DEFINE(PT_FDPIC_EXEC, 12 + sizeof(struct pt_regs)); /* Needed by gdb */
|
|
|
|
DEFINE(PT_FDPIC_INTERP, 16 + sizeof(struct pt_regs));/* Needed by gdb */
|
|
|
|
|
|
|
|
/* signal defines */
|
|
|
|
DEFINE(SIGSEGV, SIGSEGV);
|
|
|
|
DEFINE(SIGTRAP, SIGTRAP);
|
|
|
|
|
2008-11-18 02:48:22 -07:00
|
|
|
/* PDA management (in L1 scratchpad) */
|
|
|
|
DEFINE(PDA_SYSCFG, offsetof(struct blackfin_pda, syscfg));
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
DEFINE(PDA_IRQFLAGS, offsetof(struct blackfin_pda, imask));
|
|
|
|
#endif
|
|
|
|
DEFINE(PDA_IPDT, offsetof(struct blackfin_pda, ipdt));
|
|
|
|
DEFINE(PDA_IPDT_SWAPCOUNT, offsetof(struct blackfin_pda, ipdt_swapcount));
|
|
|
|
DEFINE(PDA_DPDT, offsetof(struct blackfin_pda, dpdt));
|
|
|
|
DEFINE(PDA_DPDT_SWAPCOUNT, offsetof(struct blackfin_pda, dpdt_swapcount));
|
|
|
|
DEFINE(PDA_EXIPTR, offsetof(struct blackfin_pda, ex_iptr));
|
|
|
|
DEFINE(PDA_EXOPTR, offsetof(struct blackfin_pda, ex_optr));
|
|
|
|
DEFINE(PDA_EXBUF, offsetof(struct blackfin_pda, ex_buf));
|
|
|
|
DEFINE(PDA_EXIMASK, offsetof(struct blackfin_pda, ex_imask));
|
|
|
|
DEFINE(PDA_EXSTACK, offsetof(struct blackfin_pda, ex_stack));
|
2009-06-21 20:02:16 -06:00
|
|
|
DEFINE(PDA_EXIPEND, offsetof(struct blackfin_pda, ex_ipend));
|
2008-11-18 02:48:22 -07:00
|
|
|
#ifdef ANOMALY_05000261
|
|
|
|
DEFINE(PDA_LFRETX, offsetof(struct blackfin_pda, last_cplb_fault_retx));
|
|
|
|
#endif
|
|
|
|
DEFINE(PDA_DCPLB, offsetof(struct blackfin_pda, dcplb_fault_addr));
|
|
|
|
DEFINE(PDA_ICPLB, offsetof(struct blackfin_pda, icplb_fault_addr));
|
|
|
|
DEFINE(PDA_RETX, offsetof(struct blackfin_pda, retx));
|
|
|
|
DEFINE(PDA_SEQSTAT, offsetof(struct blackfin_pda, seqstat));
|
2009-07-22 05:56:24 -06:00
|
|
|
#ifdef CONFIG_DEBUG_DOUBLEFAULT
|
|
|
|
DEFINE(PDA_DF_DCPLB, offsetof(struct blackfin_pda, dcplb_doublefault_addr));
|
|
|
|
DEFINE(PDA_DF_ICPLB, offsetof(struct blackfin_pda, icplb_doublefault_addr));
|
|
|
|
DEFINE(PDA_DF_SEQSTAT, offsetof(struct blackfin_pda, seqstat_doublefault));
|
|
|
|
DEFINE(PDA_DF_RETX, offsetof(struct blackfin_pda, retx_doublefault));
|
|
|
|
#endif
|
2011-05-29 21:12:51 -06:00
|
|
|
|
|
|
|
/* PDA initial management */
|
|
|
|
DEFINE(PDA_INIT_RETX, offsetof(struct blackfin_initial_pda, retx));
|
|
|
|
#ifdef CONFIG_DEBUG_DOUBLEFAULT
|
|
|
|
DEFINE(PDA_INIT_DF_DCPLB, offsetof(struct blackfin_initial_pda, dcplb_doublefault_addr));
|
|
|
|
DEFINE(PDA_INIT_DF_ICPLB, offsetof(struct blackfin_initial_pda, icplb_doublefault_addr));
|
|
|
|
DEFINE(PDA_INIT_DF_SEQSTAT, offsetof(struct blackfin_initial_pda, seqstat_doublefault));
|
|
|
|
DEFINE(PDA_INIT_DF_RETX, offsetof(struct blackfin_initial_pda, retx_doublefault));
|
|
|
|
#endif
|
|
|
|
|
2008-11-18 02:48:22 -07:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
/* Inter-core lock (in L2 SRAM) */
|
|
|
|
DEFINE(SIZEOF_CORELOCK, sizeof(struct corelock_slot));
|
|
|
|
#endif
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 15:50:22 -06:00
|
|
|
return 0;
|
|
|
|
}
|