2011-08-23 12:15:33 -06:00
|
|
|
* NVIDIA Tegra Secure Digital Host Controller
|
|
|
|
|
|
|
|
This controller on Tegra family SoCs provides an interface for MMC, SD,
|
|
|
|
and SDIO types of memory cards.
|
|
|
|
|
2012-06-11 19:48:16 -06:00
|
|
|
This file documents differences between the core properties described
|
|
|
|
by mmc.txt and the properties used by the sdhci-tegra driver.
|
|
|
|
|
2011-08-23 12:15:33 -06:00
|
|
|
Required properties:
|
2017-03-14 13:01:51 -06:00
|
|
|
- compatible : should be one of:
|
|
|
|
- "nvidia,tegra20-sdhci": for Tegra20
|
|
|
|
- "nvidia,tegra30-sdhci": for Tegra30
|
|
|
|
- "nvidia,tegra114-sdhci": for Tegra114
|
|
|
|
- "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
|
|
|
|
- "nvidia,tegra210-sdhci": for Tegra210
|
2017-03-14 13:01:52 -06:00
|
|
|
- "nvidia,tegra186-sdhci": for Tegra186
|
2013-11-06 14:00:25 -07:00
|
|
|
- clocks : Must contain one entry, for the module clock.
|
|
|
|
See ../clocks/clock-bindings.txt for details.
|
2013-11-07 10:11:27 -07:00
|
|
|
- resets : Must contain an entry for each entry in reset-names.
|
|
|
|
See ../reset/reset.txt for details.
|
|
|
|
- reset-names : Must include the following entries:
|
|
|
|
- sdhci
|
2011-08-23 12:15:33 -06:00
|
|
|
|
|
|
|
Optional properties:
|
|
|
|
- power-gpios : Specify GPIOs for power control
|
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
sdhci@c8000200 {
|
|
|
|
compatible = "nvidia,tegra20-sdhci";
|
|
|
|
reg = <0xc8000200 0x200>;
|
|
|
|
interrupts = <47>;
|
2013-11-06 14:00:25 -07:00
|
|
|
clocks = <&tegra_car 14>;
|
2013-11-07 10:11:27 -07:00
|
|
|
resets = <&tegra_car 14>;
|
|
|
|
reset-names = "sdhci";
|
2011-08-23 12:15:33 -06:00
|
|
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
|
|
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
|
|
|
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
2012-05-12 22:14:24 -06:00
|
|
|
bus-width = <8>;
|
2011-08-23 12:15:33 -06:00
|
|
|
};
|
2018-08-30 09:06:03 -06:00
|
|
|
|
|
|
|
Optional properties for Tegra210 and Tegra186:
|
|
|
|
- pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage
|
|
|
|
configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
|
|
|
|
for controllers supporting multiple voltage levels. The order of names
|
|
|
|
should correspond to the pin configuration states in pinctrl-0 and
|
|
|
|
pinctrl-1.
|
|
|
|
|
|
|
|
Example:
|
|
|
|
sdhci@700b0000 {
|
|
|
|
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
|
|
|
|
reg = <0x0 0x700b0000 0x0 0x200>;
|
|
|
|
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
|
|
|
clock-names = "sdhci";
|
|
|
|
resets = <&tegra_car 14>;
|
|
|
|
reset-names = "sdhci";
|
|
|
|
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
|
|
|
|
pinctrl-0 = <&sdmmc1_3v3>;
|
|
|
|
pinctrl-1 = <&sdmmc1_1v8>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|