2005-04-16 16:20:36 -06:00
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/*
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* sc-rm7k.c: RM7000 cache management functions.
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*
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* Copyright (C) 1997, 2001, 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/mm.h>
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2006-02-15 02:25:48 -07:00
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#include <linux/bitops.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/addrspace.h>
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#include <asm/bcache.h>
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#include <asm/cacheops.h>
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#include <asm/mipsregs.h>
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#include <asm/processor.h>
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2010-07-18 22:00:00 -06:00
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#include <asm/sections.h>
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2005-04-25 10:36:23 -06:00
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#include <asm/cacheflush.h> /* for run_uncached() */
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2005-04-16 16:20:36 -06:00
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/* Primary cache parameters. */
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#define sc_lsize 32
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#define tc_pagesize (32*128)
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/* Secondary cache parameters. */
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#define scache_size (256*1024) /* Fixed to 256KiB on RM7000 */
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2010-07-18 22:00:00 -06:00
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/* Tertiary cache parameters */
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#define tc_lsize 32
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2005-04-16 16:20:36 -06:00
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extern unsigned long icache_way_size, dcache_way_size;
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2010-08-06 09:42:57 -06:00
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static unsigned long tcache_size;
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2005-04-16 16:20:36 -06:00
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#include <asm/r4kcache.h>
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2010-07-18 22:00:00 -06:00
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static int rm7k_tcache_init;
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2005-04-16 16:20:36 -06:00
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/*
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* Writeback and invalidate the primary cache dcache before DMA.
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* (XXX These need to be fixed ...)
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*/
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static void rm7k_sc_wback_inv(unsigned long addr, unsigned long size)
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{
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unsigned long end, a;
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pr_debug("rm7k_sc_wback_inv[%08lx,%08lx]", addr, size);
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/* Catch bad driver code */
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BUG_ON(size == 0);
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2006-02-15 02:25:48 -07:00
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blast_scache_range(addr, addr + size);
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2005-04-16 16:20:36 -06:00
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2010-07-18 22:00:00 -06:00
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if (!rm7k_tcache_init)
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2005-04-16 16:20:36 -06:00
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return;
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a = addr & ~(tc_pagesize - 1);
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end = (addr + size - 1) & ~(tc_pagesize - 1);
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while(1) {
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invalidate_tcache_page(a); /* Page_Invalidate_T */
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if (a == end)
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break;
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a += tc_pagesize;
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}
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}
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static void rm7k_sc_inv(unsigned long addr, unsigned long size)
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{
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unsigned long end, a;
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pr_debug("rm7k_sc_inv[%08lx,%08lx]", addr, size);
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/* Catch bad driver code */
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BUG_ON(size == 0);
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2006-02-15 02:25:48 -07:00
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blast_inv_scache_range(addr, addr + size);
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2005-04-16 16:20:36 -06:00
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2010-07-18 22:00:00 -06:00
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if (!rm7k_tcache_init)
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2005-04-16 16:20:36 -06:00
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return;
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a = addr & ~(tc_pagesize - 1);
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end = (addr + size - 1) & ~(tc_pagesize - 1);
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while(1) {
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invalidate_tcache_page(a); /* Page_Invalidate_T */
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if (a == end)
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break;
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a += tc_pagesize;
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}
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}
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2010-07-18 22:00:00 -06:00
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static void blast_rm7k_tcache(void)
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{
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unsigned long start = CKSEG0ADDR(0);
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unsigned long end = start + tcache_size;
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write_c0_taglo(0);
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while (start < end) {
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cache_op(Page_Invalidate_T, start);
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start += tc_pagesize;
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}
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}
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/*
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* This function is executed in uncached address space.
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*/
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
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static void __rm7k_tc_enable(void)
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2010-07-18 22:00:00 -06:00
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{
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int i;
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set_c0_config(RM7K_CONF_TE);
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write_c0_taglo(0);
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write_c0_taghi(0);
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for (i = 0; i < tcache_size; i += tc_lsize)
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cache_op(Index_Store_Tag_T, CKSEG0ADDR(i));
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}
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|
|
|
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
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static void rm7k_tc_enable(void)
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2010-07-18 22:00:00 -06:00
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{
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if (read_c0_config() & RM7K_CONF_TE)
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return;
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BUG_ON(tcache_size == 0);
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run_uncached(__rm7k_tc_enable);
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}
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|
2005-04-16 16:20:36 -06:00
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|
/*
|
2005-04-25 10:36:23 -06:00
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|
|
* This function is executed in uncached address space.
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
|
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static void __rm7k_sc_enable(void)
|
2005-04-16 16:20:36 -06:00
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|
{
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int i;
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|
2005-06-20 07:09:49 -06:00
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set_c0_config(RM7K_CONF_SE);
|
2005-04-16 16:20:36 -06:00
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write_c0_taglo(0);
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write_c0_taghi(0);
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|
2010-07-18 21:59:59 -06:00
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for (i = 0; i < scache_size; i += sc_lsize)
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cache_op(Index_Store_Tag_SD, CKSEG0ADDR(i));
|
2005-04-16 16:20:36 -06:00
|
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|
}
|
|
|
|
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
|
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static void rm7k_sc_enable(void)
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2005-04-16 16:20:36 -06:00
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{
|
2005-06-20 07:09:49 -06:00
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if (read_c0_config() & RM7K_CONF_SE)
|
2005-04-16 16:20:36 -06:00
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return;
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|
2010-07-18 22:00:00 -06:00
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pr_info("Enabling secondary cache...\n");
|
2005-04-25 10:36:23 -06:00
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run_uncached(__rm7k_sc_enable);
|
2010-07-18 22:00:00 -06:00
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if (rm7k_tcache_init)
|
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rm7k_tc_enable();
|
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|
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}
|
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|
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static void rm7k_tc_disable(void)
|
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|
|
{
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|
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unsigned long flags;
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local_irq_save(flags);
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blast_rm7k_tcache();
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clear_c0_config(RM7K_CONF_TE);
|
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local_irq_save(flags);
|
2005-04-16 16:20:36 -06:00
|
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}
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static void rm7k_sc_disable(void)
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{
|
2005-06-20 07:09:49 -06:00
|
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clear_c0_config(RM7K_CONF_SE);
|
2010-07-18 22:00:00 -06:00
|
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if (rm7k_tcache_init)
|
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rm7k_tc_disable();
|
2005-04-16 16:20:36 -06:00
|
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|
}
|
|
|
|
|
2009-03-30 13:53:23 -06:00
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|
static struct bcache_ops rm7k_sc_ops = {
|
2005-04-16 16:20:36 -06:00
|
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|
.bc_enable = rm7k_sc_enable,
|
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|
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.bc_disable = rm7k_sc_disable,
|
|
|
|
.bc_wback_inv = rm7k_sc_wback_inv,
|
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.bc_inv = rm7k_sc_inv
|
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};
|
|
|
|
|
2010-07-18 22:00:00 -06:00
|
|
|
/*
|
|
|
|
* This is a probing function like the one found in c-r4k.c, we look for the
|
|
|
|
* wrap around point with different addresses.
|
|
|
|
*/
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
|
|
|
static void __probe_tcache(void)
|
2010-07-18 22:00:00 -06:00
|
|
|
{
|
|
|
|
unsigned long flags, addr, begin, end, pow2;
|
|
|
|
|
|
|
|
begin = (unsigned long) &_stext;
|
|
|
|
begin &= ~((8 * 1024 * 1024) - 1);
|
|
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|
end = begin + (8 * 1024 * 1024);
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
|
|
|
set_c0_config(RM7K_CONF_TE);
|
|
|
|
|
|
|
|
/* Fill size-multiple lines with a valid tag */
|
|
|
|
pow2 = (256 * 1024);
|
|
|
|
for (addr = begin; addr <= end; addr = (begin + pow2)) {
|
|
|
|
unsigned long *p = (unsigned long *) addr;
|
|
|
|
__asm__ __volatile__("nop" : : "r" (*p));
|
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|
|
pow2 <<= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Load first line with a 0 tag, to check after */
|
|
|
|
write_c0_taglo(0);
|
|
|
|
write_c0_taghi(0);
|
|
|
|
cache_op(Index_Store_Tag_T, begin);
|
|
|
|
|
|
|
|
/* Look for the wrap-around */
|
|
|
|
pow2 = (512 * 1024);
|
|
|
|
for (addr = begin + (512 * 1024); addr <= end; addr = begin + pow2) {
|
|
|
|
cache_op(Index_Load_Tag_T, addr);
|
|
|
|
if (!read_c0_taglo())
|
|
|
|
break;
|
|
|
|
pow2 <<= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr -= begin;
|
|
|
|
tcache_size = addr;
|
|
|
|
|
|
|
|
clear_c0_config(RM7K_CONF_TE);
|
|
|
|
|
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local_irq_restore(flags);
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}
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MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 07:38:59 -06:00
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|
|
void rm7k_sc_init(void)
|
2005-04-16 16:20:36 -06:00
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{
|
2006-02-15 02:25:48 -07:00
|
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struct cpuinfo_mips *c = ¤t_cpu_data;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int config = read_c0_config();
|
|
|
|
|
2005-06-20 07:09:49 -06:00
|
|
|
if ((config & RM7K_CONF_SC))
|
2005-04-16 16:20:36 -06:00
|
|
|
return;
|
|
|
|
|
2006-02-15 02:25:48 -07:00
|
|
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c->scache.linesz = sc_lsize;
|
|
|
|
c->scache.ways = 4;
|
2006-04-07 10:33:31 -06:00
|
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|
c->scache.waybit= __ffs(scache_size / c->scache.ways);
|
2006-02-15 02:25:48 -07:00
|
|
|
c->scache.waysize = scache_size / c->scache.ways;
|
|
|
|
c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
|
2005-04-16 16:20:36 -06:00
|
|
|
printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
|
|
|
|
(scache_size >> 10), sc_lsize);
|
|
|
|
|
2005-06-20 07:09:49 -06:00
|
|
|
if (!(config & RM7K_CONF_SE))
|
2005-04-16 16:20:36 -06:00
|
|
|
rm7k_sc_enable();
|
|
|
|
|
2010-07-18 22:00:00 -06:00
|
|
|
bcops = &rm7k_sc_ops;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/*
|
|
|
|
* While we're at it let's deal with the tertiary cache.
|
|
|
|
*/
|
|
|
|
|
2010-07-18 22:00:00 -06:00
|
|
|
rm7k_tcache_init = 0;
|
|
|
|
tcache_size = 0;
|
|
|
|
|
|
|
|
if (config & RM7K_CONF_TC)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* No efficient way to ask the hardware for the size of the tcache,
|
|
|
|
* so must probe for it.
|
|
|
|
*/
|
|
|
|
run_uncached(__probe_tcache);
|
|
|
|
rm7k_tc_enable();
|
|
|
|
rm7k_tcache_init = 1;
|
|
|
|
c->tcache.linesz = tc_lsize;
|
|
|
|
c->tcache.ways = 1;
|
|
|
|
pr_info("Tertiary cache size %ldK.\n", (tcache_size >> 10));
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|