2007-02-08 00:33:55 -07:00
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/*
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* Copyright 2006 Michael Ellerman, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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2011-04-03 21:46:58 -06:00
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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2007-02-08 00:33:55 -07:00
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#include <asm/machdep.h>
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#include <asm/page.h>
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#include <asm/firmware.h>
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#include <asm/kexec.h>
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2011-04-03 21:46:58 -06:00
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#include <asm/xics.h>
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powerpc/xive: guest exploitation of the XIVE interrupt controller
This is the framework for using XIVE in a PowerVM guest. The support
is very similar to the native one in a much simpler form.
Each source is associated with an Event State Buffer (ESB). This is a
two bit state machine which is used to trigger events. The bits are
named "P" (pending) and "Q" (queued) and can be controlled by MMIO.
The Guest OS registers event (or notifications) queues on which the HW
will post event data for a target to notify.
Instead of OPAL calls, a set of Hypervisors call are used to configure
the interrupt sources and the event/notification queues of the guest:
- H_INT_GET_SOURCE_INFO
used to obtain the address of the MMIO page of the Event State
Buffer (PQ bits) entry associated with the source.
- H_INT_SET_SOURCE_CONFIG
assigns a source to a "target".
- H_INT_GET_SOURCE_CONFIG
determines to which "target" and "priority" is assigned to a source
- H_INT_GET_QUEUE_INFO
returns the address of the notification management page associated
with the specified "target" and "priority".
- H_INT_SET_QUEUE_CONFIG
sets or resets the event queue for a given "target" and "priority".
It is also used to set the notification config associated with the
queue, only unconditional notification for the moment. Reset is
performed with a queue size of 0 and queueing is disabled in that
case.
- H_INT_GET_QUEUE_CONFIG
returns the queue settings for a given "target" and "priority".
- H_INT_RESET
resets all of the partition's interrupt exploitation structures to
their initial state, losing all configuration set via the hcalls
H_INT_SET_SOURCE_CONFIG and H_INT_SET_QUEUE_CONFIG.
- H_INT_SYNC
issue a synchronisation on a source to make sure sure all
notifications have reached their queue.
As for XICS, the XIVE interface for the guest is described in the
device tree under the "interrupt-controller" node. A couple of new
properties are specific to XIVE :
- "reg"
contains the base address and size of the thread interrupt
managnement areas (TIMA), also called rings, for the User level and
for the Guest OS level. Only the Guest OS level is taken into
account today.
- "ibm,xive-eq-sizes"
the size of the event queues. One cell per size supported, contains
log2 of size, in ascending order.
- "ibm,xive-lisn-ranges"
the interrupt numbers ranges assigned to the guest. These are
allocated using a simple bitmap.
and also :
- "/ibm,plat-res-int-priorities"
contains a list of priorities that the hypervisor has reserved for
its own use.
Tested with a QEMU XIVE model for pseries and with the Power hypervisor.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-30 13:46:11 -06:00
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#include <asm/xive.h>
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2007-05-10 06:17:18 -06:00
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#include <asm/smp.h>
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2013-08-22 03:53:52 -06:00
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#include <asm/plpar_wrappers.h>
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2007-02-08 00:33:55 -07:00
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#include "pseries.h"
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2016-05-30 00:18:13 -06:00
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void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
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2007-02-08 00:33:55 -07:00
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{
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2018-02-13 08:08:13 -07:00
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/*
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* Don't risk a hypervisor call if we're crashing
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* XXX: Why? The hypervisor is not crashing. It might be better
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* to at least attempt unregister to avoid the hypervisor stepping
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* on our memory.
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*/
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2007-02-08 00:33:55 -07:00
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if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
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2011-07-24 19:46:32 -06:00
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int ret;
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2011-07-24 19:46:34 -06:00
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int cpu = smp_processor_id();
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int hwcpu = hard_smp_processor_id();
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2011-07-24 19:46:32 -06:00
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if (get_lppaca()->dtl_enable_mask) {
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2011-07-24 19:46:34 -06:00
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ret = unregister_dtl(hwcpu);
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2011-07-24 19:46:32 -06:00
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if (ret) {
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pr_err("WARNING: DTL deregistration for cpu "
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"%d (hw %d) failed with %d\n",
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2011-07-24 19:46:34 -06:00
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cpu, hwcpu, ret);
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2011-07-24 19:46:32 -06:00
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}
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}
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2007-02-08 00:33:55 -07:00
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2011-07-24 19:46:34 -06:00
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ret = unregister_slb_shadow(hwcpu);
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2011-07-24 19:46:33 -06:00
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if (ret) {
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pr_err("WARNING: SLB shadow buffer deregistration "
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"for cpu %d (hw %d) failed with %d\n",
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2011-07-24 19:46:34 -06:00
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cpu, hwcpu, ret);
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2011-07-24 19:46:33 -06:00
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}
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2007-02-08 00:33:55 -07:00
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2011-07-24 19:46:34 -06:00
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ret = unregister_vpa(hwcpu);
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2011-07-24 19:46:33 -06:00
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if (ret) {
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pr_err("WARNING: VPA deregistration for cpu %d "
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2011-07-24 19:46:34 -06:00
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"(hw %d) failed with %d\n", cpu, hwcpu, ret);
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2007-02-08 00:33:55 -07:00
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}
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}
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2018-05-08 01:05:16 -06:00
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if (xive_enabled()) {
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2018-04-10 23:18:01 -06:00
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xive_teardown_cpu();
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2018-05-08 01:05:16 -06:00
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if (!secondary)
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xive_shutdown();
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} else
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powerpc/xive: guest exploitation of the XIVE interrupt controller
This is the framework for using XIVE in a PowerVM guest. The support
is very similar to the native one in a much simpler form.
Each source is associated with an Event State Buffer (ESB). This is a
two bit state machine which is used to trigger events. The bits are
named "P" (pending) and "Q" (queued) and can be controlled by MMIO.
The Guest OS registers event (or notifications) queues on which the HW
will post event data for a target to notify.
Instead of OPAL calls, a set of Hypervisors call are used to configure
the interrupt sources and the event/notification queues of the guest:
- H_INT_GET_SOURCE_INFO
used to obtain the address of the MMIO page of the Event State
Buffer (PQ bits) entry associated with the source.
- H_INT_SET_SOURCE_CONFIG
assigns a source to a "target".
- H_INT_GET_SOURCE_CONFIG
determines to which "target" and "priority" is assigned to a source
- H_INT_GET_QUEUE_INFO
returns the address of the notification management page associated
with the specified "target" and "priority".
- H_INT_SET_QUEUE_CONFIG
sets or resets the event queue for a given "target" and "priority".
It is also used to set the notification config associated with the
queue, only unconditional notification for the moment. Reset is
performed with a queue size of 0 and queueing is disabled in that
case.
- H_INT_GET_QUEUE_CONFIG
returns the queue settings for a given "target" and "priority".
- H_INT_RESET
resets all of the partition's interrupt exploitation structures to
their initial state, losing all configuration set via the hcalls
H_INT_SET_SOURCE_CONFIG and H_INT_SET_QUEUE_CONFIG.
- H_INT_SYNC
issue a synchronisation on a source to make sure sure all
notifications have reached their queue.
As for XICS, the XIVE interface for the guest is described in the
device tree under the "interrupt-controller" node. A couple of new
properties are specific to XIVE :
- "reg"
contains the base address and size of the thread interrupt
managnement areas (TIMA), also called rings, for the User level and
for the Guest OS level. Only the Guest OS level is taken into
account today.
- "ibm,xive-eq-sizes"
the size of the event queues. One cell per size supported, contains
log2 of size, in ascending order.
- "ibm,xive-lisn-ranges"
the interrupt numbers ranges assigned to the guest. These are
allocated using a simple bitmap.
and also :
- "/ibm,plat-res-int-priorities"
contains a list of priorities that the hypervisor has reserved for
its own use.
Tested with a QEMU XIVE model for pseries and with the Power hypervisor.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-30 13:46:11 -06:00
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xics_kexec_teardown_cpu(secondary);
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2007-02-08 00:33:55 -07:00
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}
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