2019-08-22 06:45:04 -06:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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// Copyright 2019 IBM Corp.
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/dts-v1/;
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#include "aspeed-g6.dtsi"
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2019-10-03 16:24:14 -06:00
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#include <dt-bindings/gpio/aspeed-gpio.h>
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2019-09-13 10:15:53 -06:00
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#include <dt-bindings/leds/leds-pca955x.h>
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2019-08-22 06:45:04 -06:00
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/ {
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model = "Tacoma";
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compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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flash_memory: region@ba000000 {
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no-map;
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2019-10-16 18:29:54 -06:00
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reg = <0xb8000000 0x4000000>; /* 64M */
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2019-08-22 06:45:04 -06:00
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};
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};
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2019-10-03 16:24:14 -06:00
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gpio-keys {
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compatible = "gpio-keys";
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air-water {
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label = "air-water";
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gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(Q, 7)>;
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};
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checkstop {
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label = "checkstop";
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gpios = <&gpio0 ASPEED_GPIO(E, 3) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(E, 3)>;
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};
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ps0-presence {
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label = "ps0-presence";
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gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(H, 3)>;
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};
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ps1-presence {
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label = "ps1-presence";
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gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(E, 5)>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <1000>;
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fan0-presence {
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label = "fan0-presence";
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gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
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linux,code = <4>;
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};
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fan1-presence {
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label = "fan1-presence";
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gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
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linux,code = <5>;
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};
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fan2-presence {
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label = "fan2-presence";
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gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
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linux,code = <6>;
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};
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fan3-presence {
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label = "fan3-presence";
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gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
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linux,code = <7>;
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};
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};
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2019-08-22 06:45:04 -06:00
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};
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2019-09-25 23:24:29 -06:00
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&fmc {
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status = "okay";
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "bmc";
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spi-max-frequency = <50000000>;
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#include "openbmc-flash-layout-128.dtsi"
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};
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flash@1 {
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status = "okay";
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m25p,fast-read;
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label = "alt-bmc";
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spi-max-frequency = <50000000>;
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};
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};
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2019-09-25 23:24:29 -06:00
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default>;
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "pnor";
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spi-max-frequency = <100000000>;
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};
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};
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&fmc {
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status = "okay";
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "bmc";
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spi-max-frequency = <50000000>;
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#include "openbmc-flash-layout-128.dtsi"
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};
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flash@1 {
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status = "okay";
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m25p,fast-read;
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label = "alt-bmc";
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spi-max-frequency = <50000000>;
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};
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};
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2019-09-25 23:24:29 -06:00
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default>;
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "pnor";
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spi-max-frequency = <100000000>;
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};
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};
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2019-08-22 06:45:04 -06:00
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&mac2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rmii3_default>;
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2019-09-25 09:34:39 -06:00
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clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
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<&syscon ASPEED_CLK_MAC3RCLK>;
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clock-names = "MACCLK", "RCLK";
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2019-08-22 06:45:04 -06:00
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use-ncsi;
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};
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&emmc {
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status = "okay";
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2019-10-16 18:29:53 -06:00
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#address-cells = <2>;
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#size-cells = <0>;
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cfam@0,0 {
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reg = <0 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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chip-id = <0>;
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scom@1000 {
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compatible = "ibm,fsi2pib";
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reg = <0x1000 0x400>;
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};
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i2c@1800 {
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compatible = "ibm,fsi-i2c-master";
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reg = <0x1800 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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cfam0_i2c0: i2c-bus@0 {
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reg = <0>;
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};
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cfam0_i2c1: i2c-bus@1 {
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reg = <1>;
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};
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cfam0_i2c2: i2c-bus@2 {
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reg = <2>;
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};
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cfam0_i2c3: i2c-bus@3 {
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reg = <3>;
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};
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cfam0_i2c4: i2c-bus@4 {
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reg = <4>;
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};
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cfam0_i2c5: i2c-bus@5 {
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reg = <5>;
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};
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cfam0_i2c6: i2c-bus@6 {
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reg = <6>;
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};
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cfam0_i2c7: i2c-bus@7 {
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reg = <7>;
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};
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cfam0_i2c8: i2c-bus@8 {
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reg = <8>;
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};
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cfam0_i2c9: i2c-bus@9 {
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reg = <9>;
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};
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cfam0_i2c10: i2c-bus@a {
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reg = <10>;
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};
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cfam0_i2c11: i2c-bus@b {
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reg = <11>;
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};
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cfam0_i2c12: i2c-bus@c {
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reg = <12>;
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};
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cfam0_i2c13: i2c-bus@d {
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reg = <13>;
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};
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cfam0_i2c14: i2c-bus@e {
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reg = <14>;
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};
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};
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sbefifo@2400 {
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compatible = "ibm,p9-sbefifo";
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reg = <0x2400 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsi_occ0: occ {
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compatible = "ibm,p9-occ";
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};
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};
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fsi_hub0: hub@3400 {
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compatible = "fsi-master-hub";
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reg = <0x3400 0x400>;
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#address-cells = <2>;
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#size-cells = <0>;
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no-scan-on-init;
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};
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};
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};
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&fsi_hub0 {
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cfam@1,0 {
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reg = <1 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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chip-id = <1>;
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scom@1000 {
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compatible = "ibm,fsi2pib";
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reg = <0x1000 0x400>;
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};
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i2c@1800 {
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compatible = "ibm,fsi-i2c-master";
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reg = <0x1800 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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cfam1_i2c0: i2c-bus@0 {
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reg = <0>;
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};
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cfam1_i2c1: i2c-bus@1 {
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reg = <1>;
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};
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cfam1_i2c2: i2c-bus@2 {
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reg = <2>;
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};
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cfam1_i2c3: i2c-bus@3 {
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reg = <3>;
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};
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cfam1_i2c4: i2c-bus@4 {
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reg = <4>;
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};
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cfam1_i2c5: i2c-bus@5 {
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reg = <5>;
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};
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cfam1_i2c6: i2c-bus@6 {
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reg = <6>;
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};
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cfam1_i2c7: i2c-bus@7 {
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reg = <7>;
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};
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cfam1_i2c8: i2c-bus@8 {
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reg = <8>;
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};
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cfam1_i2c9: i2c-bus@9 {
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reg = <9>;
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};
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cfam1_i2c10: i2c-bus@a {
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reg = <10>;
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};
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cfam1_i2c11: i2c-bus@b {
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reg = <11>;
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};
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cfam1_i2c12: i2c-bus@c {
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reg = <12>;
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};
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cfam1_i2c13: i2c-bus@d {
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reg = <13>;
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};
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cfam1_i2c14: i2c-bus@e {
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reg = <14>;
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};
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};
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sbefifo@2400 {
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compatible = "ibm,p9-sbefifo";
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reg = <0x2400 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsi_occ1: occ {
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compatible = "ibm,p9-occ";
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};
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};
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fsi_hub1: hub@3400 {
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compatible = "fsi-master-hub";
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reg = <0x3400 0x400>;
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#address-cells = <2>;
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#size-cells = <0>;
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no-scan-on-init;
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};
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};
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};
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/* Legacy OCC numbering (to get rid of when userspace is fixed) */
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&fsi_occ0 {
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reg = <1>;
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};
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&fsi_occ1 {
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reg = <2>;
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};
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/ {
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aliases {
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i2c100 = &cfam0_i2c0;
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i2c101 = &cfam0_i2c1;
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i2c102 = &cfam0_i2c2;
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i2c103 = &cfam0_i2c3;
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i2c104 = &cfam0_i2c4;
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i2c105 = &cfam0_i2c5;
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i2c106 = &cfam0_i2c6;
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i2c107 = &cfam0_i2c7;
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i2c108 = &cfam0_i2c8;
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i2c109 = &cfam0_i2c9;
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i2c110 = &cfam0_i2c10;
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i2c111 = &cfam0_i2c11;
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i2c112 = &cfam0_i2c12;
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i2c113 = &cfam0_i2c13;
|
|
|
|
i2c114 = &cfam0_i2c14;
|
|
|
|
i2c200 = &cfam1_i2c0;
|
|
|
|
i2c201 = &cfam1_i2c1;
|
|
|
|
i2c202 = &cfam1_i2c2;
|
|
|
|
i2c203 = &cfam1_i2c3;
|
|
|
|
i2c204 = &cfam1_i2c4;
|
|
|
|
i2c205 = &cfam1_i2c5;
|
|
|
|
i2c206 = &cfam1_i2c6;
|
|
|
|
i2c207 = &cfam1_i2c7;
|
|
|
|
i2c208 = &cfam1_i2c8;
|
|
|
|
i2c209 = &cfam1_i2c9;
|
|
|
|
i2c210 = &cfam1_i2c10;
|
|
|
|
i2c211 = &cfam1_i2c11;
|
|
|
|
i2c212 = &cfam1_i2c12;
|
|
|
|
i2c213 = &cfam1_i2c13;
|
|
|
|
i2c214 = &cfam1_i2c14;
|
|
|
|
};
|
|
|
|
|
2019-08-22 06:45:04 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c3 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
bmp: bmp280@77 {
|
|
|
|
compatible = "bosch,bmp280";
|
|
|
|
reg = <0x77>;
|
|
|
|
#io-channel-cells = <1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
max31785@52 {
|
|
|
|
compatible = "maxim,max31785a";
|
|
|
|
reg = <0x52>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fan@0 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <0>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@1 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <1>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@2 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <2>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@3 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <3>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
dps: dps310@76 {
|
|
|
|
compatible = "infineon,dps310";
|
|
|
|
reg = <0x76>;
|
|
|
|
#io-channel-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pca0: pca9552@60 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x60>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@12 {
|
|
|
|
reg = <12>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@13 {
|
|
|
|
reg = <13>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@14 {
|
|
|
|
reg = <14>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@15 {
|
|
|
|
reg = <15>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@68 {
|
|
|
|
compatible = "ibm,cffps1";
|
|
|
|
reg = <0x68>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@69 {
|
|
|
|
compatible = "ibm,cffps1";
|
|
|
|
reg = <0x69>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c4 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp423a@4c {
|
|
|
|
compatible = "ti,tmp423";
|
|
|
|
reg = <0x4c>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@70 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x70>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@71 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x71>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c5 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp423a@4c {
|
|
|
|
compatible = "ti,tmp423";
|
|
|
|
reg = <0x4c>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@70 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x70>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@71 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x71>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c7 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c9 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp275@4a {
|
|
|
|
compatible = "ti,tmp275";
|
|
|
|
reg = <0x4a>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c10 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c11 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
pca9552: pca9552@60 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x60>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
|
|
|
|
"GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
|
|
|
|
"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
|
|
|
|
"GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
|
|
|
|
"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
|
|
|
|
"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
|
|
|
|
"GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
|
|
|
|
"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@12 {
|
|
|
|
reg = <12>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@13 {
|
|
|
|
reg = <13>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@14 {
|
|
|
|
reg = <14>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@15 {
|
|
|
|
reg = <15>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
rtc@32 {
|
|
|
|
compatible = "epson,rx8900";
|
|
|
|
reg = <0x32>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ucd90160@64 {
|
|
|
|
compatible = "ti,ucd90160";
|
|
|
|
reg = <0x64>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c12 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c13 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ibt {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2019-10-16 05:59:02 -06:00
|
|
|
&uart1 {
|
|
|
|
status = "okay";
|
|
|
|
// Workaround for A0
|
|
|
|
compatible = "snps,dw-apb-uart";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart5 {
|
|
|
|
// Workaround for A0
|
|
|
|
compatible = "snps,dw-apb-uart";
|
|
|
|
};
|
|
|
|
|
2019-08-22 06:45:04 -06:00
|
|
|
&vuart1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&lpc_ctrl {
|
|
|
|
status = "okay";
|
|
|
|
memory-region = <&flash_memory>;
|
|
|
|
flash = <&spi1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&wdt1 {
|
|
|
|
aspeed,reset-type = "none";
|
|
|
|
aspeed,external-signal;
|
|
|
|
aspeed,ext-push-pull;
|
|
|
|
aspeed,ext-active-high;
|
|
|
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&wdt2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2019-09-13 10:15:53 -06:00
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c3 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
bmp: bmp280@77 {
|
|
|
|
compatible = "bosch,bmp280";
|
|
|
|
reg = <0x77>;
|
|
|
|
#io-channel-cells = <1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
max31785@52 {
|
|
|
|
compatible = "maxim,max31785a";
|
|
|
|
reg = <0x52>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fan@0 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <0>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@1 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <1>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@2 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <2>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@3 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <3>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
maxim,fan-rotor-input = "tach";
|
|
|
|
maxim,fan-pwm-freq = <25000>;
|
|
|
|
maxim,fan-dual-tach;
|
|
|
|
maxim,fan-no-watchdog;
|
|
|
|
maxim,fan-no-fault-ramp;
|
|
|
|
maxim,fan-ramp = <2>;
|
|
|
|
maxim,fan-fault-pin-mon;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
dps: dps310@76 {
|
|
|
|
compatible = "infineon,dps310";
|
|
|
|
reg = <0x76>;
|
|
|
|
#io-channel-cells = <0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pca0: pca9552@60 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x60>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@12 {
|
|
|
|
reg = <12>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@13 {
|
|
|
|
reg = <13>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@14 {
|
|
|
|
reg = <14>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@15 {
|
|
|
|
reg = <15>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@68 {
|
|
|
|
compatible = "ibm,cffps1";
|
|
|
|
reg = <0x68>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@69 {
|
|
|
|
compatible = "ibm,cffps1";
|
|
|
|
reg = <0x69>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c4 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp423a@4c {
|
|
|
|
compatible = "ti,tmp423";
|
|
|
|
reg = <0x4c>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@70 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x70>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@71 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x71>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c5 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp423a@4c {
|
|
|
|
compatible = "ti,tmp423";
|
|
|
|
reg = <0x4c>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@70 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x70>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ir35221@71 {
|
|
|
|
compatible = "infineon,ir35221";
|
|
|
|
reg = <0x71>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c7 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c9 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
tmp275@4a {
|
|
|
|
compatible = "ti,tmp275";
|
|
|
|
reg = <0x4a>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c10 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c11 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
pca9552: pca9552@60 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x60>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
|
|
|
|
"GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
|
|
|
|
"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
|
|
|
|
"GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
|
|
|
|
"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
|
|
|
|
"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
|
|
|
|
"GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
|
|
|
|
"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@12 {
|
|
|
|
reg = <12>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@13 {
|
|
|
|
reg = <13>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@14 {
|
|
|
|
reg = <14>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@15 {
|
|
|
|
reg = <15>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
rtc@32 {
|
|
|
|
compatible = "epson,rx8900";
|
|
|
|
reg = <0x32>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ucd90160@64 {
|
|
|
|
compatible = "ti,ucd90160";
|
|
|
|
reg = <0x64>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c12 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c13 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2019-10-21 22:47:36 -06:00
|
|
|
|
|
|
|
&pinctrl {
|
|
|
|
/* Hog these as no driver is probed for the entire LPC block */
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_lpc_default>,
|
|
|
|
<&pinctrl_lsirq_default>;
|
|
|
|
};
|