2008-10-30 05:04:29 -06:00
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#include "wb35reg_f.h"
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#include <linux/usb.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2008-10-01 06:36:56 -06:00
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2009-01-12 09:02:47 -07:00
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extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/*
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* true : read command process successfully
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* false : register not support
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* RegisterNo : start base
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* pRegisterData : data point
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* NumberOfData : number of register data
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* Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
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* NO_INCREMENT - Function will write data into the same register
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*/
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unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
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2008-10-01 06:36:56 -06:00
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{
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2010-03-25 07:44:53 -06:00
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struct wb35_reg *reg = &pHwData->reg;
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struct urb *urb = NULL;
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struct wb35_reg_queue *reg_queue = NULL;
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u16 UrbSize;
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struct usb_ctrlrequest *dr;
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u16 i, DataSize = NumberOfData * 4;
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/* Module shutdown */
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2008-10-01 06:36:56 -06:00
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if (pHwData->SurpriseRemove)
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Trying to use burst write function if use new hardware */
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2008-10-22 02:01:47 -06:00
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UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
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2008-10-27 14:47:12 -06:00
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reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
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2008-10-27 15:21:24 -06:00
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urb = usb_alloc_urb(0, GFP_ATOMIC);
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2010-03-25 07:44:53 -06:00
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if (urb && reg_queue) {
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reg_queue->DIRECT = 2; /* burst write register */
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2008-10-22 02:01:47 -06:00
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reg_queue->INDEX = RegisterNo;
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reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
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2010-03-25 07:44:53 -06:00
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memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
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/* the function for reversing register data from little endian to big endian */
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for (i = 0; i < NumberOfData ; i++)
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reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
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2008-10-01 06:36:56 -06:00
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2008-10-22 02:01:47 -06:00
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dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
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2008-10-01 06:36:56 -06:00
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dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
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2010-03-25 07:44:53 -06:00
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dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
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dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
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dr->wIndex = cpu_to_le16(RegisterNo);
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dr->wLength = cpu_to_le16(DataSize);
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2008-10-22 02:01:47 -06:00
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reg_queue->Next = NULL;
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reg_queue->pUsbReq = dr;
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reg_queue->urb = urb;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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spin_lock_irq(®->EP0VM_spin_lock);
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2008-10-22 02:02:37 -06:00
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if (reg->reg_first == NULL)
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reg->reg_first = reg_queue;
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2008-10-01 06:36:56 -06:00
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else
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2008-10-22 02:02:37 -06:00
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reg->reg_last->Next = reg_queue;
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reg->reg_last = reg_queue;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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spin_unlock_irq(®->EP0VM_spin_lock);
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Start EP0VM */
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2008-10-01 06:36:56 -06:00
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Wb35Reg_EP0VM_start(pHwData);
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2008-10-27 14:46:39 -06:00
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return true;
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2008-10-01 06:36:56 -06:00
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} else {
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2008-10-22 02:01:16 -06:00
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if (urb)
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usb_free_urb(urb);
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2011-03-12 22:29:16 -07:00
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kfree(reg_queue);
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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}
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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}
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2010-03-25 07:44:53 -06:00
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void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
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2008-10-01 06:36:56 -06:00
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{
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2008-10-22 02:02:37 -06:00
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struct wb35_reg *reg = &pHwData->reg;
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2008-10-01 06:36:56 -06:00
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switch (RegisterNo) {
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2008-10-22 02:02:37 -06:00
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case 0x3b0: reg->U1B0 = RegisterValue; break;
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case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
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case 0x400: reg->D00_DmaControl = RegisterValue; break;
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case 0x800: reg->M00_MacControl = RegisterValue; break;
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case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
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case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
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case 0x824: reg->M24_MacControl = RegisterValue; break;
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case 0x828: reg->M28_MacControl = RegisterValue; break;
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case 0x82c: reg->M2C_MacControl = RegisterValue; break;
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case 0x838: reg->M38_MacControl = RegisterValue; break;
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case 0x840: reg->M40_MacControl = RegisterValue; break;
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case 0x844: reg->M44_MacControl = RegisterValue; break;
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case 0x848: reg->M48_MacControl = RegisterValue; break;
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case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
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case 0x860: reg->M60_MacControl = RegisterValue; break;
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case 0x868: reg->M68_MacControl = RegisterValue; break;
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case 0x870: reg->M70_MacControl = RegisterValue; break;
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case 0x874: reg->M74_MacControl = RegisterValue; break;
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case 0x878: reg->M78_ERPInformation = RegisterValue; break;
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case 0x87C: reg->M7C_MacControl = RegisterValue; break;
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case 0x880: reg->M80_MacControl = RegisterValue; break;
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case 0x884: reg->M84_MacControl = RegisterValue; break;
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case 0x888: reg->M88_MacControl = RegisterValue; break;
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case 0x898: reg->M98_MacControl = RegisterValue; break;
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case 0x100c: reg->BB0C = RegisterValue; break;
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case 0x102c: reg->BB2C = RegisterValue; break;
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case 0x1030: reg->BB30 = RegisterValue; break;
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case 0x103c: reg->BB3C = RegisterValue; break;
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case 0x1048: reg->BB48 = RegisterValue; break;
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case 0x104c: reg->BB4C = RegisterValue; break;
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case 0x1050: reg->BB50 = RegisterValue; break;
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case 0x1054: reg->BB54 = RegisterValue; break;
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case 0x1058: reg->BB58 = RegisterValue; break;
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case 0x105c: reg->BB5C = RegisterValue; break;
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case 0x1060: reg->BB60 = RegisterValue; break;
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2008-10-01 06:36:56 -06:00
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}
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}
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2010-03-25 07:44:53 -06:00
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/*
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* true : read command process successfully
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* false : register not support
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*/
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unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
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2008-10-01 06:36:56 -06:00
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{
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2008-10-22 02:02:37 -06:00
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struct wb35_reg *reg = &pHwData->reg;
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2008-10-01 06:36:56 -06:00
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int ret = -1;
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2010-03-25 07:44:53 -06:00
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/* Module shutdown */
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2008-10-01 06:36:56 -06:00
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if (pHwData->SurpriseRemove)
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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RegisterValue = cpu_to_le32(RegisterValue);
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2010-03-25 07:44:53 -06:00
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/* update the register by send usb message */
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2008-10-22 02:02:37 -06:00
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reg->SyncIoPause = 1;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Wait until EP0VM stop */
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2008-10-22 02:02:37 -06:00
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while (reg->EP0vm_state != VM_STOP)
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2008-10-22 10:07:03 -06:00
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msleep(10);
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Sync IoCallDriver */
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2008-10-22 02:02:37 -06:00
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reg->EP0vm_state = VM_RUNNING;
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2010-11-28 14:00:08 -07:00
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ret = usb_control_msg(pHwData->udev,
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usb_sndctrlpipe(pHwData->udev, 0),
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2008-10-01 06:36:56 -06:00
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0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
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2010-03-25 07:44:53 -06:00
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0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
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2008-10-22 02:02:37 -06:00
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reg->EP0vm_state = VM_STOP;
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reg->SyncIoPause = 0;
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2008-10-01 06:36:56 -06:00
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Wb35Reg_EP0VM_start(pHwData);
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if (ret < 0) {
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2010-11-28 14:00:00 -07:00
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pr_debug("EP0 Write register usb message sending error\n");
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2010-03-25 07:44:53 -06:00
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pHwData->SurpriseRemove = 1;
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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}
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2008-10-27 14:46:39 -06:00
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return true;
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2008-10-01 06:36:56 -06:00
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}
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2010-03-25 07:44:53 -06:00
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/*
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* true : read command process successfully
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* false : register not support
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*/
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unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
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2008-10-01 06:36:56 -06:00
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{
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2010-03-25 07:44:53 -06:00
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struct wb35_reg *reg = &pHwData->reg;
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struct usb_ctrlrequest *dr;
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struct urb *urb = NULL;
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struct wb35_reg_queue *reg_queue = NULL;
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u16 UrbSize;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Module shutdown */
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2008-10-01 06:36:56 -06:00
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if (pHwData->SurpriseRemove)
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* update the register by send urb request */
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2008-10-22 02:01:47 -06:00
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UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
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2008-10-27 14:47:12 -06:00
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reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
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2008-10-27 15:21:24 -06:00
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urb = usb_alloc_urb(0, GFP_ATOMIC);
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2008-10-22 02:01:47 -06:00
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if (urb && reg_queue) {
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2010-03-25 07:44:53 -06:00
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reg_queue->DIRECT = 1; /* burst write register */
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2008-10-22 02:01:47 -06:00
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reg_queue->INDEX = RegisterNo;
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reg_queue->VALUE = cpu_to_le32(RegisterValue);
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2008-10-27 14:46:39 -06:00
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reg_queue->RESERVED_VALID = false;
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2008-10-22 02:01:47 -06:00
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dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
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2010-03-25 07:44:53 -06:00
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dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
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dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
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2008-10-01 06:36:56 -06:00
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dr->wValue = cpu_to_le16(0x0);
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dr->wIndex = cpu_to_le16(RegisterNo);
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dr->wLength = cpu_to_le16(4);
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2010-03-25 07:44:53 -06:00
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/* Enter the sending queue */
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2008-10-22 02:01:47 -06:00
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reg_queue->Next = NULL;
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reg_queue->pUsbReq = dr;
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reg_queue->urb = urb;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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spin_lock_irq(®->EP0VM_spin_lock);
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2008-10-22 02:02:37 -06:00
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if (reg->reg_first == NULL)
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reg->reg_first = reg_queue;
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2008-10-01 06:36:56 -06:00
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else
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2008-10-22 02:02:37 -06:00
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reg->reg_last->Next = reg_queue;
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reg->reg_last = reg_queue;
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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spin_unlock_irq(®->EP0VM_spin_lock);
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2008-10-01 06:36:56 -06:00
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2010-03-25 07:44:53 -06:00
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/* Start EP0VM */
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2008-10-01 06:36:56 -06:00
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Wb35Reg_EP0VM_start(pHwData);
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2008-10-27 14:46:39 -06:00
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return true;
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2008-10-01 06:36:56 -06:00
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} else {
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2008-10-22 02:01:16 -06:00
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if (urb)
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usb_free_urb(urb);
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2008-10-22 02:01:47 -06:00
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kfree(reg_queue);
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2008-10-27 14:46:39 -06:00
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return false;
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2008-10-01 06:36:56 -06:00
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}
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}
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2010-03-25 07:44:53 -06:00
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/*
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* This command will be executed with a user defined value. When it completes,
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|
|
* this value is useful. For example, hal_set_current_channel will use it.
|
|
|
|
* true : read command process successfully
|
2012-09-03 09:06:02 -06:00
|
|
|
* false : register not supported
|
2010-03-25 07:44:53 -06:00
|
|
|
*/
|
|
|
|
unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
|
|
|
|
u16 RegisterNo,
|
|
|
|
u32 RegisterValue,
|
|
|
|
s8 *pValue,
|
|
|
|
s8 Len)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
|
|
|
struct usb_ctrlrequest *dr;
|
|
|
|
struct urb *urb = NULL;
|
|
|
|
struct wb35_reg_queue *reg_queue = NULL;
|
|
|
|
u16 UrbSize;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Module shutdown */
|
2008-10-01 06:36:56 -06:00
|
|
|
if (pHwData->SurpriseRemove)
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* update the register by send urb request */
|
2008-10-22 02:01:47 -06:00
|
|
|
UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
|
2008-10-27 14:47:12 -06:00
|
|
|
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
|
2008-10-27 15:21:24 -06:00
|
|
|
urb = usb_alloc_urb(0, GFP_ATOMIC);
|
2008-10-22 02:01:47 -06:00
|
|
|
if (urb && reg_queue) {
|
2010-03-25 07:44:53 -06:00
|
|
|
reg_queue->DIRECT = 1; /* burst write register */
|
2008-10-22 02:01:47 -06:00
|
|
|
reg_queue->INDEX = RegisterNo;
|
|
|
|
reg_queue->VALUE = cpu_to_le32(RegisterValue);
|
2010-03-25 07:44:53 -06:00
|
|
|
/* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
|
2008-10-22 02:01:47 -06:00
|
|
|
memcpy(reg_queue->RESERVED, pValue, Len);
|
2008-10-27 14:46:39 -06:00
|
|
|
reg_queue->RESERVED_VALID = true;
|
2008-10-22 02:01:47 -06:00
|
|
|
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
|
2010-03-25 07:44:53 -06:00
|
|
|
dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
|
|
|
|
dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
|
2008-10-01 06:36:56 -06:00
|
|
|
dr->wValue = cpu_to_le16(0x0);
|
|
|
|
dr->wIndex = cpu_to_le16(RegisterNo);
|
|
|
|
dr->wLength = cpu_to_le16(4);
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Enter the sending queue */
|
2008-10-22 02:01:47 -06:00
|
|
|
reg_queue->Next = NULL;
|
|
|
|
reg_queue->pUsbReq = dr;
|
|
|
|
reg_queue->urb = urb;
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
|
|
|
if (reg->reg_first == NULL)
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->reg_first = reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
else
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->reg_last->Next = reg_queue;
|
|
|
|
reg->reg_last = reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Start EP0VM */
|
2008-10-01 06:36:56 -06:00
|
|
|
Wb35Reg_EP0VM_start(pHwData);
|
2008-10-27 14:46:39 -06:00
|
|
|
return true;
|
2008-10-01 06:36:56 -06:00
|
|
|
} else {
|
2008-10-22 02:01:16 -06:00
|
|
|
if (urb)
|
|
|
|
usb_free_urb(urb);
|
2008-10-22 02:01:47 -06:00
|
|
|
kfree(reg_queue);
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/*
|
|
|
|
* true : read command process successfully
|
|
|
|
* false : register not support
|
|
|
|
* pRegisterValue : It must be a resident buffer due to
|
|
|
|
* asynchronous read register.
|
|
|
|
*/
|
|
|
|
unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2008-10-22 02:02:37 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
2010-03-25 07:44:53 -06:00
|
|
|
u32 *pltmp = pRegisterValue;
|
|
|
|
int ret = -1;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Module shutdown */
|
2008-10-01 06:36:56 -06:00
|
|
|
if (pHwData->SurpriseRemove)
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Read the register by send usb message */
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->SyncIoPause = 1;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Wait until EP0VM stop */
|
2008-10-22 02:02:37 -06:00
|
|
|
while (reg->EP0vm_state != VM_STOP)
|
2008-10-22 10:07:03 -06:00
|
|
|
msleep(10);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_RUNNING;
|
2010-11-28 14:00:08 -07:00
|
|
|
ret = usb_control_msg(pHwData->udev,
|
|
|
|
usb_rcvctrlpipe(pHwData->udev, 0),
|
2010-03-25 07:44:53 -06:00
|
|
|
0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
|
|
|
|
0x0, RegisterNo, pltmp, 4, HZ * 100);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
*pRegisterValue = cpu_to_le32(*pltmp);
|
|
|
|
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_STOP;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->SyncIoPause = 0;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
Wb35Reg_EP0VM_start(pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
if (ret < 0) {
|
2010-11-28 14:00:00 -07:00
|
|
|
pr_debug("EP0 Read register usb message sending error\n");
|
2010-03-25 07:44:53 -06:00
|
|
|
pHwData->SurpriseRemove = 1;
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
2008-10-27 14:46:39 -06:00
|
|
|
return true;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/*
|
|
|
|
* true : read command process successfully
|
|
|
|
* false : register not support
|
|
|
|
* pRegisterValue : It must be a resident buffer due to
|
|
|
|
* asynchronous read register.
|
|
|
|
*/
|
|
|
|
unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
|
|
|
struct usb_ctrlrequest *dr;
|
|
|
|
struct urb *urb;
|
|
|
|
struct wb35_reg_queue *reg_queue;
|
|
|
|
u16 UrbSize;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Module shutdown */
|
2008-10-01 06:36:56 -06:00
|
|
|
if (pHwData->SurpriseRemove)
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* update the variable by send Urb to read register */
|
2008-10-22 02:01:47 -06:00
|
|
|
UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
|
2008-10-27 14:47:12 -06:00
|
|
|
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
|
2008-10-27 15:21:24 -06:00
|
|
|
urb = usb_alloc_urb(0, GFP_ATOMIC);
|
2010-03-25 07:44:53 -06:00
|
|
|
if (urb && reg_queue) {
|
|
|
|
reg_queue->DIRECT = 0; /* read register */
|
2008-10-22 02:01:47 -06:00
|
|
|
reg_queue->INDEX = RegisterNo;
|
|
|
|
reg_queue->pBuffer = pRegisterValue;
|
|
|
|
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
|
2010-03-25 07:44:53 -06:00
|
|
|
dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
|
|
|
|
dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
|
2008-10-01 06:36:56 -06:00
|
|
|
dr->wValue = cpu_to_le16(0x0);
|
2010-03-25 07:44:53 -06:00
|
|
|
dr->wIndex = cpu_to_le16(RegisterNo);
|
|
|
|
dr->wLength = cpu_to_le16(4);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Enter the sending queue */
|
2008-10-22 02:01:47 -06:00
|
|
|
reg_queue->Next = NULL;
|
|
|
|
reg_queue->pUsbReq = dr;
|
|
|
|
reg_queue->urb = urb;
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
|
|
|
if (reg->reg_first == NULL)
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->reg_first = reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
else
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->reg_last->Next = reg_queue;
|
|
|
|
reg->reg_last = reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Start EP0VM */
|
|
|
|
Wb35Reg_EP0VM_start(pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-27 14:46:39 -06:00
|
|
|
return true;
|
2008-10-01 06:36:56 -06:00
|
|
|
} else {
|
2008-10-22 02:01:16 -06:00
|
|
|
if (urb)
|
2010-03-25 07:44:53 -06:00
|
|
|
usb_free_urb(urb);
|
2008-10-22 02:01:47 -06:00
|
|
|
kfree(reg_queue);
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2008-10-22 02:02:37 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-29 12:10:32 -06:00
|
|
|
if (atomic_inc_return(®->RegFireCount) == 1) {
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_RUNNING;
|
2008-10-01 06:36:56 -06:00
|
|
|
Wb35Reg_EP0VM(pHwData);
|
|
|
|
} else
|
2008-10-29 12:10:32 -06:00
|
|
|
atomic_dec(®->RegFireCount);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
void Wb35Reg_EP0VM(struct hw_data *pHwData)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
|
|
|
struct urb *urb;
|
|
|
|
struct usb_ctrlrequest *dr;
|
|
|
|
u32 *pBuffer;
|
2008-10-01 06:36:56 -06:00
|
|
|
int ret = -1;
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg_queue *reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
|
2008-10-22 02:02:37 -06:00
|
|
|
if (reg->SyncIoPause)
|
2008-10-01 06:36:56 -06:00
|
|
|
goto cleanup;
|
|
|
|
|
|
|
|
if (pHwData->SurpriseRemove)
|
|
|
|
goto cleanup;
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Get the register data and send to USB through Irp */
|
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
2008-10-22 02:02:37 -06:00
|
|
|
reg_queue = reg->reg_first;
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:01:47 -06:00
|
|
|
if (!reg_queue)
|
2008-10-01 06:36:56 -06:00
|
|
|
goto cleanup;
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Get an Urb, send it */
|
2008-10-22 02:01:47 -06:00
|
|
|
urb = (struct urb *)reg_queue->urb;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:01:47 -06:00
|
|
|
dr = reg_queue->pUsbReq;
|
|
|
|
urb = reg_queue->urb;
|
|
|
|
pBuffer = reg_queue->pBuffer;
|
2010-03-25 07:44:53 -06:00
|
|
|
if (reg_queue->DIRECT == 1) /* output */
|
2008-10-22 02:01:47 -06:00
|
|
|
pBuffer = ®_queue->VALUE;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-11-28 14:00:08 -07:00
|
|
|
usb_fill_control_urb(urb, pHwData->udev,
|
|
|
|
REG_DIRECTION(pHwData->udev, reg_queue),
|
2010-03-25 07:44:53 -06:00
|
|
|
(u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
|
|
|
|
Wb35Reg_EP0VM_complete, (void *)pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_RUNNING;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-27 15:21:24 -06:00
|
|
|
ret = usb_submit_urb(urb, GFP_ATOMIC);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
if (ret < 0) {
|
2010-11-28 14:00:00 -07:00
|
|
|
pr_debug("EP0 Irp sending error\n");
|
2008-10-01 06:36:56 -06:00
|
|
|
goto cleanup;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
|
|
|
cleanup:
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_STOP;
|
2008-10-29 12:10:32 -06:00
|
|
|
atomic_dec(®->RegFireCount);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
void Wb35Reg_EP0VM_complete(struct urb *urb)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct hw_data *pHwData = (struct hw_data *)urb->context;
|
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
|
|
|
struct wb35_reg_queue *reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Variable setting */
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_COMPLETED;
|
|
|
|
reg->EP0VM_status = urb->status;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_STOP;
|
2008-10-29 12:10:32 -06:00
|
|
|
atomic_dec(®->RegFireCount);
|
2008-10-01 06:36:56 -06:00
|
|
|
} else {
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Complete to send, remove the URB from the first */
|
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
2008-10-22 02:02:37 -06:00
|
|
|
reg_queue = reg->reg_first;
|
|
|
|
if (reg_queue == reg->reg_last)
|
|
|
|
reg->reg_last = NULL;
|
|
|
|
reg->reg_first = reg->reg_first->Next;
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-22 02:02:37 -06:00
|
|
|
|
|
|
|
if (reg->EP0VM_status) {
|
2010-11-28 14:00:00 -07:00
|
|
|
pr_debug("EP0 IoCompleteRoutine return error\n");
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EP0vm_state = VM_STOP;
|
2008-10-01 06:36:56 -06:00
|
|
|
pHwData->SurpriseRemove = 1;
|
|
|
|
} else {
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Success. Update the result */
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Start the next send */
|
2008-10-01 06:36:56 -06:00
|
|
|
Wb35Reg_EP0VM(pHwData);
|
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
kfree(reg_queue);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2008-10-22 02:01:16 -06:00
|
|
|
usb_free_urb(urb);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
void Wb35Reg_destroy(struct hw_data *pHwData)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
|
|
|
struct urb *urb;
|
|
|
|
struct wb35_reg_queue *reg_queue;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
Uxx_power_off_procedure(pHwData);
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Wait for Reg operation completed */
|
2008-10-01 06:36:56 -06:00
|
|
|
do {
|
2010-03-25 07:44:53 -06:00
|
|
|
msleep(10); /* Delay for waiting function enter */
|
2008-10-22 02:02:37 -06:00
|
|
|
} while (reg->EP0vm_state != VM_STOP);
|
2010-03-25 07:44:53 -06:00
|
|
|
msleep(10); /* Delay for waiting function enter */
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Release all the data in RegQueue */
|
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
2008-10-22 02:02:37 -06:00
|
|
|
reg_queue = reg->reg_first;
|
2008-10-22 02:01:47 -06:00
|
|
|
while (reg_queue) {
|
2008-10-22 02:02:37 -06:00
|
|
|
if (reg_queue == reg->reg_last)
|
|
|
|
reg->reg_last = NULL;
|
|
|
|
reg->reg_first = reg->reg_first->Next;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:01:47 -06:00
|
|
|
urb = reg_queue->urb;
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-22 02:01:16 -06:00
|
|
|
if (urb) {
|
|
|
|
usb_free_urb(urb);
|
2008-10-22 02:01:47 -06:00
|
|
|
kfree(reg_queue);
|
2008-10-01 06:36:56 -06:00
|
|
|
} else {
|
2010-11-28 14:00:00 -07:00
|
|
|
pr_debug("EP0 queue release error\n");
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_lock_irq(®->EP0VM_spin_lock);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2008-10-22 02:02:37 -06:00
|
|
|
reg_queue = reg->reg_first;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
2010-03-25 07:44:53 -06:00
|
|
|
spin_unlock_irq(®->EP0VM_spin_lock);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/*
|
|
|
|
* =======================================================================
|
|
|
|
* The function can be run in passive-level only.
|
|
|
|
* =========================================================================
|
|
|
|
*/
|
|
|
|
unsigned char Wb35Reg_initial(struct hw_data *pHwData)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
struct wb35_reg *reg = &pHwData->reg;
|
2008-10-01 06:36:56 -06:00
|
|
|
u32 ltmp;
|
|
|
|
u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Spin lock is acquired for read and write IRP command */
|
|
|
|
spin_lock_init(®->EP0VM_spin_lock);
|
|
|
|
|
|
|
|
/* Getting RF module type from EEPROM */
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x03b4, <mp);
|
|
|
|
|
|
|
|
/* Update RF module type and determine the PHY type by inf or EEPROM */
|
|
|
|
reg->EEPROMPhyType = (u8)(ltmp & 0xff);
|
|
|
|
/*
|
|
|
|
* 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
|
|
|
|
* 16V AL2230, 17 - AL7230, 18 - AL2230S
|
|
|
|
* 32 Reserved
|
|
|
|
* 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
|
|
|
|
*/
|
2008-10-22 02:02:37 -06:00
|
|
|
if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
|
2010-03-25 07:44:53 -06:00
|
|
|
if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
|
2008-10-22 02:02:37 -06:00
|
|
|
(reg->EEPROMPhyType == RF_MAXIM_2827) ||
|
|
|
|
(reg->EEPROMPhyType == RF_MAXIM_2828) ||
|
|
|
|
(reg->EEPROMPhyType == RF_MAXIM_2829) ||
|
|
|
|
(reg->EEPROMPhyType == RF_MAXIM_V1) ||
|
|
|
|
(reg->EEPROMPhyType == RF_AIROHA_2230) ||
|
2010-03-25 07:44:53 -06:00
|
|
|
(reg->EEPROMPhyType == RF_AIROHA_2230S) ||
|
2008-10-22 02:02:37 -06:00
|
|
|
(reg->EEPROMPhyType == RF_AIROHA_7230) ||
|
2010-03-25 07:44:53 -06:00
|
|
|
(reg->EEPROMPhyType == RF_WB_242) ||
|
2008-10-22 02:02:37 -06:00
|
|
|
(reg->EEPROMPhyType == RF_WB_242_1))
|
|
|
|
pHwData->phy_type = reg->EEPROMPhyType;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Power On procedure running. The relative parameter will be set according to phy_type */
|
|
|
|
Uxx_power_on_procedure(pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Reading MAC address */
|
|
|
|
Uxx_ReadEthernetAddress(pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Read VCO trim for RF parameter */
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Read Antenna On/Off of software flag */
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Read TXVGA */
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Get Scan interval setting from EEPROM offset 0x1c */
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Update Ethernet address */
|
|
|
|
memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Update software variable */
|
2008-10-01 06:36:56 -06:00
|
|
|
pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
|
|
|
|
TxVga &= 0x000000ff;
|
|
|
|
pHwData->PowerIndexFromEEPROM = (u8)TxVga;
|
|
|
|
pHwData->VCO_trim = (u8)VCO_trim & 0xff;
|
|
|
|
if (pHwData->VCO_trim == 0xff)
|
|
|
|
pHwData->VCO_trim = 0x28;
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
|
|
|
|
if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
|
2008-10-22 02:02:37 -06:00
|
|
|
reg->EEPROMRegion = REGION_AUTO;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* For Get Tx VGA from EEPROM */
|
|
|
|
GetTxVgaFromEEPROM(pHwData);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Set Scan Interval */
|
2008-10-01 06:36:56 -06:00
|
|
|
pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
|
2010-03-25 07:44:53 -06:00
|
|
|
if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
|
2008-10-01 06:36:56 -06:00
|
|
|
pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/* Initial register */
|
2008-10-01 06:36:56 -06:00
|
|
|
RFSynthesizer_initial(pHwData);
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
BBProcessor_initial(pHwData); /* Async write, must wait until complete */
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
Wb35Reg_phy_calibration(pHwData);
|
|
|
|
|
|
|
|
Mxx_initial(pHwData);
|
|
|
|
Dxx_initial(pHwData);
|
|
|
|
|
|
|
|
if (pHwData->SurpriseRemove)
|
2008-10-27 14:46:39 -06:00
|
|
|
return false;
|
2008-10-01 06:36:56 -06:00
|
|
|
else
|
2010-03-25 07:44:53 -06:00
|
|
|
return true; /* Initial fail */
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/*
|
|
|
|
* ================================================================
|
|
|
|
* CardComputeCrc --
|
|
|
|
*
|
|
|
|
* Description:
|
2012-09-03 09:06:02 -06:00
|
|
|
* Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
|
2010-03-25 07:44:53 -06:00
|
|
|
*
|
|
|
|
* Arguments:
|
|
|
|
* Buffer - the input buffer
|
|
|
|
* Length - the length of Buffer
|
|
|
|
*
|
|
|
|
* Return Value:
|
|
|
|
* The 32-bit CRC value.
|
|
|
|
* ===================================================================
|
|
|
|
*/
|
|
|
|
u32 CardComputeCrc(u8 *Buffer, u32 Length)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
u32 Crc, Carry;
|
|
|
|
u32 i, j;
|
|
|
|
u8 CurByte;
|
|
|
|
|
|
|
|
Crc = 0xffffffff;
|
|
|
|
|
|
|
|
for (i = 0; i < Length; i++) {
|
|
|
|
CurByte = Buffer[i];
|
|
|
|
for (j = 0; j < 8; j++) {
|
|
|
|
Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
|
|
|
|
Crc <<= 1;
|
|
|
|
CurByte >>= 1;
|
|
|
|
if (Carry)
|
|
|
|
Crc = (Crc ^ 0x04c11db6) | Carry;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return Crc;
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
/*
|
|
|
|
* ==================================================================
|
|
|
|
* BitReverse --
|
|
|
|
* Reverse the bits in the input argument, dwData, which is
|
|
|
|
* regarded as a string of bits with the length, DataLength.
|
|
|
|
*
|
|
|
|
* Arguments:
|
|
|
|
* dwData :
|
|
|
|
* DataLength :
|
|
|
|
*
|
|
|
|
* Return:
|
|
|
|
* The converted value.
|
|
|
|
* ==================================================================
|
|
|
|
*/
|
|
|
|
u32 BitReverse(u32 dwData, u32 DataLength)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
u32 HalfLength, i, j;
|
|
|
|
u32 BitA, BitB;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
if (DataLength <= 0)
|
|
|
|
return 0; /* No conversion is done. */
|
2008-10-01 06:36:56 -06:00
|
|
|
dwData = dwData & (0xffffffff >> (32 - DataLength));
|
|
|
|
|
|
|
|
HalfLength = DataLength / 2;
|
2010-03-25 07:44:53 -06:00
|
|
|
for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
|
|
|
|
BitA = GetBit(dwData, i);
|
|
|
|
BitB = GetBit(dwData, j);
|
2008-10-01 06:36:56 -06:00
|
|
|
if (BitA && !BitB) {
|
2010-03-25 07:44:53 -06:00
|
|
|
dwData = ClearBit(dwData, i);
|
|
|
|
dwData = SetBit(dwData, j);
|
2008-10-01 06:36:56 -06:00
|
|
|
} else if (!BitA && BitB) {
|
2010-03-25 07:44:53 -06:00
|
|
|
dwData = SetBit(dwData, i);
|
|
|
|
dwData = ClearBit(dwData, j);
|
|
|
|
} else {
|
|
|
|
/* Do nothing since these two bits are of the save values. */
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return dwData;
|
|
|
|
}
|
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
void Wb35Reg_phy_calibration(struct hw_data *pHwData)
|
2008-10-01 06:36:56 -06:00
|
|
|
{
|
2010-03-25 07:44:53 -06:00
|
|
|
u32 BB3c, BB54;
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
if ((pHwData->phy_type == RF_WB_242) ||
|
|
|
|
(pHwData->phy_type == RF_WB_242_1)) {
|
2010-03-25 07:44:53 -06:00
|
|
|
phy_calibration_winbond(pHwData, 2412); /* Sync operation */
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
|
|
|
|
Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
|
2008-10-01 06:36:56 -06:00
|
|
|
|
|
|
|
pHwData->BB3c_cal = BB3c;
|
|
|
|
pHwData->BB54_cal = BB54;
|
|
|
|
|
|
|
|
RFSynthesizer_initial(pHwData);
|
2010-03-25 07:44:53 -06:00
|
|
|
BBProcessor_initial(pHwData); /* Async operation */
|
2008-10-01 06:36:56 -06:00
|
|
|
|
2010-03-25 07:44:53 -06:00
|
|
|
Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
|
|
|
|
Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
|
2008-10-01 06:36:56 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|