2006-08-29 16:12:40 -06:00
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/*
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2007-05-25 13:39:30 -06:00
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* pata_it821x.c - IT821x PATA for new ATA layer
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2006-08-29 16:12:40 -06:00
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* (C) 2005 Red Hat Inc
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2008-10-27 09:09:10 -06:00
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* Alan Cox <alan@lxorguk.ukuu.org.uk>
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2007-06-11 03:40:07 -06:00
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* (C) 2007 Bartlomiej Zolnierkiewicz
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2006-08-29 16:12:40 -06:00
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*
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* based upon
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*
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* it821x.c
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2006-08-30 22:03:49 -06:00
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*
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2006-08-29 16:12:40 -06:00
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* linux/drivers/ide/pci/it821x.c Version 0.09 December 2004
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*
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2008-10-27 09:09:10 -06:00
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* Copyright (C) 2004 Red Hat
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2006-08-29 16:12:40 -06:00
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*
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* May be copied or modified under the terms of the GNU General Public License
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* Based in part on the ITE vendor provided SCSI driver.
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*
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2010-10-18 03:03:14 -06:00
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* Documentation available from IT8212F_V04.pdf
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* http://www.ite.com.tw/EN/products_more.aspx?CategoryID=3&ID=5,91
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2006-08-29 16:12:40 -06:00
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* Some other documents are NDA.
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*
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* The ITE8212 isn't exactly a standard IDE controller. It has two
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* modes. In pass through mode then it is an IDE controller. In its smart
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* mode its actually quite a capable hardware raid controller disguised
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* as an IDE controller. Smart mode only understands DMA read/write and
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* identify, none of the fancier commands apply. The IT8211 is identical
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* in other respects but lacks the raid mode.
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*
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* Errata:
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* o Rev 0x10 also requires master/slave hold the same DMA timings and
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* cannot do ATAPI MWDMA.
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* o The identify data for raid volumes lacks CHS info (technically ok)
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* but also fails to set the LBA28 and other bits. We fix these in
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* the IDE probe quirk code.
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* o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
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* raid then the controller firmware dies
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* o Smart mode without RAID doesn't clear all the necessary identify
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* bits to reduce the command set to the one used
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*
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* This has a few impacts on the driver
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* - In pass through mode we do all the work you would expect
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* - In smart mode the clocking set up is done by the controller generally
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* but we must watch the other limits and filter.
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* - There are a few extra vendor commands that actually talk to the
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* controller but only work PIO with no IRQ.
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*
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* Vendor areas of the identify block in smart mode are used for the
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* timing and policy set up. Each HDD in raid mode also has a serial
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* block on the disk. The hardware extra commands are get/set chip status,
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* rebuild, get rebuild status.
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*
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* In Linux the driver supports pass through mode as if the device was
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* just another IDE controller. If the smart mode is running then
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* volumes are managed by the controller firmware and each IDE "disk"
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* is a raid volume. Even more cute - the controller can do automated
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* hotplug and rebuild.
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*
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* The pass through controller itself is a little demented. It has a
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* flaw that it has a single set of PIO/MWDMA timings per channel so
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* non UDMA devices restrict each others performance. It also has a
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* single clock source per channel so mixed UDMA100/133 performance
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* isn't perfect and we have to pick a clock. Thankfully none of this
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* matters in smart mode. ATAPI DMA is not currently supported.
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*
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* It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
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*
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* TODO
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* - ATAPI and other speed filtering
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* - RAID configuration ioctls
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2006-08-29 16:12:40 -06:00
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_it821x"
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2009-01-11 12:51:08 -07:00
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#define DRV_VERSION "0.4.2"
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2006-08-29 16:12:40 -06:00
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struct it821x_dev
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{
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unsigned int smart:1, /* Are we in smart raid mode */
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timing10:1; /* Rev 0x10 */
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u8 clock_mode; /* 0, ATA_50 or ATA_66 */
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u8 want[2][2]; /* Mode/Pri log for master slave */
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/* We need these for switching the clock when DMA goes on/off
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The high byte is the 66Mhz timing */
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u16 pio[2]; /* Cached PIO values */
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u16 mwdma[2]; /* Cached MWDMA values */
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u16 udma[2]; /* Cached UDMA values (per drive) */
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u16 last_device; /* Master or slave loaded ? */
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};
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#define ATA_66 0
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#define ATA_50 1
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#define ATA_ANY 2
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#define UDMA_OFF 0
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#define MWDMA_OFF 0
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/*
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* We allow users to force the card into non raid mode without
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2007-10-19 15:10:43 -06:00
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* flashing the alternative BIOS. This is also necessary right now
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2006-08-29 16:12:40 -06:00
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* for embedded platforms that cannot run a PC BIOS but are using this
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* device.
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*/
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static int it8212_noraid;
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/**
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* it821x_program - program the PIO/MWDMA registers
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* @ap: ATA port
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* @adev: Device to program
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* @timing: Timing value (66Mhz in top 8bits, 50 in the low 8)
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*
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* Program the PIO/MWDMA timing for this channel according to the
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* current clock. These share the same register so are managed by
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* the DMA start/stop sequence as with the old driver.
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*/
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static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct it821x_dev *itdev = ap->private_data;
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int channel = ap->port_no;
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u8 conf;
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/* Program PIO/MWDMA timing bits */
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if (itdev->clock_mode == ATA_66)
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conf = timing >> 8;
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else
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conf = timing & 0xFF;
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pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
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}
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/**
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* it821x_program_udma - program the UDMA registers
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* @ap: ATA port
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* @adev: ATA device to update
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* @timing: Timing bits. Top 8 are for 66Mhz bottom for 50Mhz
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*
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* Program the UDMA timing for this drive according to the
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* current clock. Handles the dual clocks and also knows about
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* the errata on the 0x10 revision. The UDMA errata is partly handled
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* here and partly in start_dma.
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*/
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static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing)
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{
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struct it821x_dev *itdev = ap->private_data;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int channel = ap->port_no;
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int unit = adev->devno;
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u8 conf;
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/* Program UDMA timing bits */
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if (itdev->clock_mode == ATA_66)
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conf = timing >> 8;
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else
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conf = timing & 0xFF;
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if (itdev->timing10 == 0)
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pci_write_config_byte(pdev, 0x56 + 4 * channel + unit, conf);
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else {
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/* Early revision must be programmed for both together */
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pci_write_config_byte(pdev, 0x56 + 4 * channel, conf);
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pci_write_config_byte(pdev, 0x56 + 4 * channel + 1, conf);
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}
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}
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/**
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* it821x_clock_strategy
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* @ap: ATA interface
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* @adev: ATA device being updated
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*
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* Select between the 50 and 66Mhz base clocks to get the best
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* results for this interface.
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*/
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static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct it821x_dev *itdev = ap->private_data;
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u8 unit = adev->devno;
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struct ata_device *pair = ata_dev_pair(adev);
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int clock, altclock;
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u8 v;
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int sel = 0;
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/* Look for the most wanted clocking */
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if (itdev->want[0][0] > itdev->want[1][0]) {
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clock = itdev->want[0][1];
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altclock = itdev->want[1][1];
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} else {
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clock = itdev->want[1][1];
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altclock = itdev->want[0][1];
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}
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/* Master doesn't care does the slave ? */
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if (clock == ATA_ANY)
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clock = altclock;
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/* Nobody cares - keep the same clock */
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if (clock == ATA_ANY)
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return;
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/* No change */
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if (clock == itdev->clock_mode)
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return;
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/* Load this into the controller */
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if (clock == ATA_66)
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itdev->clock_mode = ATA_66;
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else {
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itdev->clock_mode = ATA_50;
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sel = 1;
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}
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pci_read_config_byte(pdev, 0x50, &v);
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v &= ~(1 << (1 + ap->port_no));
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v |= sel << (1 + ap->port_no);
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pci_write_config_byte(pdev, 0x50, v);
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/*
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* Reprogram the UDMA/PIO of the pair drive for the switch
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* MWDMA will be dealt with by the dma switcher
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*/
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if (pair && itdev->udma[1-unit] != UDMA_OFF) {
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it821x_program_udma(ap, pair, itdev->udma[1-unit]);
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it821x_program(ap, pair, itdev->pio[1-unit]);
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}
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/*
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* Reprogram the UDMA/PIO of our drive for the switch.
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* MWDMA will be dealt with by the dma switcher
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*/
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if (itdev->udma[unit] != UDMA_OFF) {
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it821x_program_udma(ap, adev, itdev->udma[unit]);
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it821x_program(ap, adev, itdev->pio[unit]);
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}
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}
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/**
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* it821x_passthru_set_piomode - set PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Configure for PIO mode. This is complicated as the register is
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* shared by PIO and MWDMA and for both channels.
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*/
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static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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/* Spec says 89 ref driver uses 88 */
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static const u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
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static const u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
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struct it821x_dev *itdev = ap->private_data;
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int unit = adev->devno;
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int mode_wanted = adev->pio_mode - XFER_PIO_0;
|
2006-08-30 22:03:49 -06:00
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2006-08-29 16:12:40 -06:00
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/* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
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itdev->want[unit][1] = pio_want[mode_wanted];
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itdev->want[unit][0] = 1; /* PIO is lowest priority */
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itdev->pio[unit] = pio[mode_wanted];
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it821x_clock_strategy(ap, adev);
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it821x_program(ap, adev, itdev->pio[unit]);
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}
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/**
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* it821x_passthru_set_dmamode - set initial DMA mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Set up the DMA modes. The actions taken depend heavily on the mode
|
2006-08-30 22:03:49 -06:00
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* to use. If UDMA is used as is hopefully the usual case then the
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2006-08-29 16:12:40 -06:00
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* timing register is private and we need only consider the clock. If
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* we are using MWDMA then we have to manage the setting ourself as
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* we switch devices and mode.
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*/
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static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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|
|
static const u16 dma[] = { 0x8866, 0x3222, 0x3121 };
|
|
|
|
static const u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
|
|
|
|
static const u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
|
|
|
|
static const u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
|
|
|
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
struct it821x_dev *itdev = ap->private_data;
|
|
|
|
int channel = ap->port_no;
|
|
|
|
int unit = adev->devno;
|
|
|
|
u8 conf;
|
|
|
|
|
|
|
|
if (adev->dma_mode >= XFER_UDMA_0) {
|
|
|
|
int mode_wanted = adev->dma_mode - XFER_UDMA_0;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
itdev->want[unit][1] = udma_want[mode_wanted];
|
|
|
|
itdev->want[unit][0] = 3; /* UDMA is high priority */
|
|
|
|
itdev->mwdma[unit] = MWDMA_OFF;
|
|
|
|
itdev->udma[unit] = udma[mode_wanted];
|
|
|
|
if (mode_wanted >= 5)
|
|
|
|
itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
|
|
|
|
|
|
|
|
/* UDMA on. Again revision 0x10 must do the pair */
|
|
|
|
pci_read_config_byte(pdev, 0x50, &conf);
|
|
|
|
if (itdev->timing10)
|
|
|
|
conf &= channel ? 0x9F: 0xE7;
|
|
|
|
else
|
|
|
|
conf &= ~ (1 << (3 + 2 * channel + unit));
|
|
|
|
pci_write_config_byte(pdev, 0x50, conf);
|
|
|
|
it821x_clock_strategy(ap, adev);
|
|
|
|
it821x_program_udma(ap, adev, itdev->udma[unit]);
|
|
|
|
} else {
|
|
|
|
int mode_wanted = adev->dma_mode - XFER_MW_DMA_0;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
itdev->want[unit][1] = mwdma_want[mode_wanted];
|
|
|
|
itdev->want[unit][0] = 2; /* MWDMA is low priority */
|
|
|
|
itdev->mwdma[unit] = dma[mode_wanted];
|
|
|
|
itdev->udma[unit] = UDMA_OFF;
|
|
|
|
|
|
|
|
/* UDMA bits off - Revision 0x10 do them in pairs */
|
|
|
|
pci_read_config_byte(pdev, 0x50, &conf);
|
|
|
|
if (itdev->timing10)
|
|
|
|
conf |= channel ? 0x60: 0x18;
|
|
|
|
else
|
|
|
|
conf |= 1 << (3 + 2 * channel + unit);
|
|
|
|
pci_write_config_byte(pdev, 0x50, conf);
|
|
|
|
it821x_clock_strategy(ap, adev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_passthru_dma_start - DMA start callback
|
|
|
|
* @qc: Command in progress
|
|
|
|
*
|
|
|
|
* Usually drivers set the DMA timing at the point the set_dmamode call
|
2006-08-30 22:03:49 -06:00
|
|
|
* is made. IT821x however requires we load new timings on the
|
2006-08-29 16:12:40 -06:00
|
|
|
* transitions in some cases.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void it821x_passthru_bmdma_start(struct ata_queued_cmd *qc)
|
|
|
|
{
|
|
|
|
struct ata_port *ap = qc->ap;
|
|
|
|
struct ata_device *adev = qc->dev;
|
|
|
|
struct it821x_dev *itdev = ap->private_data;
|
|
|
|
int unit = adev->devno;
|
|
|
|
|
|
|
|
if (itdev->mwdma[unit] != MWDMA_OFF)
|
|
|
|
it821x_program(ap, adev, itdev->mwdma[unit]);
|
|
|
|
else if (itdev->udma[unit] != UDMA_OFF && itdev->timing10)
|
|
|
|
it821x_program_udma(ap, adev, itdev->udma[unit]);
|
|
|
|
ata_bmdma_start(qc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_passthru_dma_stop - DMA stop callback
|
|
|
|
* @qc: ATA command
|
|
|
|
*
|
|
|
|
* We loaded new timings in dma_start, as a result we need to restore
|
|
|
|
* the PIO timings in dma_stop so that the next command issue gets the
|
|
|
|
* right clock values.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void it821x_passthru_bmdma_stop(struct ata_queued_cmd *qc)
|
|
|
|
{
|
|
|
|
struct ata_port *ap = qc->ap;
|
|
|
|
struct ata_device *adev = qc->dev;
|
|
|
|
struct it821x_dev *itdev = ap->private_data;
|
|
|
|
int unit = adev->devno;
|
|
|
|
|
|
|
|
ata_bmdma_stop(qc);
|
|
|
|
if (itdev->mwdma[unit] != MWDMA_OFF)
|
|
|
|
it821x_program(ap, adev, itdev->pio[unit]);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_passthru_dev_select - Select master/slave
|
|
|
|
* @ap: ATA port
|
|
|
|
* @device: Device number (not pointer)
|
|
|
|
*
|
2007-10-19 15:10:43 -06:00
|
|
|
* Device selection hook. If necessary perform clock switching
|
2006-08-29 16:12:40 -06:00
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
static void it821x_passthru_dev_select(struct ata_port *ap,
|
|
|
|
unsigned int device)
|
|
|
|
{
|
|
|
|
struct it821x_dev *itdev = ap->private_data;
|
|
|
|
if (itdev && device != itdev->last_device) {
|
2007-08-06 03:36:22 -06:00
|
|
|
struct ata_device *adev = &ap->link.device[device];
|
2006-08-29 16:12:40 -06:00
|
|
|
it821x_program(ap, adev, itdev->pio[adev->devno]);
|
|
|
|
itdev->last_device = device;
|
|
|
|
}
|
2008-04-07 07:47:16 -06:00
|
|
|
ata_sff_dev_select(ap, device);
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-04-07 07:47:16 -06:00
|
|
|
* it821x_smart_qc_issue - wrap qc issue prot
|
2006-08-29 16:12:40 -06:00
|
|
|
* @qc: command
|
|
|
|
*
|
|
|
|
* Wrap the command issue sequence for the IT821x. We need to
|
|
|
|
* perform out own device selection timing loads before the
|
|
|
|
* usual happenings kick off
|
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2008-04-07 07:47:16 -06:00
|
|
|
static unsigned int it821x_smart_qc_issue(struct ata_queued_cmd *qc)
|
2006-08-29 16:12:40 -06:00
|
|
|
{
|
|
|
|
switch(qc->tf.command)
|
|
|
|
{
|
|
|
|
/* Commands the firmware supports */
|
|
|
|
case ATA_CMD_READ:
|
|
|
|
case ATA_CMD_READ_EXT:
|
|
|
|
case ATA_CMD_WRITE:
|
|
|
|
case ATA_CMD_WRITE_EXT:
|
|
|
|
case ATA_CMD_PIO_READ:
|
|
|
|
case ATA_CMD_PIO_READ_EXT:
|
|
|
|
case ATA_CMD_PIO_WRITE:
|
|
|
|
case ATA_CMD_PIO_WRITE_EXT:
|
|
|
|
case ATA_CMD_READ_MULTI:
|
|
|
|
case ATA_CMD_READ_MULTI_EXT:
|
|
|
|
case ATA_CMD_WRITE_MULTI:
|
|
|
|
case ATA_CMD_WRITE_MULTI_EXT:
|
|
|
|
case ATA_CMD_ID_ATA:
|
2008-07-24 10:16:06 -06:00
|
|
|
case ATA_CMD_INIT_DEV_PARAMS:
|
|
|
|
case 0xFC: /* Internal 'report rebuild state' */
|
2006-08-29 16:12:40 -06:00
|
|
|
/* Arguably should just no-op this one */
|
|
|
|
case ATA_CMD_SET_FEATURES:
|
2010-05-10 13:41:42 -06:00
|
|
|
return ata_bmdma_qc_issue(qc);
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
printk(KERN_DEBUG "it821x: can't process command 0x%02X\n", qc->tf.command);
|
2007-10-25 07:21:16 -06:00
|
|
|
return AC_ERR_DEV;
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-04-07 07:47:16 -06:00
|
|
|
* it821x_passthru_qc_issue - wrap qc issue prot
|
2006-08-29 16:12:40 -06:00
|
|
|
* @qc: command
|
|
|
|
*
|
|
|
|
* Wrap the command issue sequence for the IT821x. We need to
|
|
|
|
* perform out own device selection timing loads before the
|
|
|
|
* usual happenings kick off
|
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2008-04-07 07:47:16 -06:00
|
|
|
static unsigned int it821x_passthru_qc_issue(struct ata_queued_cmd *qc)
|
2006-08-29 16:12:40 -06:00
|
|
|
{
|
|
|
|
it821x_passthru_dev_select(qc->ap, qc->dev->devno);
|
2010-05-10 13:41:42 -06:00
|
|
|
return ata_bmdma_qc_issue(qc);
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_smart_set_mode - mode setting
|
2007-08-06 03:36:23 -06:00
|
|
|
* @link: interface to set up
|
2007-01-24 04:47:07 -07:00
|
|
|
* @unused: device that failed (error only)
|
2006-08-29 16:12:40 -06:00
|
|
|
*
|
|
|
|
* Use a non standard set_mode function. We don't want to be tuned.
|
|
|
|
* The BIOS configured everything. Our job is not to fiddle. We
|
|
|
|
* read the dma enabled bits from the PCI configuration of the device
|
2006-08-30 22:03:49 -06:00
|
|
|
* and respect them.
|
2006-08-29 16:12:40 -06:00
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-08-06 03:36:23 -06:00
|
|
|
static int it821x_smart_set_mode(struct ata_link *link, struct ata_device **unused)
|
2006-08-29 16:12:40 -06:00
|
|
|
{
|
2007-08-06 03:36:23 -06:00
|
|
|
struct ata_device *dev;
|
2006-08-29 16:12:40 -06:00
|
|
|
|
2008-11-03 04:03:17 -07:00
|
|
|
ata_for_each_dev(dev, link, ENABLED) {
|
|
|
|
/* We don't really care */
|
|
|
|
dev->pio_mode = XFER_PIO_0;
|
|
|
|
dev->dma_mode = XFER_MW_DMA_0;
|
|
|
|
/* We do need the right mode information for DMA or PIO
|
|
|
|
and this comes from the current configuration flags */
|
|
|
|
if (ata_id_has_dma(dev->id)) {
|
|
|
|
ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
|
|
|
|
dev->xfer_mode = XFER_MW_DMA_0;
|
|
|
|
dev->xfer_shift = ATA_SHIFT_MWDMA;
|
|
|
|
dev->flags &= ~ATA_DFLAG_PIO;
|
|
|
|
} else {
|
|
|
|
ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
|
|
|
|
dev->xfer_mode = XFER_PIO_0;
|
|
|
|
dev->xfer_shift = ATA_SHIFT_PIO;
|
|
|
|
dev->flags |= ATA_DFLAG_PIO;
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
}
|
2007-01-24 04:47:07 -07:00
|
|
|
return 0;
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_dev_config - Called each device identify
|
|
|
|
* @adev: Device that has just been identified
|
|
|
|
*
|
|
|
|
* Perform the initial setup needed for each device that is chip
|
|
|
|
* special. In our case we need to lock the sector count to avoid
|
|
|
|
* blowing the brains out of the firmware with large LBA48 requests
|
|
|
|
*
|
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-03-01 17:56:15 -07:00
|
|
|
static void it821x_dev_config(struct ata_device *adev)
|
2006-08-29 16:12:40 -06:00
|
|
|
{
|
2007-01-02 04:19:40 -07:00
|
|
|
unsigned char model_num[ATA_ID_PROD_LEN + 1];
|
2006-08-29 16:12:40 -06:00
|
|
|
|
2007-01-02 04:19:40 -07:00
|
|
|
ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
if (adev->max_sectors > 255)
|
|
|
|
adev->max_sectors = 255;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
if (strstr(model_num, "Integrated Technology Express")) {
|
|
|
|
/* RAID mode */
|
2008-07-24 10:16:06 -06:00
|
|
|
ata_dev_printk(adev, KERN_INFO, "%sRAID%d volume",
|
2006-08-29 16:12:40 -06:00
|
|
|
adev->id[147]?"Bootable ":"",
|
|
|
|
adev->id[129]);
|
|
|
|
if (adev->id[129] != 1)
|
|
|
|
printk("(%dK stripe)", adev->id[146]);
|
|
|
|
printk(".\n");
|
|
|
|
}
|
2007-10-25 07:21:16 -06:00
|
|
|
/* This is a controller firmware triggered funny, don't
|
|
|
|
report the drive faulty! */
|
|
|
|
adev->horkage &= ~ATA_HORKAGE_DIAGNOSTIC;
|
2008-07-24 10:16:06 -06:00
|
|
|
/* No HPA in 'smart' mode */
|
|
|
|
adev->horkage |= ATA_HORKAGE_BROKEN_HPA;
|
2007-10-25 07:21:16 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-07-24 10:16:06 -06:00
|
|
|
* it821x_read_id - Hack identify data up
|
|
|
|
* @adev: device to read
|
|
|
|
* @tf: proposed taskfile
|
|
|
|
* @id: buffer for returned ident data
|
2007-10-25 07:21:16 -06:00
|
|
|
*
|
2008-07-24 10:16:06 -06:00
|
|
|
* Query the devices on this firmware driven port and slightly
|
2007-10-25 07:21:16 -06:00
|
|
|
* mash the identify data to stop us and common tools trying to
|
|
|
|
* use features not firmware supported. The firmware itself does
|
|
|
|
* some masking (eg SMART) but not enough.
|
|
|
|
*/
|
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
static unsigned int it821x_read_id(struct ata_device *adev,
|
|
|
|
struct ata_taskfile *tf, u16 *id)
|
2007-10-25 07:21:16 -06:00
|
|
|
{
|
2008-07-24 10:16:06 -06:00
|
|
|
unsigned int err_mask;
|
|
|
|
unsigned char model_num[ATA_ID_PROD_LEN + 1];
|
|
|
|
|
|
|
|
err_mask = ata_do_dev_read_id(adev, tf, id);
|
|
|
|
if (err_mask)
|
|
|
|
return err_mask;
|
|
|
|
ata_id_c_string(id, model_num, ATA_ID_PROD, sizeof(model_num));
|
|
|
|
|
|
|
|
id[83] &= ~(1 << 12); /* Cache flush is firmware handled */
|
|
|
|
id[83] &= ~(1 << 13); /* Ditto for LBA48 flushes */
|
|
|
|
id[84] &= ~(1 << 6); /* No FUA */
|
|
|
|
id[85] &= ~(1 << 10); /* No HPA */
|
|
|
|
id[76] = 0; /* No NCQ/AN etc */
|
|
|
|
|
|
|
|
if (strstr(model_num, "Integrated Technology Express")) {
|
|
|
|
/* Set feature bits the firmware neglects */
|
|
|
|
id[49] |= 0x0300; /* LBA, DMA */
|
|
|
|
id[83] &= 0x7FFF;
|
2008-10-26 16:10:19 -06:00
|
|
|
id[83] |= 0x4400; /* Word 83 is valid and LBA48 */
|
2008-07-24 10:16:06 -06:00
|
|
|
id[86] |= 0x0400; /* LBA48 on */
|
|
|
|
id[ATA_ID_MAJOR_VER] |= 0x1F;
|
2009-02-11 14:08:43 -07:00
|
|
|
/* Clear the serial number because it's different each boot
|
|
|
|
which breaks validation on resume */
|
|
|
|
memset(&id[ATA_ID_SERNO], 0x20, ATA_ID_SERNO_LEN);
|
2007-10-25 07:21:16 -06:00
|
|
|
}
|
2008-07-24 10:16:06 -06:00
|
|
|
return err_mask;
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_check_atapi_dma - ATAPI DMA handler
|
|
|
|
* @qc: Command we are about to issue
|
|
|
|
*
|
|
|
|
* Decide if this ATAPI command can be issued by DMA on this
|
|
|
|
* controller. Return 0 if it can be.
|
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
static int it821x_check_atapi_dma(struct ata_queued_cmd *qc)
|
|
|
|
{
|
|
|
|
struct ata_port *ap = qc->ap;
|
|
|
|
struct it821x_dev *itdev = ap->private_data;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-09-04 10:07:20 -06:00
|
|
|
/* Only use dma for transfers to/from the media. */
|
2008-03-18 02:56:12 -06:00
|
|
|
if (ata_qc_raw_nbytes(qc) < 2048)
|
2007-09-04 10:07:20 -06:00
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
/* No ATAPI DMA in smart mode */
|
|
|
|
if (itdev->smart)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
/* No ATAPI DMA on rev 10 */
|
|
|
|
if (itdev->timing10)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
/* Cool */
|
|
|
|
return 0;
|
|
|
|
}
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
/**
|
|
|
|
* it821x_display_disk - display disk setup
|
|
|
|
* @n: Device number
|
|
|
|
* @buf: Buffer block from firmware
|
|
|
|
*
|
|
|
|
* Produce a nice informative display of the device setup as provided
|
|
|
|
* by the firmware.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void it821x_display_disk(int n, u8 *buf)
|
|
|
|
{
|
|
|
|
unsigned char id[41];
|
|
|
|
int mode = 0;
|
2008-08-22 00:33:23 -06:00
|
|
|
char *mtype = "";
|
2008-07-24 10:16:06 -06:00
|
|
|
char mbuf[8];
|
|
|
|
char *cbl = "(40 wire cable)";
|
|
|
|
|
|
|
|
static const char *types[5] = {
|
|
|
|
"RAID0", "RAID1" "RAID 0+1", "JBOD", "DISK"
|
|
|
|
};
|
|
|
|
|
|
|
|
if (buf[52] > 4) /* No Disk */
|
|
|
|
return;
|
|
|
|
|
|
|
|
ata_id_c_string((u16 *)buf, id, 0, 41);
|
|
|
|
|
|
|
|
if (buf[51]) {
|
|
|
|
mode = ffs(buf[51]);
|
|
|
|
mtype = "UDMA";
|
|
|
|
} else if (buf[49]) {
|
|
|
|
mode = ffs(buf[49]);
|
|
|
|
mtype = "MWDMA";
|
|
|
|
}
|
|
|
|
|
|
|
|
if (buf[76])
|
|
|
|
cbl = "";
|
|
|
|
|
|
|
|
if (mode)
|
|
|
|
snprintf(mbuf, 8, "%5s%d", mtype, mode - 1);
|
|
|
|
else
|
|
|
|
strcpy(mbuf, "PIO");
|
|
|
|
if (buf[52] == 4)
|
|
|
|
printk(KERN_INFO "%d: %-6s %-8s %s %s\n",
|
|
|
|
n, mbuf, types[buf[52]], id, cbl);
|
|
|
|
else
|
|
|
|
printk(KERN_INFO "%d: %-6s %-8s Volume: %1d %s %s\n",
|
|
|
|
n, mbuf, types[buf[52]], buf[53], id, cbl);
|
|
|
|
if (buf[125] < 100)
|
|
|
|
printk(KERN_INFO "%d: Rebuilding: %d%%\n", n, buf[125]);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_firmware_command - issue firmware command
|
|
|
|
* @ap: IT821x port to interrogate
|
|
|
|
* @cmd: command
|
|
|
|
* @len: length
|
|
|
|
*
|
|
|
|
* Issue firmware commands expecting data back from the controller. We
|
|
|
|
* use this to issue commands that do not go via the normal paths. Other
|
|
|
|
* commands such as 0xFC can be issued normally.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static u8 *it821x_firmware_command(struct ata_port *ap, u8 cmd, int len)
|
|
|
|
{
|
|
|
|
u8 status;
|
|
|
|
int n = 0;
|
|
|
|
u16 *buf = kmalloc(len, GFP_KERNEL);
|
|
|
|
if (buf == NULL) {
|
|
|
|
printk(KERN_ERR "it821x_firmware_command: Out of memory\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
/* This isn't quite a normal ATA command as we are talking to the
|
|
|
|
firmware not the drives */
|
|
|
|
ap->ctl |= ATA_NIEN;
|
|
|
|
iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
|
|
|
|
ata_wait_idle(ap);
|
|
|
|
iowrite8(ATA_DEVICE_OBS, ap->ioaddr.device_addr);
|
|
|
|
iowrite8(cmd, ap->ioaddr.command_addr);
|
|
|
|
udelay(1);
|
|
|
|
/* This should be almost immediate but a little paranoia goes a long
|
|
|
|
way. */
|
|
|
|
while(n++ < 10) {
|
|
|
|
status = ioread8(ap->ioaddr.status_addr);
|
|
|
|
if (status & ATA_ERR) {
|
|
|
|
kfree(buf);
|
|
|
|
printk(KERN_ERR "it821x_firmware_command: rejected\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
if (status & ATA_DRQ) {
|
|
|
|
ioread16_rep(ap->ioaddr.data_addr, buf, len/2);
|
|
|
|
return (u8 *)buf;
|
|
|
|
}
|
|
|
|
mdelay(1);
|
|
|
|
}
|
|
|
|
kfree(buf);
|
|
|
|
printk(KERN_ERR "it821x_firmware_command: timeout\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_probe_firmware - firmware reporting/setup
|
|
|
|
* @ap: IT821x port being probed
|
|
|
|
*
|
|
|
|
* Probe the firmware of the controller by issuing firmware command
|
|
|
|
* 0xFA and analysing the returned data.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void it821x_probe_firmware(struct ata_port *ap)
|
|
|
|
{
|
|
|
|
u8 *buf;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* This is a bit ugly as we can't just issue a task file to a device
|
|
|
|
as this is controller magic */
|
|
|
|
|
|
|
|
buf = it821x_firmware_command(ap, 0xFA, 512);
|
|
|
|
|
|
|
|
if (buf != NULL) {
|
|
|
|
printk(KERN_INFO "pata_it821x: Firmware %02X/%02X/%02X%02X\n",
|
|
|
|
buf[505],
|
|
|
|
buf[506],
|
|
|
|
buf[507],
|
|
|
|
buf[508]);
|
|
|
|
for (i = 0; i < 4; i++)
|
|
|
|
it821x_display_disk(i, buf + 128 * i);
|
|
|
|
kfree(buf);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* it821x_port_start - port setup
|
|
|
|
* @ap: ATA port being set up
|
|
|
|
*
|
|
|
|
* The it821x needs to maintain private data structures and also to
|
|
|
|
* use the standard PCI interface which lacks support for this
|
2006-08-30 22:03:49 -06:00
|
|
|
* functionality. We instead set up the private data on the port
|
2006-08-29 16:12:40 -06:00
|
|
|
* start hook, and tear it down on port stop
|
|
|
|
*/
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
static int it821x_port_start(struct ata_port *ap)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
struct it821x_dev *itdev;
|
|
|
|
u8 conf;
|
|
|
|
|
libata-sff: clean up BMDMA initialization
When BMDMA initialization failed or BMDMA was not available for
whatever reason, bmdma_addr was left at zero and used as an indication
that BMDMA shouldn't be used. This leads to the following problems.
p1. For BMDMA drivers which don't use traditional BMDMA register,
ata_bmdma_mode_filter() incorrectly inhibits DMA modes. Those
drivers either have to inherit from ata_sff_port_ops or clear
->mode_filter explicitly.
p2. non-BMDMA drivers call into BMDMA PRD table allocation. It
doesn't actually allocate PRD table if bmdma_addr is not
initialized but is still confusing.
p3. For BMDMA drivers which don't use traditional BMDMA register, some
methods might not be invoked as expected (e.g. bmdma_stop from
ata_sff_post_internal_cmd()).
p4. SFF drivers w/ custom DMA interface implement noop BMDMA ops
worrying libata core might call into one of them.
These problems are caused by the muddy line between SFF and BMDMA and
the assumption that all BMDMA controllers initialize bmdma_addr.
This patch fixes p1 and p2 by removing the bmdma_addr assumption and
moving prd allocation to BMDMA port start. Later patches will fix the
remaining issues.
This patch improves BMDMA initialization such that
* When BMDMA register initialization fails, falls back to PIO instead
of failing. ata_pci_bmdma_init() never fails now.
* When ata_pci_bmdma_init() falls back to PIO, it clears
ap->mwdma_mask and udma_mask instead of depending on
ata_bmdma_mode_filter(). This makes ata_bmdma_mode_filter()
unnecessary thus resolving p1.
* ata_port_start() which actually is BMDMA specific is moved to
ata_bmdma_port_start(). ata_port_start() and ata_sff_port_start()
are killed.
* ata_sff_port_start32() is moved and renamed to
ata_bmdma_port_start32().
Drivers which no longer call into PRD table allocation are...
pdc_adma, sata_inic162x, sata_qstor, sata_sx4, pata_cmd640 and all
drivers which inherit from ata_sff_port_ops.
pata_icside sets ->port_start to ATA_OP_NULL as it doesn't need PRD
but is a BMDMA controller and doesn't have custom port_start like
other such controllers.
Note that with the previous patch which makes all and only BMDMA
drivers inherit from ata_bmdma_port_ops, this change doesn't break
drivers which need PRD table.
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-05-10 13:41:34 -06:00
|
|
|
int ret = ata_bmdma_port_start(ap);
|
2006-08-29 16:12:40 -06:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-01-20 00:00:28 -07:00
|
|
|
itdev = devm_kzalloc(&pdev->dev, sizeof(struct it821x_dev), GFP_KERNEL);
|
|
|
|
if (itdev == NULL)
|
2006-08-29 16:12:40 -06:00
|
|
|
return -ENOMEM;
|
2007-01-20 00:00:28 -07:00
|
|
|
ap->private_data = itdev;
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
pci_read_config_byte(pdev, 0x50, &conf);
|
|
|
|
|
|
|
|
if (conf & 1) {
|
|
|
|
itdev->smart = 1;
|
|
|
|
/* Long I/O's although allowed in LBA48 space cause the
|
|
|
|
onboard firmware to enter the twighlight zone */
|
|
|
|
/* No ATAPI DMA in this mode either */
|
2008-07-24 10:16:06 -06:00
|
|
|
if (ap->port_no == 0)
|
|
|
|
it821x_probe_firmware(ap);
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
/* Pull the current clocks from 0x50 */
|
|
|
|
if (conf & (1 << (1 + ap->port_no)))
|
|
|
|
itdev->clock_mode = ATA_50;
|
|
|
|
else
|
|
|
|
itdev->clock_mode = ATA_66;
|
|
|
|
|
|
|
|
itdev->want[0][1] = ATA_ANY;
|
|
|
|
itdev->want[1][1] = ATA_ANY;
|
|
|
|
itdev->last_device = -1;
|
|
|
|
|
2007-08-23 13:18:55 -06:00
|
|
|
if (pdev->revision == 0x10) {
|
2006-08-29 16:12:40 -06:00
|
|
|
itdev->timing10 = 1;
|
|
|
|
/* Need to disable ATAPI DMA for this case */
|
|
|
|
if (!itdev->smart)
|
|
|
|
printk(KERN_WARNING DRV_NAME": Revision 0x10, workarounds activated.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
/**
|
|
|
|
* it821x_rdc_cable - Cable detect for RDC1010
|
|
|
|
* @ap: port we are checking
|
|
|
|
*
|
|
|
|
* Return the RDC1010 cable type. Unlike the IT821x we know how to do
|
|
|
|
* this and can do host side cable detect
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int it821x_rdc_cable(struct ata_port *ap)
|
|
|
|
{
|
|
|
|
u16 r40;
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
|
|
|
|
pci_read_config_word(pdev, 0x40, &r40);
|
|
|
|
if (r40 & (1 << (2 + ap->port_no)))
|
|
|
|
return ATA_CBL_PATA40;
|
|
|
|
return ATA_CBL_PATA80;
|
|
|
|
}
|
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
static struct scsi_host_template it821x_sht = {
|
2008-03-24 21:22:49 -06:00
|
|
|
ATA_BMDMA_SHT(DRV_NAME),
|
2006-08-29 16:12:40 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct ata_port_operations it821x_smart_port_ops = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-24 21:22:49 -06:00
|
|
|
.inherits = &ata_bmdma_port_ops,
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
.check_atapi_dma= it821x_check_atapi_dma,
|
2008-04-07 07:47:16 -06:00
|
|
|
.qc_issue = it821x_smart_qc_issue,
|
2006-09-27 03:41:13 -06:00
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
.cable_detect = ata_cable_80wire,
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-24 21:22:49 -06:00
|
|
|
.set_mode = it821x_smart_set_mode,
|
|
|
|
.dev_config = it821x_dev_config,
|
2008-07-24 10:16:06 -06:00
|
|
|
.read_id = it821x_read_id,
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
.port_start = it821x_port_start,
|
2006-08-30 22:03:49 -06:00
|
|
|
};
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
static struct ata_port_operations it821x_passthru_port_ops = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-24 21:22:49 -06:00
|
|
|
.inherits = &ata_bmdma_port_ops,
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
.check_atapi_dma= it821x_check_atapi_dma,
|
2008-04-07 07:47:16 -06:00
|
|
|
.sff_dev_select = it821x_passthru_dev_select,
|
2006-08-29 16:12:40 -06:00
|
|
|
.bmdma_start = it821x_passthru_bmdma_start,
|
|
|
|
.bmdma_stop = it821x_passthru_bmdma_stop,
|
2008-04-07 07:47:16 -06:00
|
|
|
.qc_issue = it821x_passthru_qc_issue,
|
2006-09-27 03:41:13 -06:00
|
|
|
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-24 21:22:49 -06:00
|
|
|
.cable_detect = ata_cable_unknown,
|
|
|
|
.set_piomode = it821x_passthru_set_piomode,
|
|
|
|
.set_dmamode = it821x_passthru_set_dmamode,
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
.port_start = it821x_port_start,
|
2006-08-30 22:03:49 -06:00
|
|
|
};
|
2006-08-29 16:12:40 -06:00
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
static struct ata_port_operations it821x_rdc_port_ops = {
|
|
|
|
.inherits = &ata_bmdma_port_ops,
|
|
|
|
|
|
|
|
.check_atapi_dma= it821x_check_atapi_dma,
|
|
|
|
.sff_dev_select = it821x_passthru_dev_select,
|
|
|
|
.bmdma_start = it821x_passthru_bmdma_start,
|
|
|
|
.bmdma_stop = it821x_passthru_bmdma_stop,
|
|
|
|
.qc_issue = it821x_passthru_qc_issue,
|
|
|
|
|
|
|
|
.cable_detect = it821x_rdc_cable,
|
|
|
|
.set_piomode = it821x_passthru_set_piomode,
|
|
|
|
.set_dmamode = it821x_passthru_set_dmamode,
|
|
|
|
|
|
|
|
.port_start = it821x_port_start,
|
|
|
|
};
|
|
|
|
|
2007-06-25 11:42:22 -06:00
|
|
|
static void it821x_disable_raid(struct pci_dev *pdev)
|
2006-08-29 16:12:40 -06:00
|
|
|
{
|
2008-07-24 10:16:06 -06:00
|
|
|
/* Neither the RDC nor the IT8211 */
|
|
|
|
if (pdev->vendor != PCI_VENDOR_ID_ITE ||
|
|
|
|
pdev->device != PCI_DEVICE_ID_ITE_8212)
|
|
|
|
return;
|
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
/* Reset local CPU, and set BIOS not ready */
|
|
|
|
pci_write_config_byte(pdev, 0x5E, 0x01);
|
|
|
|
|
|
|
|
/* Set to bypass mode, and reset PCI bus */
|
|
|
|
pci_write_config_byte(pdev, 0x50, 0x00);
|
|
|
|
pci_write_config_word(pdev, PCI_COMMAND,
|
|
|
|
PCI_COMMAND_PARITY | PCI_COMMAND_IO |
|
|
|
|
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
|
|
|
|
pci_write_config_word(pdev, 0x40, 0xA0F3);
|
|
|
|
|
|
|
|
pci_write_config_dword(pdev,0x4C, 0x02040204);
|
|
|
|
pci_write_config_byte(pdev, 0x42, 0x36);
|
|
|
|
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
|
|
|
|
}
|
|
|
|
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2006-08-29 16:12:40 -06:00
|
|
|
static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
{
|
|
|
|
u8 conf;
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-05-04 04:43:58 -06:00
|
|
|
static const struct ata_port_info info_smart = {
|
2007-05-28 04:59:48 -06:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 14:38:24 -06:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2008-07-24 10:16:06 -06:00
|
|
|
.udma_mask = ATA_UDMA6,
|
2006-08-29 16:12:40 -06:00
|
|
|
.port_ops = &it821x_smart_port_ops
|
|
|
|
};
|
2007-05-04 04:43:58 -06:00
|
|
|
static const struct ata_port_info info_passthru = {
|
2007-05-28 04:59:48 -06:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 14:38:24 -06:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-07-09 10:16:50 -06:00
|
|
|
.udma_mask = ATA_UDMA6,
|
2006-08-29 16:12:40 -06:00
|
|
|
.port_ops = &it821x_passthru_port_ops
|
|
|
|
};
|
2008-07-24 10:16:06 -06:00
|
|
|
static const struct ata_port_info info_rdc = {
|
2009-01-11 12:51:08 -07:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 14:38:24 -06:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2009-01-11 12:51:08 -07:00
|
|
|
.udma_mask = ATA_UDMA6,
|
|
|
|
.port_ops = &it821x_rdc_port_ops
|
|
|
|
};
|
|
|
|
static const struct ata_port_info info_rdc_11 = {
|
2008-07-24 10:16:06 -06:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 14:38:24 -06:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2008-07-24 10:16:06 -06:00
|
|
|
/* No UDMA */
|
|
|
|
.port_ops = &it821x_rdc_port_ops
|
|
|
|
};
|
2006-08-30 22:03:49 -06:00
|
|
|
|
2007-05-04 04:43:58 -06:00
|
|
|
const struct ata_port_info *ppi[] = { NULL, NULL };
|
2006-08-29 16:12:40 -06:00
|
|
|
static char *mode[2] = { "pass through", "smart" };
|
2008-03-24 21:22:47 -06:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = pcim_enable_device(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2008-07-24 10:16:06 -06:00
|
|
|
|
|
|
|
if (pdev->vendor == PCI_VENDOR_ID_RDC) {
|
2009-01-11 12:51:08 -07:00
|
|
|
/* Deal with Vortex86SX */
|
|
|
|
if (pdev->revision == 0x11)
|
|
|
|
ppi[0] = &info_rdc_11;
|
|
|
|
else
|
|
|
|
ppi[0] = &info_rdc;
|
2008-07-24 10:16:06 -06:00
|
|
|
} else {
|
|
|
|
/* Force the card into bypass mode if so requested */
|
|
|
|
if (it8212_noraid) {
|
|
|
|
printk(KERN_INFO DRV_NAME ": forcing bypass mode.\n");
|
|
|
|
it821x_disable_raid(pdev);
|
|
|
|
}
|
|
|
|
pci_read_config_byte(pdev, 0x50, &conf);
|
|
|
|
conf &= 1;
|
2006-08-29 16:12:40 -06:00
|
|
|
|
2008-07-24 10:16:06 -06:00
|
|
|
printk(KERN_INFO DRV_NAME": controller in %s mode.\n",
|
|
|
|
mode[conf]);
|
|
|
|
if (conf == 0)
|
|
|
|
ppi[0] = &info_passthru;
|
|
|
|
else
|
|
|
|
ppi[0] = &info_smart;
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
2010-05-19 14:10:22 -06:00
|
|
|
return ata_pci_bmdma_init_one(pdev, ppi, &it821x_sht, NULL, 0);
|
2006-08-29 16:12:40 -06:00
|
|
|
}
|
|
|
|
|
2007-03-02 01:31:26 -07:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-27 09:14:36 -07:00
|
|
|
static int it821x_reinit_one(struct pci_dev *pdev)
|
|
|
|
{
|
2008-03-24 21:22:47 -06:00
|
|
|
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2006-11-27 09:14:36 -07:00
|
|
|
/* Resume - turn raid back off if need be */
|
|
|
|
if (it8212_noraid)
|
|
|
|
it821x_disable_raid(pdev);
|
2008-03-24 21:22:47 -06:00
|
|
|
ata_host_resume(host);
|
|
|
|
return rc;
|
2006-11-27 09:14:36 -07:00
|
|
|
}
|
2007-03-02 01:31:26 -07:00
|
|
|
#endif
|
2006-11-27 09:14:36 -07:00
|
|
|
|
2006-09-28 18:21:59 -06:00
|
|
|
static const struct pci_device_id it821x[] = {
|
|
|
|
{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), },
|
|
|
|
{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), },
|
2009-11-17 06:11:16 -07:00
|
|
|
{ PCI_VDEVICE(RDC, PCI_DEVICE_ID_RDC_D1010), },
|
2006-09-28 18:21:59 -06:00
|
|
|
|
|
|
|
{ },
|
2006-08-29 16:12:40 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct pci_driver it821x_pci_driver = {
|
2006-09-28 18:21:59 -06:00
|
|
|
.name = DRV_NAME,
|
2006-08-29 16:12:40 -06:00
|
|
|
.id_table = it821x,
|
|
|
|
.probe = it821x_init_one,
|
2006-11-27 09:14:36 -07:00
|
|
|
.remove = ata_pci_remove_one,
|
2007-03-02 01:31:26 -07:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-27 09:14:36 -07:00
|
|
|
.suspend = ata_pci_device_suspend,
|
|
|
|
.resume = it821x_reinit_one,
|
2007-03-02 01:31:26 -07:00
|
|
|
#endif
|
2006-08-29 16:12:40 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init it821x_init(void)
|
|
|
|
{
|
|
|
|
return pci_register_driver(&it821x_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit it821x_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&it821x_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
|
|
MODULE_DESCRIPTION("low-level driver for the IT8211/IT8212 IDE RAID controller");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, it821x);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|
|
|
|
|
|
|
|
module_param_named(noraid, it8212_noraid, int, S_IRUGO);
|
2007-06-20 12:42:13 -06:00
|
|
|
MODULE_PARM_DESC(noraid, "Force card into bypass mode");
|
2006-08-29 16:12:40 -06:00
|
|
|
|
|
|
|
module_init(it821x_init);
|
|
|
|
module_exit(it821x_exit);
|