drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
/*
|
|
|
|
* Copyright © 2011-2012 Intel Corporation
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
|
|
* to deal in the Software without restriction, including without limitation
|
|
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice (including the next
|
|
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
|
|
* Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
|
|
* IN THE SOFTWARE.
|
|
|
|
*
|
|
|
|
* Authors:
|
|
|
|
* Ben Widawsky <ben@bwidawsk.net>
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This file implements HW context support. On gen5+ a HW context consists of an
|
|
|
|
* opaque GPU object which is referenced at times of context saves and restores.
|
|
|
|
* With RC6 enabled, the context is also referenced as the GPU enters and exists
|
|
|
|
* from RC6 (GPU has it's own internal power context, except on gen5). Though
|
|
|
|
* something like a context does exist for the media ring, the code only
|
|
|
|
* supports contexts for the render ring.
|
|
|
|
*
|
|
|
|
* In software, there is a distinction between contexts created by the user,
|
|
|
|
* and the default HW context. The default HW context is used by GPU clients
|
|
|
|
* that do not request setup of their own hardware context. The default
|
|
|
|
* context's state is never restored to help prevent programming errors. This
|
|
|
|
* would happen if a client ran and piggy-backed off another clients GPU state.
|
|
|
|
* The default context only exists to give the GPU some offset to load as the
|
|
|
|
* current to invoke a save of the context we actually care about. In fact, the
|
|
|
|
* code could likely be constructed, albeit in a more complicated fashion, to
|
|
|
|
* never use the default context, though that limits the driver's ability to
|
|
|
|
* swap out, and/or destroy other contexts.
|
|
|
|
*
|
|
|
|
* All other contexts are created as a request by the GPU client. These contexts
|
|
|
|
* store GPU state, and thus allow GPU clients to not re-emit state (and
|
|
|
|
* potentially query certain state) at any time. The kernel driver makes
|
|
|
|
* certain that the appropriate commands are inserted.
|
|
|
|
*
|
|
|
|
* The context life cycle is semi-complicated in that context BOs may live
|
|
|
|
* longer than the context itself because of the way the hardware, and object
|
|
|
|
* tracking works. Below is a very crude representation of the state machine
|
|
|
|
* describing the context life.
|
|
|
|
* refcount pincount active
|
|
|
|
* S0: initial state 0 0 0
|
|
|
|
* S1: context created 1 0 0
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|
|
* S2: context is currently running 2 1 X
|
|
|
|
* S3: GPU referenced, but not current 2 0 1
|
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|
|
* S4: context is current, but destroyed 1 1 0
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|
|
|
* S5: like S3, but destroyed 1 0 1
|
|
|
|
*
|
|
|
|
* The most common (but not all) transitions:
|
|
|
|
* S0->S1: client creates a context
|
|
|
|
* S1->S2: client submits execbuf with context
|
|
|
|
* S2->S3: other clients submits execbuf with context
|
|
|
|
* S3->S1: context object was retired
|
|
|
|
* S3->S2: clients submits another execbuf
|
|
|
|
* S2->S4: context destroy called with current context
|
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|
|
* S3->S5->S0: destroy path
|
|
|
|
* S4->S5->S0: destroy path on current context
|
|
|
|
*
|
|
|
|
* There are two confusing terms used above:
|
|
|
|
* The "current context" means the context which is currently running on the
|
2013-08-30 07:40:26 -06:00
|
|
|
* GPU. The GPU has loaded its state already and has stored away the gtt
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
* offset of the BO. The GPU is not actively referencing the data at this
|
|
|
|
* offset, but it will on the next context switch. The only way to avoid this
|
|
|
|
* is to do a GPU reset.
|
|
|
|
*
|
|
|
|
* An "active context' is one which was previously the "current context" and is
|
|
|
|
* on the active list waiting for the next context switch to occur. Until this
|
|
|
|
* happens, the object must remain at the same gtt offset. It is therefore
|
|
|
|
* possible to destroy a context, but it is still active.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
2017-06-16 08:05:16 -06:00
|
|
|
#include <linux/log2.h>
|
2012-10-02 11:01:07 -06:00
|
|
|
#include <drm/drmP.h>
|
|
|
|
#include <drm/i915_drm.h>
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
#include "i915_drv.h"
|
2014-11-10 06:44:31 -07:00
|
|
|
#include "i915_trace.h"
|
2018-04-10 10:12:47 -06:00
|
|
|
#include "intel_workarounds.h"
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
|
2016-04-28 02:56:41 -06:00
|
|
|
#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
|
|
|
|
|
2017-08-16 02:52:08 -06:00
|
|
|
static void lut_close(struct i915_gem_context *ctx)
|
2017-06-16 08:05:16 -06:00
|
|
|
{
|
2017-08-16 02:52:08 -06:00
|
|
|
struct i915_lut_handle *lut, *ln;
|
|
|
|
struct radix_tree_iter iter;
|
|
|
|
void __rcu **slot;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(lut, ln, &ctx->handles_list, ctx_link) {
|
|
|
|
list_del(&lut->obj_link);
|
|
|
|
kmem_cache_free(ctx->i915->luts, lut);
|
2017-06-16 08:05:16 -06:00
|
|
|
}
|
|
|
|
|
2017-10-26 07:00:32 -06:00
|
|
|
rcu_read_lock();
|
2017-08-16 02:52:08 -06:00
|
|
|
radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
|
|
|
|
struct i915_vma *vma = rcu_dereference_raw(*slot);
|
2017-06-16 08:05:16 -06:00
|
|
|
|
2017-08-16 02:52:08 -06:00
|
|
|
radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
|
2017-11-09 01:55:40 -07:00
|
|
|
__i915_gem_object_release_unless_active(vma->obj);
|
2017-06-16 08:05:16 -06:00
|
|
|
}
|
2017-10-26 07:00:32 -06:00
|
|
|
rcu_read_unlock();
|
2017-06-16 08:05:16 -06:00
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:46 -06:00
|
|
|
static void i915_gem_context_free(struct i915_gem_context *ctx)
|
2012-06-04 15:42:43 -06:00
|
|
|
{
|
2016-05-24 07:53:41 -06:00
|
|
|
int i;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-07-05 03:40:23 -06:00
|
|
|
lockdep_assert_held(&ctx->i915->drm.struct_mutex);
|
2016-12-31 04:20:11 -07:00
|
|
|
GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
|
2014-11-10 06:44:31 -07:00
|
|
|
|
2014-08-06 07:04:53 -06:00
|
|
|
i915_ppgtt_put(ctx->ppgtt);
|
|
|
|
|
2016-05-24 07:53:41 -06:00
|
|
|
for (i = 0; i < I915_NUM_ENGINES; i++) {
|
|
|
|
struct intel_context *ce = &ctx->engine[i];
|
|
|
|
|
|
|
|
if (!ce->state)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
WARN_ON(ce->pin_count);
|
2016-08-02 15:50:20 -06:00
|
|
|
if (ce->ring)
|
2016-08-02 15:50:21 -06:00
|
|
|
intel_ring_free(ce->ring);
|
2016-05-24 07:53:41 -06:00
|
|
|
|
2016-10-28 06:58:29 -06:00
|
|
|
__i915_gem_object_release_unless_active(ce->state->obj);
|
2016-05-24 07:53:41 -06:00
|
|
|
}
|
|
|
|
|
2016-10-28 06:58:54 -06:00
|
|
|
kfree(ctx->name);
|
2016-08-15 03:49:08 -06:00
|
|
|
put_pid(ctx->pid);
|
2017-06-16 08:05:16 -06:00
|
|
|
|
drm/i915: Add VM to context
Pretty straightforward so far except for the bit about the refcounting.
The PPGTT will potentially be shared amongst multiple contexts. Because
contexts themselves have a refcounted lifecycle, the easiest way to
manage this will be to refcount the PPGTT. To acheive this, we piggy
back off of the existing context refcount, and will increment and
decrement the PPGTT refcount with context creation, and destruction.
To put it more clearly, if context A, and context B both use PPGTT 0, we
can't free the PPGTT until both A, and B are destroyed.
Note that because the PPGTT is permanently pinned (for now), it really
just matters for the PPGTT destruction, as opposed to making space under
memory pressure.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-12-06 15:11:15 -07:00
|
|
|
list_del(&ctx->link);
|
2016-04-28 02:56:51 -06:00
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
ida_simple_remove(&ctx->i915->contexts.hw_ida, ctx->hw_id);
|
2017-06-20 05:05:47 -06:00
|
|
|
kfree_rcu(ctx, rcu);
|
2012-06-04 15:42:43 -06:00
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:46 -06:00
|
|
|
static void contexts_free(struct drm_i915_private *i915)
|
|
|
|
{
|
|
|
|
struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
|
2017-06-30 17:05:17 -06:00
|
|
|
struct i915_gem_context *ctx, *cn;
|
2017-06-20 05:05:46 -06:00
|
|
|
|
|
|
|
lockdep_assert_held(&i915->drm.struct_mutex);
|
|
|
|
|
2017-06-30 17:05:17 -06:00
|
|
|
llist_for_each_entry_safe(ctx, cn, freed, free_link)
|
2017-06-20 05:05:46 -06:00
|
|
|
i915_gem_context_free(ctx);
|
|
|
|
}
|
|
|
|
|
2017-07-05 08:26:34 -06:00
|
|
|
static void contexts_free_first(struct drm_i915_private *i915)
|
|
|
|
{
|
|
|
|
struct i915_gem_context *ctx;
|
|
|
|
struct llist_node *freed;
|
|
|
|
|
|
|
|
lockdep_assert_held(&i915->drm.struct_mutex);
|
|
|
|
|
|
|
|
freed = llist_del_first(&i915->contexts.free_list);
|
|
|
|
if (!freed)
|
|
|
|
return;
|
|
|
|
|
|
|
|
ctx = container_of(freed, typeof(*ctx), free_link);
|
|
|
|
i915_gem_context_free(ctx);
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:46 -06:00
|
|
|
static void contexts_free_worker(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *i915 =
|
|
|
|
container_of(work, typeof(*i915), contexts.free_work);
|
|
|
|
|
|
|
|
mutex_lock(&i915->drm.struct_mutex);
|
|
|
|
contexts_free(i915);
|
|
|
|
mutex_unlock(&i915->drm.struct_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
void i915_gem_context_release(struct kref *ref)
|
|
|
|
{
|
|
|
|
struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
|
|
|
|
struct drm_i915_private *i915 = ctx->i915;
|
|
|
|
|
|
|
|
trace_i915_context_free(ctx);
|
|
|
|
if (llist_add(&ctx->free_link, &i915->contexts.free_list))
|
|
|
|
queue_work(i915->wq, &i915->contexts.free_work);
|
|
|
|
}
|
|
|
|
|
2016-08-04 00:52:46 -06:00
|
|
|
static void context_close(struct i915_gem_context *ctx)
|
|
|
|
{
|
2016-12-31 04:20:11 -07:00
|
|
|
i915_gem_context_set_closed(ctx);
|
2017-08-16 02:52:08 -06:00
|
|
|
|
2017-11-09 01:55:40 -07:00
|
|
|
/*
|
|
|
|
* The LUT uses the VMA as a backpointer to unref the object,
|
|
|
|
* so we need to clear the LUT before we close all the VMA (inside
|
|
|
|
* the ppgtt).
|
|
|
|
*/
|
2017-08-16 02:52:08 -06:00
|
|
|
lut_close(ctx);
|
2016-08-04 00:52:46 -06:00
|
|
|
if (ctx->ppgtt)
|
|
|
|
i915_ppgtt_close(&ctx->ppgtt->base);
|
2017-08-16 02:52:08 -06:00
|
|
|
|
2016-08-04 00:52:46 -06:00
|
|
|
ctx->file_priv = ERR_PTR(-EBADF);
|
|
|
|
i915_gem_context_put(ctx);
|
|
|
|
}
|
|
|
|
|
2016-04-28 02:56:51 -06:00
|
|
|
static int assign_hw_id(struct drm_i915_private *dev_priv, unsigned *out)
|
|
|
|
{
|
|
|
|
int ret;
|
2018-03-02 09:14:58 -07:00
|
|
|
unsigned int max;
|
|
|
|
|
|
|
|
if (INTEL_GEN(dev_priv) >= 11)
|
|
|
|
max = GEN11_MAX_CONTEXT_HW_ID;
|
|
|
|
else
|
|
|
|
max = MAX_CONTEXT_HW_ID;
|
2016-04-28 02:56:51 -06:00
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
ret = ida_simple_get(&dev_priv->contexts.hw_ida,
|
2018-03-02 09:14:58 -07:00
|
|
|
0, max, GFP_KERNEL);
|
2016-04-28 02:56:51 -06:00
|
|
|
if (ret < 0) {
|
|
|
|
/* Contexts are only released when no longer active.
|
|
|
|
* Flush any pending retires to hopefully release some
|
|
|
|
* stale contexts and try again.
|
|
|
|
*/
|
2018-02-21 02:56:36 -07:00
|
|
|
i915_retire_requests(dev_priv);
|
2017-06-20 05:05:45 -06:00
|
|
|
ret = ida_simple_get(&dev_priv->contexts.hw_ida,
|
2018-03-02 09:14:58 -07:00
|
|
|
0, max, GFP_KERNEL);
|
2016-04-28 02:56:51 -06:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
*out = ret;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-02-09 07:40:36 -07:00
|
|
|
static u32 default_desc_template(const struct drm_i915_private *i915,
|
|
|
|
const struct i915_hw_ppgtt *ppgtt)
|
2017-01-27 06:03:09 -07:00
|
|
|
{
|
2017-02-09 07:40:36 -07:00
|
|
|
u32 address_mode;
|
2017-01-27 06:03:09 -07:00
|
|
|
u32 desc;
|
|
|
|
|
2017-02-09 07:40:36 -07:00
|
|
|
desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
|
2017-01-27 06:03:09 -07:00
|
|
|
|
2017-02-09 07:40:36 -07:00
|
|
|
address_mode = INTEL_LEGACY_32B_CONTEXT;
|
|
|
|
if (ppgtt && i915_vm_is_48bit(&ppgtt->base))
|
|
|
|
address_mode = INTEL_LEGACY_64B_CONTEXT;
|
|
|
|
desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
|
|
|
|
|
|
|
|
if (IS_GEN8(i915))
|
2017-01-27 06:03:09 -07:00
|
|
|
desc |= GEN8_CTX_L3LLC_COHERENT;
|
|
|
|
|
|
|
|
/* TODO: WaDisableLiteRestore when we start using semaphore
|
|
|
|
* signalling between Command Streamers
|
|
|
|
* ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
|
|
|
|
*/
|
|
|
|
|
|
|
|
return desc;
|
|
|
|
}
|
|
|
|
|
2016-05-24 07:53:34 -06:00
|
|
|
static struct i915_gem_context *
|
2016-12-01 07:16:38 -07:00
|
|
|
__create_hw_context(struct drm_i915_private *dev_priv,
|
2014-08-06 07:04:45 -06:00
|
|
|
struct drm_i915_file_private *file_priv)
|
2012-06-04 15:42:43 -06:00
|
|
|
{
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2013-02-27 18:04:10 -07:00
|
|
|
int ret;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2012-11-10 11:56:04 -07:00
|
|
|
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
|
2012-06-29 11:30:39 -06:00
|
|
|
if (ctx == NULL)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-04-28 02:56:51 -06:00
|
|
|
ret = assign_hw_id(dev_priv, &ctx->hw_id);
|
|
|
|
if (ret) {
|
|
|
|
kfree(ctx);
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
2013-04-30 04:30:33 -06:00
|
|
|
kref_init(&ctx->ref);
|
2017-06-20 05:05:45 -06:00
|
|
|
list_add_tail(&ctx->link, &dev_priv->contexts.list);
|
2015-05-05 02:17:29 -06:00
|
|
|
ctx->i915 = dev_priv;
|
2017-05-17 06:10:02 -06:00
|
|
|
ctx->priority = I915_PRIORITY_NORMAL;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2017-08-16 02:52:08 -06:00
|
|
|
INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
|
|
|
|
INIT_LIST_HEAD(&ctx->handles_list);
|
2017-06-16 08:05:16 -06:00
|
|
|
|
2012-06-04 15:42:43 -06:00
|
|
|
/* Default context will never have a file_priv */
|
2016-10-28 06:58:54 -06:00
|
|
|
ret = DEFAULT_CONTEXT_HANDLE;
|
|
|
|
if (file_priv) {
|
2014-04-09 02:07:36 -06:00
|
|
|
ret = idr_alloc(&file_priv->context_idr, ctx,
|
drm/i915: Emphasize that ctx->id is merely a user handle
This is an Execlists preparatory patch, since they make context ID become an
overloaded term:
- In the software, it was used to distinguish which context userspace was
trying to use.
- In the BSpec, the term is used to describe the 20-bits long field the
hardware uses to it to discriminate the contexts that are submitted to
the ELSP and inform the driver about their current status (via Context
Switch Interrupts and Context Status Buffers).
Initially, I tried to make the different meanings converge, but it proved
impossible:
- The software ctx->id is per-filp, while the hardware one needs to be
globally unique.
- Also, we multiplex several backing states objects per intel_context,
and all of them need unique HW IDs.
- I tried adding a per-filp ID and then composing the HW context ID as:
ctx->id + file_priv->id + ring->id, but the fact that the hardware only
uses 20-bits means we have to artificially limit the number of filps or
contexts the userspace can create.
The ctx->user_handle renaming bits are done with this Cocci patch (plus
manual frobbing of the struct declaration):
@@
struct intel_context c;
@@
- (c).id
+ c.user_handle
@@
struct intel_context *c;
@@
- (c)->id
+ c->user_handle
Also, while we are at it, s/DEFAULT_CONTEXT_ID/DEFAULT_CONTEXT_HANDLE and
change the type to unsigned 32 bits.
v2: s/handle/user_handle and change the type to uint32_t as suggested by
Chris Wilson.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-03 09:28:00 -06:00
|
|
|
DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
|
2014-04-09 02:07:36 -06:00
|
|
|
if (ret < 0)
|
2017-06-16 08:05:16 -06:00
|
|
|
goto err_lut;
|
2016-10-28 06:58:54 -06:00
|
|
|
}
|
|
|
|
ctx->user_handle = ret;
|
2013-04-30 04:30:33 -06:00
|
|
|
|
|
|
|
ctx->file_priv = file_priv;
|
2016-10-28 06:58:54 -06:00
|
|
|
if (file_priv) {
|
2016-08-15 03:49:08 -06:00
|
|
|
ctx->pid = get_task_pid(current, PIDTYPE_PID);
|
2016-10-28 06:58:54 -06:00
|
|
|
ctx->name = kasprintf(GFP_KERNEL, "%s[%d]/%x",
|
|
|
|
current->comm,
|
|
|
|
pid_nr(ctx->pid),
|
|
|
|
ctx->user_handle);
|
|
|
|
if (!ctx->name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_pid;
|
|
|
|
}
|
|
|
|
}
|
2016-08-15 03:49:08 -06:00
|
|
|
|
drm/i915: Do remaps for all contexts
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to run.
Not that due to the asynchronous nature of the sysfs entry, there is no
point modifying the registers for the existing context. Instead we set a
flag for all contexts to load the correct remapping information on the
next run. Interested clients can use debugfs to determine whether or not
the row has been remapped.
One could propose at this point that we just do the remapping in the
kernel. I guess since we have to maintain the sysfs interface anyway,
I'm not sure how useful it is, and I do like keeping the policy in
userspace; (it wasn't my original decision to make the
interface the way it is, so I'm not attached).
v2: Force a context switch when we have a remap on the next switch.
(Ville)
Don't let userspace use the interface with disabled contexts.
v3: Don't force a context switch, just let it nop
Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
rewrote it to avoid a second round of confusion.
Error print moved to error path (All Ville)
Added a comment on why the slice remap initialization happens.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-18 20:03:18 -06:00
|
|
|
/* NB: Mark all slices as needing a remap so that when the context first
|
|
|
|
* loads it will restore whatever remap state already exists. If there
|
|
|
|
* is no remap info, it will be a NOP. */
|
2016-04-28 02:56:41 -06:00
|
|
|
ctx->remap_slice = ALL_L3_SLICES(dev_priv);
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-12-31 04:20:11 -07:00
|
|
|
i915_gem_context_set_bannable(ctx);
|
2016-06-16 06:07:01 -06:00
|
|
|
ctx->ring_size = 4 * PAGE_SIZE;
|
2017-02-09 07:40:36 -07:00
|
|
|
ctx->desc_template =
|
|
|
|
default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
|
2014-12-24 09:13:39 -07:00
|
|
|
|
2018-03-13 18:32:50 -06:00
|
|
|
/*
|
|
|
|
* GuC requires the ring to be placed in Non-WOPCM memory. If GuC is not
|
2016-12-23 16:56:21 -07:00
|
|
|
* present or not in use we still need a small bias as ring wraparound
|
|
|
|
* at offset 0 sometimes hangs. No idea why.
|
|
|
|
*/
|
2017-12-06 06:53:12 -07:00
|
|
|
if (USES_GUC(dev_priv))
|
2018-03-13 18:32:50 -06:00
|
|
|
ctx->ggtt_offset_bias = dev_priv->guc.ggtt_pin_bias;
|
2016-12-23 16:56:21 -07:00
|
|
|
else
|
2017-01-10 07:47:34 -07:00
|
|
|
ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
|
2016-12-23 16:56:21 -07:00
|
|
|
|
2012-06-29 11:30:39 -06:00
|
|
|
return ctx;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-10-28 06:58:54 -06:00
|
|
|
err_pid:
|
|
|
|
put_pid(ctx->pid);
|
|
|
|
idr_remove(&file_priv->context_idr, ctx->user_handle);
|
2017-06-16 08:05:16 -06:00
|
|
|
err_lut:
|
2016-08-04 00:52:46 -06:00
|
|
|
context_close(ctx);
|
2012-06-29 11:30:39 -06:00
|
|
|
return ERR_PTR(ret);
|
2012-06-04 15:42:43 -06:00
|
|
|
}
|
|
|
|
|
2017-02-09 04:34:25 -07:00
|
|
|
static void __destroy_hw_context(struct i915_gem_context *ctx,
|
|
|
|
struct drm_i915_file_private *file_priv)
|
|
|
|
{
|
|
|
|
idr_remove(&file_priv->context_idr, ctx->user_handle);
|
|
|
|
context_close(ctx);
|
|
|
|
}
|
|
|
|
|
2016-05-24 07:53:34 -06:00
|
|
|
static struct i915_gem_context *
|
2016-12-01 07:16:38 -07:00
|
|
|
i915_gem_create_context(struct drm_i915_private *dev_priv,
|
2014-08-06 07:04:54 -06:00
|
|
|
struct drm_i915_file_private *file_priv)
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
{
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-12-01 07:16:38 -07:00
|
|
|
lockdep_assert_held(&dev_priv->drm.struct_mutex);
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2017-07-05 08:26:34 -06:00
|
|
|
/* Reap the most stale context */
|
|
|
|
contexts_free_first(dev_priv);
|
2017-07-05 08:26:32 -06:00
|
|
|
|
2016-12-01 07:16:38 -07:00
|
|
|
ctx = __create_hw_context(dev_priv, file_priv);
|
2012-06-29 11:30:39 -06:00
|
|
|
if (IS_ERR(ctx))
|
2013-12-06 15:11:05 -07:00
|
|
|
return ctx;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-12-01 07:16:38 -07:00
|
|
|
if (USES_FULL_PPGTT(dev_priv)) {
|
2016-10-28 06:58:58 -06:00
|
|
|
struct i915_hw_ppgtt *ppgtt;
|
2013-12-06 15:11:18 -07:00
|
|
|
|
2016-12-01 07:16:38 -07:00
|
|
|
ppgtt = i915_ppgtt_create(dev_priv, file_priv, ctx->name);
|
2016-05-24 07:53:38 -06:00
|
|
|
if (IS_ERR(ppgtt)) {
|
2013-12-06 15:11:19 -07:00
|
|
|
DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
|
|
|
|
PTR_ERR(ppgtt));
|
2017-02-09 04:34:25 -07:00
|
|
|
__destroy_hw_context(ctx, file_priv);
|
2016-05-24 07:53:38 -06:00
|
|
|
return ERR_CAST(ppgtt);
|
2014-08-06 07:04:53 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
ctx->ppgtt = ppgtt;
|
2017-02-09 07:40:36 -07:00
|
|
|
ctx->desc_template = default_desc_template(dev_priv, ppgtt);
|
2014-08-06 07:04:53 -06:00
|
|
|
}
|
2013-12-06 15:11:18 -07:00
|
|
|
|
2014-11-10 06:44:31 -07:00
|
|
|
trace_i915_context_create(ctx);
|
|
|
|
|
2013-12-06 15:11:05 -07:00
|
|
|
return ctx;
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
}
|
|
|
|
|
2016-06-16 06:07:05 -06:00
|
|
|
/**
|
|
|
|
* i915_gem_context_create_gvt - create a GVT GEM context
|
|
|
|
* @dev: drm device *
|
|
|
|
*
|
|
|
|
* This function is used to create a GVT specific GEM context.
|
|
|
|
*
|
|
|
|
* Returns:
|
|
|
|
* pointer to i915_gem_context on success, error pointer if failed
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
struct i915_gem_context *
|
|
|
|
i915_gem_context_create_gvt(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct i915_gem_context *ctx;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
|
|
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
|
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
|
|
if (ret)
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
|
2017-01-06 08:20:13 -07:00
|
|
|
ctx = __create_hw_context(to_i915(dev), NULL);
|
2016-06-16 06:07:05 -06:00
|
|
|
if (IS_ERR(ctx))
|
|
|
|
goto out;
|
|
|
|
|
2017-01-06 08:20:13 -07:00
|
|
|
ctx->file_priv = ERR_PTR(-EBADF);
|
2016-12-31 04:20:11 -07:00
|
|
|
i915_gem_context_set_closed(ctx); /* not user accessible */
|
|
|
|
i915_gem_context_clear_bannable(ctx);
|
|
|
|
i915_gem_context_set_force_single_submission(ctx);
|
2017-12-06 06:53:12 -07:00
|
|
|
if (!USES_GUC_SUBMISSION(to_i915(dev)))
|
2017-02-15 23:36:40 -07:00
|
|
|
ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
|
2017-01-06 08:20:13 -07:00
|
|
|
|
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
2016-06-16 06:07:05 -06:00
|
|
|
out:
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
return ctx;
|
|
|
|
}
|
|
|
|
|
2017-11-10 07:26:33 -07:00
|
|
|
struct i915_gem_context *
|
|
|
|
i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
|
2017-10-03 14:34:48 -06:00
|
|
|
{
|
|
|
|
struct i915_gem_context *ctx;
|
|
|
|
|
|
|
|
ctx = i915_gem_create_context(i915, NULL);
|
|
|
|
if (IS_ERR(ctx))
|
|
|
|
return ctx;
|
|
|
|
|
|
|
|
i915_gem_context_clear_bannable(ctx);
|
|
|
|
ctx->priority = prio;
|
|
|
|
ctx->ring_size = PAGE_SIZE;
|
|
|
|
|
|
|
|
GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
|
|
|
|
|
|
|
|
return ctx;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
destroy_kernel_context(struct i915_gem_context **ctxp)
|
|
|
|
{
|
|
|
|
struct i915_gem_context *ctx;
|
|
|
|
|
|
|
|
/* Keep the context ref so that we can free it immediately ourselves */
|
|
|
|
ctx = i915_gem_context_get(fetch_and_zero(ctxp));
|
|
|
|
GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
|
|
|
|
|
|
|
|
context_close(ctx);
|
|
|
|
i915_gem_context_free(ctx);
|
|
|
|
}
|
|
|
|
|
2018-02-07 14:05:44 -07:00
|
|
|
static bool needs_preempt_context(struct drm_i915_private *i915)
|
|
|
|
{
|
|
|
|
return HAS_LOGICAL_RING_PREEMPTION(i915);
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
{
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2018-04-10 10:12:47 -06:00
|
|
|
int ret;
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
|
2018-02-07 14:05:44 -07:00
|
|
|
/* Reassure ourselves we are only called once */
|
2017-10-03 14:34:48 -06:00
|
|
|
GEM_BUG_ON(dev_priv->kernel_context);
|
2018-02-07 14:05:44 -07:00
|
|
|
GEM_BUG_ON(dev_priv->preempt_context);
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
|
2018-04-10 10:12:47 -06:00
|
|
|
ret = intel_ctx_workarounds_init(dev_priv);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
INIT_LIST_HEAD(&dev_priv->contexts.list);
|
2017-06-20 05:05:46 -06:00
|
|
|
INIT_WORK(&dev_priv->contexts.free_work, contexts_free_worker);
|
|
|
|
init_llist_head(&dev_priv->contexts.free_list);
|
2017-06-20 05:05:45 -06:00
|
|
|
|
2016-04-28 02:56:51 -06:00
|
|
|
/* Using the simple ida interface, the max is limited by sizeof(int) */
|
|
|
|
BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
|
2018-03-02 09:14:58 -07:00
|
|
|
BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
|
2017-06-20 05:05:45 -06:00
|
|
|
ida_init(&dev_priv->contexts.hw_ida);
|
2016-04-28 02:56:51 -06:00
|
|
|
|
2017-10-03 14:34:48 -06:00
|
|
|
/* lowest priority; idle task */
|
2017-11-10 07:26:33 -07:00
|
|
|
ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
|
2014-04-09 02:07:36 -06:00
|
|
|
if (IS_ERR(ctx)) {
|
2017-10-03 14:34:48 -06:00
|
|
|
DRM_ERROR("Failed to create default global context\n");
|
2018-02-07 14:05:44 -07:00
|
|
|
return PTR_ERR(ctx);
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
}
|
2017-10-03 14:34:48 -06:00
|
|
|
/*
|
|
|
|
* For easy recognisablity, we want the kernel context to be 0 and then
|
2017-01-23 04:31:31 -07:00
|
|
|
* all user contexts will have non-zero hw_id.
|
|
|
|
*/
|
|
|
|
GEM_BUG_ON(ctx->hw_id);
|
2016-01-19 12:02:54 -07:00
|
|
|
dev_priv->kernel_context = ctx;
|
2013-12-06 15:11:01 -07:00
|
|
|
|
2017-10-03 14:34:48 -06:00
|
|
|
/* highest priority; preempting task */
|
2018-02-07 14:05:44 -07:00
|
|
|
if (needs_preempt_context(dev_priv)) {
|
|
|
|
ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
|
|
|
|
if (!IS_ERR(ctx))
|
|
|
|
dev_priv->preempt_context = ctx;
|
|
|
|
else
|
|
|
|
DRM_ERROR("Failed to create preempt context; disabling preemption\n");
|
2017-10-03 14:34:48 -06:00
|
|
|
}
|
2017-01-06 08:20:13 -07:00
|
|
|
|
2014-07-24 10:04:12 -06:00
|
|
|
DRM_DEBUG_DRIVER("%s context support initialized\n",
|
2017-04-28 01:53:36 -06:00
|
|
|
dev_priv->engine[RCS]->context_size ? "logical" :
|
|
|
|
"fake");
|
2013-11-06 08:56:29 -07:00
|
|
|
return 0;
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
|
2016-04-28 02:56:41 -06:00
|
|
|
{
|
|
|
|
struct intel_engine_cs *engine;
|
drm/i915: Allocate intel_engine_cs structure only for the enabled engines
With the possibility of addition of many more number of rings in future,
the drm_i915_private structure could bloat as an array, of type
intel_engine_cs, is embedded inside it.
struct intel_engine_cs engine[I915_NUM_ENGINES];
Though this is still fine as generally there is only a single instance of
drm_i915_private structure used, but not all of the possible rings would be
enabled or active on most of the platforms. Some memory can be saved by
allocating intel_engine_cs structure only for the enabled/active engines.
Currently the engine/ring ID is kept static and dev_priv->engine[] is simply
indexed using the enums defined in intel_engine_id.
To save memory and continue using the static engine/ring IDs, 'engine' is
defined as an array of pointers.
struct intel_engine_cs *engine[I915_NUM_ENGINES];
dev_priv->engine[engine_ID] will be NULL for disabled engine instances.
There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
i915.o file (but for i915.ko file text size remain same as 1193131 bytes).
v2:
- Remove the engine iterator field added in drm_i915_private structure,
instead pass a local iterator variable to the for_each_engine**
macros. (Chris)
- Do away with intel_engine_initialized() and instead directly use the
NULL pointer check on engine pointer. (Chris)
v3:
- Remove for_each_engine_id() macro, as the updated macro for_each_engine()
can be used in place of it. (Chris)
- Protect the access to Render engine Fault register with a NULL check, as
engine specific init is done later in Driver load sequence.
v4:
- Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris)
- Kill the superfluous init_engine_lists().
v5:
- Cleanup the intel_engines_init() & intel_engines_setup(), with respect to
allocation of intel_engine_cs structure. (Chris)
v6:
- Rebase.
v7:
- Optimize the for_each_engine_masked() macro. (Chris)
- Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
- Rebase.
v8: Rebase.
v9: Rebase.
v10:
- For index calculation use engine ID instead of pointer based arithmetic in
intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
- For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
- Use for_each_engine macro for cleanup in intel_engines_init() and remove
check for NULL engine pointer in cleanup() routines. (Joonas)
v11: Rebase.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
2016-10-13 11:14:48 -06:00
|
|
|
enum intel_engine_id id;
|
2016-04-28 02:56:41 -06:00
|
|
|
|
2016-07-05 03:40:23 -06:00
|
|
|
lockdep_assert_held(&dev_priv->drm.struct_mutex);
|
2016-05-24 07:53:35 -06:00
|
|
|
|
drm/i915: Allocate intel_engine_cs structure only for the enabled engines
With the possibility of addition of many more number of rings in future,
the drm_i915_private structure could bloat as an array, of type
intel_engine_cs, is embedded inside it.
struct intel_engine_cs engine[I915_NUM_ENGINES];
Though this is still fine as generally there is only a single instance of
drm_i915_private structure used, but not all of the possible rings would be
enabled or active on most of the platforms. Some memory can be saved by
allocating intel_engine_cs structure only for the enabled/active engines.
Currently the engine/ring ID is kept static and dev_priv->engine[] is simply
indexed using the enums defined in intel_engine_id.
To save memory and continue using the static engine/ring IDs, 'engine' is
defined as an array of pointers.
struct intel_engine_cs *engine[I915_NUM_ENGINES];
dev_priv->engine[engine_ID] will be NULL for disabled engine instances.
There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
i915.o file (but for i915.ko file text size remain same as 1193131 bytes).
v2:
- Remove the engine iterator field added in drm_i915_private structure,
instead pass a local iterator variable to the for_each_engine**
macros. (Chris)
- Do away with intel_engine_initialized() and instead directly use the
NULL pointer check on engine pointer. (Chris)
v3:
- Remove for_each_engine_id() macro, as the updated macro for_each_engine()
can be used in place of it. (Chris)
- Protect the access to Render engine Fault register with a NULL check, as
engine specific init is done later in Driver load sequence.
v4:
- Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris)
- Kill the superfluous init_engine_lists().
v5:
- Cleanup the intel_engines_init() & intel_engines_setup(), with respect to
allocation of intel_engine_cs structure. (Chris)
v6:
- Rebase.
v7:
- Optimize the for_each_engine_masked() macro. (Chris)
- Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
- Rebase.
v8: Rebase.
v9: Rebase.
v10:
- For index calculation use engine ID instead of pointer based arithmetic in
intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
- For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
- Use for_each_engine macro for cleanup in intel_engines_init() and remove
check for NULL engine pointer in cleanup() routines. (Joonas)
v11: Rebase.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
2016-10-13 11:14:48 -06:00
|
|
|
for_each_engine(engine, dev_priv, id) {
|
drm/i915: Unify active context tracking between legacy/execlists/guc
The requests conversion introduced a nasty bug where we could generate a
new request in the middle of constructing a request if we needed to idle
the system in order to evict space for a context. The request to idle
would be executed (and waited upon) before the current one, creating a
minor havoc in the seqno accounting, as we will consider the current
request to already be completed (prior to deferred seqno assignment) but
ring->last_retired_head would have been updated and still could allow
us to overwrite the current request before execution.
We also employed two different mechanisms to track the active context
until it was switched out. The legacy method allowed for waiting upon an
active context (it could forcibly evict any vma, including context's),
but the execlists method took a step backwards by pinning the vma for
the entire active lifespan of the context (the only way to evict was to
idle the entire GPU, not individual contexts). However, to circumvent
the tricky issue of locking (i.e. we cannot take struct_mutex at the
time of i915_gem_request_submit(), where we would want to move the
previous context onto the active tracker and unpin it), we take the
execlists approach and keep the contexts pinned until retirement.
The benefit of the execlists approach, more important for execlists than
legacy, was the reduction in work in pinning the context for each
request - as the context was kept pinned until idle, it could short
circuit the pinning for all active contexts.
We introduce new engine vfuncs to pin and unpin the context
respectively. The context is pinned at the start of the request, and
only unpinned when the following request is retired (this ensures that
the context is idle and coherent in main memory before we unpin it). We
move the engine->last_context tracking into the retirement itself
(rather than during request submission) in order to allow the submission
to be reordered or unwound without undue difficultly.
And finally an ulterior motive for unifying context handling was to
prepare for mock requests.
v2: Rename to last_retired_context, split out legacy_context tracking
for MI_SET_CONTEXT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161218153724.8439-3-chris@chris-wilson.co.uk
2016-12-18 08:37:20 -07:00
|
|
|
engine->legacy_active_context = NULL;
|
2017-11-23 08:26:30 -07:00
|
|
|
engine->legacy_active_ppgtt = NULL;
|
drm/i915: Unify active context tracking between legacy/execlists/guc
The requests conversion introduced a nasty bug where we could generate a
new request in the middle of constructing a request if we needed to idle
the system in order to evict space for a context. The request to idle
would be executed (and waited upon) before the current one, creating a
minor havoc in the seqno accounting, as we will consider the current
request to already be completed (prior to deferred seqno assignment) but
ring->last_retired_head would have been updated and still could allow
us to overwrite the current request before execution.
We also employed two different mechanisms to track the active context
until it was switched out. The legacy method allowed for waiting upon an
active context (it could forcibly evict any vma, including context's),
but the execlists method took a step backwards by pinning the vma for
the entire active lifespan of the context (the only way to evict was to
idle the entire GPU, not individual contexts). However, to circumvent
the tricky issue of locking (i.e. we cannot take struct_mutex at the
time of i915_gem_request_submit(), where we would want to move the
previous context onto the active tracker and unpin it), we take the
execlists approach and keep the contexts pinned until retirement.
The benefit of the execlists approach, more important for execlists than
legacy, was the reduction in work in pinning the context for each
request - as the context was kept pinned until idle, it could short
circuit the pinning for all active contexts.
We introduce new engine vfuncs to pin and unpin the context
respectively. The context is pinned at the start of the request, and
only unpinned when the following request is retired (this ensures that
the context is idle and coherent in main memory before we unpin it). We
move the engine->last_context tracking into the retirement itself
(rather than during request submission) in order to allow the submission
to be reordered or unwound without undue difficultly.
And finally an ulterior motive for unifying context handling was to
prepare for mock requests.
v2: Rename to last_retired_context, split out legacy_context tracking
for MI_SET_CONTEXT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161218153724.8439-3-chris@chris-wilson.co.uk
2016-12-18 08:37:20 -07:00
|
|
|
|
|
|
|
if (!engine->last_retired_context)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
engine->context_unpin(engine, engine->last_retired_context);
|
|
|
|
engine->last_retired_context = NULL;
|
2016-04-28 02:56:41 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:46 -06:00
|
|
|
void i915_gem_contexts_fini(struct drm_i915_private *i915)
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
{
|
2017-06-20 05:05:46 -06:00
|
|
|
lockdep_assert_held(&i915->drm.struct_mutex);
|
2017-01-06 08:20:13 -07:00
|
|
|
|
2018-02-07 14:05:44 -07:00
|
|
|
if (i915->preempt_context)
|
|
|
|
destroy_kernel_context(&i915->preempt_context);
|
2017-10-03 14:34:48 -06:00
|
|
|
destroy_kernel_context(&i915->kernel_context);
|
2016-04-28 02:56:51 -06:00
|
|
|
|
2017-06-20 05:05:46 -06:00
|
|
|
/* Must free all deferred contexts (via flush_workqueue) first */
|
|
|
|
ida_destroy(&i915->contexts.hw_ida);
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
}
|
|
|
|
|
2012-06-04 15:42:43 -06:00
|
|
|
static int context_idr_cleanup(int id, void *p, void *data)
|
|
|
|
{
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx = p;
|
2012-06-04 15:42:43 -06:00
|
|
|
|
2016-08-04 00:52:46 -06:00
|
|
|
context_close(ctx);
|
2012-06-04 15:42:43 -06:00
|
|
|
return 0;
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
int i915_gem_context_open(struct drm_i915_private *i915,
|
|
|
|
struct drm_file *file)
|
2013-12-06 15:10:58 -07:00
|
|
|
{
|
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2013-12-06 15:10:58 -07:00
|
|
|
|
|
|
|
idr_init(&file_priv->context_idr);
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
mutex_lock(&i915->drm.struct_mutex);
|
|
|
|
ctx = i915_gem_create_context(i915, file_priv);
|
|
|
|
mutex_unlock(&i915->drm.struct_mutex);
|
2014-05-22 07:13:38 -06:00
|
|
|
if (IS_ERR(ctx)) {
|
2013-12-06 15:11:19 -07:00
|
|
|
idr_destroy(&file_priv->context_idr);
|
2014-05-22 07:13:38 -06:00
|
|
|
return PTR_ERR(ctx);
|
2013-12-06 15:11:19 -07:00
|
|
|
}
|
|
|
|
|
2017-07-05 08:26:31 -06:00
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
|
|
|
|
2013-12-06 15:10:58 -07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
void i915_gem_context_close(struct drm_file *file)
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
{
|
2012-06-04 15:42:43 -06:00
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
|
2017-06-20 05:05:45 -06:00
|
|
|
lockdep_assert_held(&file_priv->dev_priv->drm.struct_mutex);
|
2016-05-24 07:53:35 -06:00
|
|
|
|
2012-06-19 12:27:39 -06:00
|
|
|
idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
|
2012-06-04 15:42:43 -06:00
|
|
|
idr_destroy(&file_priv->context_idr);
|
|
|
|
}
|
|
|
|
|
2017-10-24 16:08:55 -06:00
|
|
|
static bool engine_has_idle_kernel_context(struct intel_engine_cs *engine)
|
2016-12-29 07:40:37 -07:00
|
|
|
{
|
|
|
|
struct i915_gem_timeline *timeline;
|
|
|
|
|
|
|
|
list_for_each_entry(timeline, &engine->i915->gt.timelines, link) {
|
|
|
|
struct intel_timeline *tl;
|
|
|
|
|
|
|
|
if (timeline == &engine->i915->gt.global_timeline)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
tl = &timeline->engine[engine->id];
|
|
|
|
if (i915_gem_active_peek(&tl->last_request,
|
|
|
|
&engine->i915->drm.struct_mutex))
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-10-24 16:08:55 -06:00
|
|
|
return intel_engine_has_kernel_context(engine);
|
2016-12-29 07:40:37 -07:00
|
|
|
}
|
|
|
|
|
2016-07-15 07:56:19 -06:00
|
|
|
int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
|
|
|
|
{
|
|
|
|
struct intel_engine_cs *engine;
|
2016-10-28 06:58:47 -06:00
|
|
|
struct i915_gem_timeline *timeline;
|
drm/i915: Allocate intel_engine_cs structure only for the enabled engines
With the possibility of addition of many more number of rings in future,
the drm_i915_private structure could bloat as an array, of type
intel_engine_cs, is embedded inside it.
struct intel_engine_cs engine[I915_NUM_ENGINES];
Though this is still fine as generally there is only a single instance of
drm_i915_private structure used, but not all of the possible rings would be
enabled or active on most of the platforms. Some memory can be saved by
allocating intel_engine_cs structure only for the enabled/active engines.
Currently the engine/ring ID is kept static and dev_priv->engine[] is simply
indexed using the enums defined in intel_engine_id.
To save memory and continue using the static engine/ring IDs, 'engine' is
defined as an array of pointers.
struct intel_engine_cs *engine[I915_NUM_ENGINES];
dev_priv->engine[engine_ID] will be NULL for disabled engine instances.
There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
i915.o file (but for i915.ko file text size remain same as 1193131 bytes).
v2:
- Remove the engine iterator field added in drm_i915_private structure,
instead pass a local iterator variable to the for_each_engine**
macros. (Chris)
- Do away with intel_engine_initialized() and instead directly use the
NULL pointer check on engine pointer. (Chris)
v3:
- Remove for_each_engine_id() macro, as the updated macro for_each_engine()
can be used in place of it. (Chris)
- Protect the access to Render engine Fault register with a NULL check, as
engine specific init is done later in Driver load sequence.
v4:
- Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris)
- Kill the superfluous init_engine_lists().
v5:
- Cleanup the intel_engines_init() & intel_engines_setup(), with respect to
allocation of intel_engine_cs structure. (Chris)
v6:
- Rebase.
v7:
- Optimize the for_each_engine_masked() macro. (Chris)
- Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
- Rebase.
v8: Rebase.
v9: Rebase.
v10:
- For index calculation use engine ID instead of pointer based arithmetic in
intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
- For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
- Use for_each_engine macro for cleanup in intel_engines_init() and remove
check for NULL engine pointer in cleanup() routines. (Joonas)
v11: Rebase.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
2016-10-13 11:14:48 -06:00
|
|
|
enum intel_engine_id id;
|
2016-07-15 07:56:19 -06:00
|
|
|
|
2016-10-28 06:58:47 -06:00
|
|
|
lockdep_assert_held(&dev_priv->drm.struct_mutex);
|
|
|
|
|
2018-02-21 02:56:36 -07:00
|
|
|
i915_retire_requests(dev_priv);
|
2016-12-29 07:40:37 -07:00
|
|
|
|
drm/i915: Allocate intel_engine_cs structure only for the enabled engines
With the possibility of addition of many more number of rings in future,
the drm_i915_private structure could bloat as an array, of type
intel_engine_cs, is embedded inside it.
struct intel_engine_cs engine[I915_NUM_ENGINES];
Though this is still fine as generally there is only a single instance of
drm_i915_private structure used, but not all of the possible rings would be
enabled or active on most of the platforms. Some memory can be saved by
allocating intel_engine_cs structure only for the enabled/active engines.
Currently the engine/ring ID is kept static and dev_priv->engine[] is simply
indexed using the enums defined in intel_engine_id.
To save memory and continue using the static engine/ring IDs, 'engine' is
defined as an array of pointers.
struct intel_engine_cs *engine[I915_NUM_ENGINES];
dev_priv->engine[engine_ID] will be NULL for disabled engine instances.
There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
i915.o file (but for i915.ko file text size remain same as 1193131 bytes).
v2:
- Remove the engine iterator field added in drm_i915_private structure,
instead pass a local iterator variable to the for_each_engine**
macros. (Chris)
- Do away with intel_engine_initialized() and instead directly use the
NULL pointer check on engine pointer. (Chris)
v3:
- Remove for_each_engine_id() macro, as the updated macro for_each_engine()
can be used in place of it. (Chris)
- Protect the access to Render engine Fault register with a NULL check, as
engine specific init is done later in Driver load sequence.
v4:
- Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris)
- Kill the superfluous init_engine_lists().
v5:
- Cleanup the intel_engines_init() & intel_engines_setup(), with respect to
allocation of intel_engine_cs structure. (Chris)
v6:
- Rebase.
v7:
- Optimize the for_each_engine_masked() macro. (Chris)
- Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
- Rebase.
v8: Rebase.
v9: Rebase.
v10:
- For index calculation use engine ID instead of pointer based arithmetic in
intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
- For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
- Use for_each_engine macro for cleanup in intel_engines_init() and remove
check for NULL engine pointer in cleanup() routines. (Joonas)
v11: Rebase.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
2016-10-13 11:14:48 -06:00
|
|
|
for_each_engine(engine, dev_priv, id) {
|
2018-02-21 02:56:36 -07:00
|
|
|
struct i915_request *rq;
|
2016-07-15 07:56:19 -06:00
|
|
|
|
2017-10-24 16:08:55 -06:00
|
|
|
if (engine_has_idle_kernel_context(engine))
|
2016-12-29 07:40:37 -07:00
|
|
|
continue;
|
|
|
|
|
2018-02-21 02:56:36 -07:00
|
|
|
rq = i915_request_alloc(engine, dev_priv->kernel_context);
|
|
|
|
if (IS_ERR(rq))
|
|
|
|
return PTR_ERR(rq);
|
2016-07-15 07:56:19 -06:00
|
|
|
|
2016-10-28 06:58:47 -06:00
|
|
|
/* Queue this switch after all other activity */
|
|
|
|
list_for_each_entry(timeline, &dev_priv->gt.timelines, link) {
|
2018-02-21 02:56:36 -07:00
|
|
|
struct i915_request *prev;
|
2016-10-28 06:58:47 -06:00
|
|
|
struct intel_timeline *tl;
|
|
|
|
|
|
|
|
tl = &timeline->engine[engine->id];
|
|
|
|
prev = i915_gem_active_raw(&tl->last_request,
|
|
|
|
&dev_priv->drm.struct_mutex);
|
|
|
|
if (prev)
|
2018-02-21 02:56:36 -07:00
|
|
|
i915_sw_fence_await_sw_fence_gfp(&rq->submit,
|
2016-10-28 06:58:47 -06:00
|
|
|
&prev->submit,
|
2017-12-12 11:06:51 -07:00
|
|
|
I915_FENCE_GFP);
|
2016-10-28 06:58:47 -06:00
|
|
|
}
|
|
|
|
|
2017-11-26 14:48:56 -07:00
|
|
|
/*
|
|
|
|
* Force a flush after the switch to ensure that all rendering
|
|
|
|
* and operations prior to switching to the kernel context hits
|
|
|
|
* memory. This should be guaranteed by the previous request,
|
|
|
|
* but an extra layer of paranoia before we declare the system
|
|
|
|
* idle (on suspend etc) is advisable!
|
|
|
|
*/
|
2018-02-21 02:56:36 -07:00
|
|
|
__i915_request_add(rq, true);
|
2016-07-15 07:56:19 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-11-18 06:10:47 -07:00
|
|
|
static bool client_is_banned(struct drm_i915_file_private *file_priv)
|
|
|
|
{
|
2017-07-21 06:32:30 -06:00
|
|
|
return atomic_read(&file_priv->context_bans) > I915_MAX_CLIENT_CONTEXT_BANS;
|
2016-11-18 06:10:47 -07:00
|
|
|
}
|
|
|
|
|
2012-06-04 15:42:54 -06:00
|
|
|
int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2017-04-28 01:53:36 -06:00
|
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
2012-06-04 15:42:54 -06:00
|
|
|
struct drm_i915_gem_context_create *args = data;
|
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2012-06-04 15:42:54 -06:00
|
|
|
int ret;
|
|
|
|
|
2017-04-28 01:53:36 -06:00
|
|
|
if (!dev_priv->engine[RCS]->context_size)
|
2012-06-19 09:16:01 -06:00
|
|
|
return -ENODEV;
|
|
|
|
|
2016-02-05 09:45:59 -07:00
|
|
|
if (args->pad != 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-11-18 06:10:47 -07:00
|
|
|
if (client_is_banned(file_priv)) {
|
|
|
|
DRM_DEBUG("client %s[%d] banned from creating ctx\n",
|
|
|
|
current->comm,
|
|
|
|
pid_nr(get_task_pid(current, PIDTYPE_PID)));
|
|
|
|
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
2012-06-04 15:42:54 -06:00
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2017-04-28 01:53:36 -06:00
|
|
|
ctx = i915_gem_create_context(dev_priv, file_priv);
|
2012-06-04 15:42:54 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2012-07-17 00:44:49 -06:00
|
|
|
if (IS_ERR(ctx))
|
|
|
|
return PTR_ERR(ctx);
|
2012-06-04 15:42:54 -06:00
|
|
|
|
2017-01-06 08:20:13 -07:00
|
|
|
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
|
|
|
|
|
drm/i915: Emphasize that ctx->id is merely a user handle
This is an Execlists preparatory patch, since they make context ID become an
overloaded term:
- In the software, it was used to distinguish which context userspace was
trying to use.
- In the BSpec, the term is used to describe the 20-bits long field the
hardware uses to it to discriminate the contexts that are submitted to
the ELSP and inform the driver about their current status (via Context
Switch Interrupts and Context Status Buffers).
Initially, I tried to make the different meanings converge, but it proved
impossible:
- The software ctx->id is per-filp, while the hardware one needs to be
globally unique.
- Also, we multiplex several backing states objects per intel_context,
and all of them need unique HW IDs.
- I tried adding a per-filp ID and then composing the HW context ID as:
ctx->id + file_priv->id + ring->id, but the fact that the hardware only
uses 20-bits means we have to artificially limit the number of filps or
contexts the userspace can create.
The ctx->user_handle renaming bits are done with this Cocci patch (plus
manual frobbing of the struct declaration):
@@
struct intel_context c;
@@
- (c).id
+ c.user_handle
@@
struct intel_context *c;
@@
- (c)->id
+ c->user_handle
Also, while we are at it, s/DEFAULT_CONTEXT_ID/DEFAULT_CONTEXT_HANDLE and
change the type to unsigned 32 bits.
v2: s/handle/user_handle and change the type to uint32_t as suggested by
Chris Wilson.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-03 09:28:00 -06:00
|
|
|
args->ctx_id = ctx->user_handle;
|
2016-11-21 04:31:09 -07:00
|
|
|
DRM_DEBUG("HW context %d created\n", args->ctx_id);
|
2012-06-04 15:42:54 -06:00
|
|
|
|
2012-07-17 00:44:49 -06:00
|
|
|
return 0;
|
2012-06-04 15:42:54 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_i915_gem_context_destroy *args = data;
|
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2012-06-04 15:42:54 -06:00
|
|
|
int ret;
|
|
|
|
|
2016-02-05 09:45:59 -07:00
|
|
|
if (args->pad != 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
drm/i915: Emphasize that ctx->id is merely a user handle
This is an Execlists preparatory patch, since they make context ID become an
overloaded term:
- In the software, it was used to distinguish which context userspace was
trying to use.
- In the BSpec, the term is used to describe the 20-bits long field the
hardware uses to it to discriminate the contexts that are submitted to
the ELSP and inform the driver about their current status (via Context
Switch Interrupts and Context Status Buffers).
Initially, I tried to make the different meanings converge, but it proved
impossible:
- The software ctx->id is per-filp, while the hardware one needs to be
globally unique.
- Also, we multiplex several backing states objects per intel_context,
and all of them need unique HW IDs.
- I tried adding a per-filp ID and then composing the HW context ID as:
ctx->id + file_priv->id + ring->id, but the fact that the hardware only
uses 20-bits means we have to artificially limit the number of filps or
contexts the userspace can create.
The ctx->user_handle renaming bits are done with this Cocci patch (plus
manual frobbing of the struct declaration):
@@
struct intel_context c;
@@
- (c).id
+ c.user_handle
@@
struct intel_context *c;
@@
- (c)->id
+ c->user_handle
Also, while we are at it, s/DEFAULT_CONTEXT_ID/DEFAULT_CONTEXT_HANDLE and
change the type to unsigned 32 bits.
v2: s/handle/user_handle and change the type to uint32_t as suggested by
Chris Wilson.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-03 09:28:00 -06:00
|
|
|
if (args->ctx_id == DEFAULT_CONTEXT_HANDLE)
|
2013-12-24 17:02:54 -07:00
|
|
|
return -ENOENT;
|
2013-12-06 15:11:19 -07:00
|
|
|
|
2016-05-24 07:53:36 -06:00
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
2017-06-20 05:05:47 -06:00
|
|
|
if (!ctx)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
ret = mutex_lock_interruptible(&dev->struct_mutex);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
2012-06-04 15:42:54 -06:00
|
|
|
|
2017-02-09 04:34:25 -07:00
|
|
|
__destroy_hw_context(ctx, file_priv);
|
2012-06-04 15:42:54 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
out:
|
|
|
|
i915_gem_context_put(ctx);
|
2012-06-04 15:42:54 -06:00
|
|
|
return 0;
|
|
|
|
}
|
2014-12-24 09:13:40 -07:00
|
|
|
|
|
|
|
int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
|
|
struct drm_i915_gem_context_param *args = data;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2017-06-20 05:05:47 -06:00
|
|
|
int ret = 0;
|
2014-12-24 09:13:40 -07:00
|
|
|
|
2016-05-24 07:53:36 -06:00
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
2017-06-20 05:05:47 -06:00
|
|
|
if (!ctx)
|
|
|
|
return -ENOENT;
|
2014-12-24 09:13:40 -07:00
|
|
|
|
|
|
|
args->size = 0;
|
|
|
|
switch (args->param) {
|
|
|
|
case I915_CONTEXT_PARAM_BAN_PERIOD:
|
2016-11-16 08:20:32 -07:00
|
|
|
ret = -EINVAL;
|
2014-12-24 09:13:40 -07:00
|
|
|
break;
|
2015-05-20 08:00:13 -06:00
|
|
|
case I915_CONTEXT_PARAM_NO_ZEROMAP:
|
|
|
|
args->value = ctx->flags & CONTEXT_NO_ZEROMAP;
|
|
|
|
break;
|
2015-10-14 07:17:11 -06:00
|
|
|
case I915_CONTEXT_PARAM_GTT_SIZE:
|
|
|
|
if (ctx->ppgtt)
|
|
|
|
args->value = ctx->ppgtt->base.total;
|
|
|
|
else if (to_i915(dev)->mm.aliasing_ppgtt)
|
|
|
|
args->value = to_i915(dev)->mm.aliasing_ppgtt->base.total;
|
|
|
|
else
|
2016-03-18 02:42:57 -06:00
|
|
|
args->value = to_i915(dev)->ggtt.base.total;
|
2015-10-14 07:17:11 -06:00
|
|
|
break;
|
2016-07-04 01:08:39 -06:00
|
|
|
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
|
2016-12-31 04:20:11 -07:00
|
|
|
args->value = i915_gem_context_no_error_capture(ctx);
|
2016-07-04 01:08:39 -06:00
|
|
|
break;
|
2016-11-16 08:20:32 -07:00
|
|
|
case I915_CONTEXT_PARAM_BANNABLE:
|
2016-12-31 04:20:11 -07:00
|
|
|
args->value = i915_gem_context_is_bannable(ctx);
|
2016-11-16 08:20:32 -07:00
|
|
|
break;
|
drm/i915/scheduler: Support user-defined priorities
Use a priority stored in the context as the initial value when
submitting a request. This allows us to change the default priority on a
per-context basis, allowing different contexts to be favoured with GPU
time at the expense of lower importance work. The user can adjust the
context's priority via I915_CONTEXT_PARAM_PRIORITY, with more positive
values being higher priority (they will be serviced earlier, after their
dependencies have been resolved). Any prerequisite work for an execbuf
will have its priority raised to match the new request as required.
Normal users can specify any value in the range of -1023 to 0 [default],
i.e. they can reduce the priority of their workloads (and temporarily
boost it back to normal if so desired).
Privileged users can specify any value in the range of -1023 to 1023,
[default is 0], i.e. they can raise their priority above all overs and
so potentially starve the system.
Note that the existing schedulers are not fair, nor load balancing, the
execution is strictly by priority on a first-come, first-served basis,
and the driver may choose to boost some requests above the range
available to users.
This priority was originally based around nice(2), but evolved to allow
clients to adjust their priority within a small range, and allow for a
privileged high priority range.
For example, this can be used to implement EGL_IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt
EGL_CONTEXT_PRIORITY_LEVEL_IMG determines the priority level of
the context to be created. This attribute is a hint, as an
implementation may not support multiple contexts at some
priority levels and system policy may limit access to high
priority contexts to appropriate system privilege level. The
default value for EGL_CONTEXT_PRIORITY_LEVEL_IMG is
EGL_CONTEXT_PRIORITY_MEDIUM_IMG."
so we can map
PRIORITY_HIGH -> 1023 [privileged, will failback to 0]
PRIORITY_MED -> 0 [default]
PRIORITY_LOW -> -1023
They also map onto the priorities used by VkQueue (and a VkQueue is
essentially a timeline, our i915_gem_context under full-ppgtt).
v2: s/CAP_SYS_ADMIN/CAP_SYS_NICE/
v3: Report min/max user priorities as defines in the uapi, and rebase
internal priorities on the exposed values.
Testcase: igt/gem_exec_schedule
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-9-chris@chris-wilson.co.uk
2017-10-03 14:34:53 -06:00
|
|
|
case I915_CONTEXT_PARAM_PRIORITY:
|
|
|
|
args->value = ctx->priority;
|
|
|
|
break;
|
2014-12-24 09:13:40 -07:00
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
i915_gem_context_put(ctx);
|
2014-12-24 09:13:40 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
|
|
struct drm_i915_gem_context_param *args = data;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2014-12-24 09:13:40 -07:00
|
|
|
int ret;
|
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
|
|
|
|
if (!ctx)
|
|
|
|
return -ENOENT;
|
|
|
|
|
2014-12-24 09:13:40 -07:00
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
|
|
if (ret)
|
2017-06-20 05:05:47 -06:00
|
|
|
goto out;
|
2014-12-24 09:13:40 -07:00
|
|
|
|
|
|
|
switch (args->param) {
|
|
|
|
case I915_CONTEXT_PARAM_BAN_PERIOD:
|
2016-11-16 08:20:32 -07:00
|
|
|
ret = -EINVAL;
|
2014-12-24 09:13:40 -07:00
|
|
|
break;
|
2015-05-20 08:00:13 -06:00
|
|
|
case I915_CONTEXT_PARAM_NO_ZEROMAP:
|
|
|
|
if (args->size) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
} else {
|
|
|
|
ctx->flags &= ~CONTEXT_NO_ZEROMAP;
|
|
|
|
ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0;
|
2016-07-04 01:08:39 -06:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
|
2016-12-31 04:20:11 -07:00
|
|
|
if (args->size)
|
2016-07-04 01:08:39 -06:00
|
|
|
ret = -EINVAL;
|
2016-12-31 04:20:11 -07:00
|
|
|
else if (args->value)
|
|
|
|
i915_gem_context_set_no_error_capture(ctx);
|
|
|
|
else
|
|
|
|
i915_gem_context_clear_no_error_capture(ctx);
|
2015-05-20 08:00:13 -06:00
|
|
|
break;
|
2016-11-16 08:20:32 -07:00
|
|
|
case I915_CONTEXT_PARAM_BANNABLE:
|
|
|
|
if (args->size)
|
|
|
|
ret = -EINVAL;
|
|
|
|
else if (!capable(CAP_SYS_ADMIN) && !args->value)
|
|
|
|
ret = -EPERM;
|
2016-12-31 04:20:11 -07:00
|
|
|
else if (args->value)
|
|
|
|
i915_gem_context_set_bannable(ctx);
|
2016-11-16 08:20:32 -07:00
|
|
|
else
|
2016-12-31 04:20:11 -07:00
|
|
|
i915_gem_context_clear_bannable(ctx);
|
2016-11-16 08:20:32 -07:00
|
|
|
break;
|
drm/i915/scheduler: Support user-defined priorities
Use a priority stored in the context as the initial value when
submitting a request. This allows us to change the default priority on a
per-context basis, allowing different contexts to be favoured with GPU
time at the expense of lower importance work. The user can adjust the
context's priority via I915_CONTEXT_PARAM_PRIORITY, with more positive
values being higher priority (they will be serviced earlier, after their
dependencies have been resolved). Any prerequisite work for an execbuf
will have its priority raised to match the new request as required.
Normal users can specify any value in the range of -1023 to 0 [default],
i.e. they can reduce the priority of their workloads (and temporarily
boost it back to normal if so desired).
Privileged users can specify any value in the range of -1023 to 1023,
[default is 0], i.e. they can raise their priority above all overs and
so potentially starve the system.
Note that the existing schedulers are not fair, nor load balancing, the
execution is strictly by priority on a first-come, first-served basis,
and the driver may choose to boost some requests above the range
available to users.
This priority was originally based around nice(2), but evolved to allow
clients to adjust their priority within a small range, and allow for a
privileged high priority range.
For example, this can be used to implement EGL_IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt
EGL_CONTEXT_PRIORITY_LEVEL_IMG determines the priority level of
the context to be created. This attribute is a hint, as an
implementation may not support multiple contexts at some
priority levels and system policy may limit access to high
priority contexts to appropriate system privilege level. The
default value for EGL_CONTEXT_PRIORITY_LEVEL_IMG is
EGL_CONTEXT_PRIORITY_MEDIUM_IMG."
so we can map
PRIORITY_HIGH -> 1023 [privileged, will failback to 0]
PRIORITY_MED -> 0 [default]
PRIORITY_LOW -> -1023
They also map onto the priorities used by VkQueue (and a VkQueue is
essentially a timeline, our i915_gem_context under full-ppgtt).
v2: s/CAP_SYS_ADMIN/CAP_SYS_NICE/
v3: Report min/max user priorities as defines in the uapi, and rebase
internal priorities on the exposed values.
Testcase: igt/gem_exec_schedule
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-9-chris@chris-wilson.co.uk
2017-10-03 14:34:53 -06:00
|
|
|
|
|
|
|
case I915_CONTEXT_PARAM_PRIORITY:
|
|
|
|
{
|
2018-02-08 01:51:51 -07:00
|
|
|
s64 priority = args->value;
|
drm/i915/scheduler: Support user-defined priorities
Use a priority stored in the context as the initial value when
submitting a request. This allows us to change the default priority on a
per-context basis, allowing different contexts to be favoured with GPU
time at the expense of lower importance work. The user can adjust the
context's priority via I915_CONTEXT_PARAM_PRIORITY, with more positive
values being higher priority (they will be serviced earlier, after their
dependencies have been resolved). Any prerequisite work for an execbuf
will have its priority raised to match the new request as required.
Normal users can specify any value in the range of -1023 to 0 [default],
i.e. they can reduce the priority of their workloads (and temporarily
boost it back to normal if so desired).
Privileged users can specify any value in the range of -1023 to 1023,
[default is 0], i.e. they can raise their priority above all overs and
so potentially starve the system.
Note that the existing schedulers are not fair, nor load balancing, the
execution is strictly by priority on a first-come, first-served basis,
and the driver may choose to boost some requests above the range
available to users.
This priority was originally based around nice(2), but evolved to allow
clients to adjust their priority within a small range, and allow for a
privileged high priority range.
For example, this can be used to implement EGL_IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt
EGL_CONTEXT_PRIORITY_LEVEL_IMG determines the priority level of
the context to be created. This attribute is a hint, as an
implementation may not support multiple contexts at some
priority levels and system policy may limit access to high
priority contexts to appropriate system privilege level. The
default value for EGL_CONTEXT_PRIORITY_LEVEL_IMG is
EGL_CONTEXT_PRIORITY_MEDIUM_IMG."
so we can map
PRIORITY_HIGH -> 1023 [privileged, will failback to 0]
PRIORITY_MED -> 0 [default]
PRIORITY_LOW -> -1023
They also map onto the priorities used by VkQueue (and a VkQueue is
essentially a timeline, our i915_gem_context under full-ppgtt).
v2: s/CAP_SYS_ADMIN/CAP_SYS_NICE/
v3: Report min/max user priorities as defines in the uapi, and rebase
internal priorities on the exposed values.
Testcase: igt/gem_exec_schedule
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-9-chris@chris-wilson.co.uk
2017-10-03 14:34:53 -06:00
|
|
|
|
|
|
|
if (args->size)
|
|
|
|
ret = -EINVAL;
|
2018-02-07 14:05:43 -07:00
|
|
|
else if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
|
drm/i915/scheduler: Support user-defined priorities
Use a priority stored in the context as the initial value when
submitting a request. This allows us to change the default priority on a
per-context basis, allowing different contexts to be favoured with GPU
time at the expense of lower importance work. The user can adjust the
context's priority via I915_CONTEXT_PARAM_PRIORITY, with more positive
values being higher priority (they will be serviced earlier, after their
dependencies have been resolved). Any prerequisite work for an execbuf
will have its priority raised to match the new request as required.
Normal users can specify any value in the range of -1023 to 0 [default],
i.e. they can reduce the priority of their workloads (and temporarily
boost it back to normal if so desired).
Privileged users can specify any value in the range of -1023 to 1023,
[default is 0], i.e. they can raise their priority above all overs and
so potentially starve the system.
Note that the existing schedulers are not fair, nor load balancing, the
execution is strictly by priority on a first-come, first-served basis,
and the driver may choose to boost some requests above the range
available to users.
This priority was originally based around nice(2), but evolved to allow
clients to adjust their priority within a small range, and allow for a
privileged high priority range.
For example, this can be used to implement EGL_IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt
EGL_CONTEXT_PRIORITY_LEVEL_IMG determines the priority level of
the context to be created. This attribute is a hint, as an
implementation may not support multiple contexts at some
priority levels and system policy may limit access to high
priority contexts to appropriate system privilege level. The
default value for EGL_CONTEXT_PRIORITY_LEVEL_IMG is
EGL_CONTEXT_PRIORITY_MEDIUM_IMG."
so we can map
PRIORITY_HIGH -> 1023 [privileged, will failback to 0]
PRIORITY_MED -> 0 [default]
PRIORITY_LOW -> -1023
They also map onto the priorities used by VkQueue (and a VkQueue is
essentially a timeline, our i915_gem_context under full-ppgtt).
v2: s/CAP_SYS_ADMIN/CAP_SYS_NICE/
v3: Report min/max user priorities as defines in the uapi, and rebase
internal priorities on the exposed values.
Testcase: igt/gem_exec_schedule
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-9-chris@chris-wilson.co.uk
2017-10-03 14:34:53 -06:00
|
|
|
ret = -ENODEV;
|
|
|
|
else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
|
|
|
|
priority < I915_CONTEXT_MIN_USER_PRIORITY)
|
|
|
|
ret = -EINVAL;
|
|
|
|
else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
|
|
|
|
!capable(CAP_SYS_NICE))
|
|
|
|
ret = -EPERM;
|
|
|
|
else
|
|
|
|
ctx->priority = priority;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-12-24 09:13:40 -07:00
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
out:
|
|
|
|
i915_gem_context_put(ctx);
|
2014-12-24 09:13:40 -07:00
|
|
|
return ret;
|
|
|
|
}
|
2016-05-13 04:57:19 -06:00
|
|
|
|
|
|
|
int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
|
|
|
|
void *data, struct drm_file *file)
|
|
|
|
{
|
2016-07-04 04:34:36 -06:00
|
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
2016-05-13 04:57:19 -06:00
|
|
|
struct drm_i915_reset_stats *args = data;
|
2016-05-24 07:53:34 -06:00
|
|
|
struct i915_gem_context *ctx;
|
2016-05-13 04:57:19 -06:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (args->flags || args->pad)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
ret = -ENOENT;
|
|
|
|
rcu_read_lock();
|
|
|
|
ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
|
|
|
|
if (!ctx)
|
|
|
|
goto out;
|
2016-05-13 04:57:19 -06:00
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
/*
|
|
|
|
* We opt for unserialised reads here. This may result in tearing
|
|
|
|
* in the extremely unlikely event of a GPU hang on this context
|
|
|
|
* as we are querying them. If we need that extra layer of protection,
|
|
|
|
* we should wrap the hangstats with a seqlock.
|
|
|
|
*/
|
2016-05-13 04:57:19 -06:00
|
|
|
|
|
|
|
if (capable(CAP_SYS_ADMIN))
|
|
|
|
args->reset_count = i915_reset_count(&dev_priv->gpu_error);
|
|
|
|
else
|
|
|
|
args->reset_count = 0;
|
|
|
|
|
2017-07-21 06:32:30 -06:00
|
|
|
args->batch_active = atomic_read(&ctx->guilty_count);
|
|
|
|
args->batch_pending = atomic_read(&ctx->active_count);
|
2016-05-13 04:57:19 -06:00
|
|
|
|
2017-06-20 05:05:47 -06:00
|
|
|
ret = 0;
|
|
|
|
out:
|
|
|
|
rcu_read_unlock();
|
|
|
|
return ret;
|
2016-05-13 04:57:19 -06:00
|
|
|
}
|
2017-02-13 10:15:19 -07:00
|
|
|
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
|
|
#include "selftests/mock_context.c"
|
2017-02-13 10:15:49 -07:00
|
|
|
#include "selftests/i915_gem_context.c"
|
2017-02-13 10:15:19 -07:00
|
|
|
#endif
|