2018-12-13 21:10:24 -07:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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#include <linux/bitfield.h>
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#include <linux/cpufreq.h>
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#include <linux/init.h>
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2020-06-22 02:16:48 -06:00
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#include <linux/interconnect.h>
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2018-12-13 21:10:24 -07:00
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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2019-01-31 10:32:50 -07:00
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#include <linux/pm_opp.h>
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2018-12-13 21:10:24 -07:00
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#include <linux/slab.h>
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#define LUT_MAX_ENTRIES 40U
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#define LUT_SRC GENMASK(31, 30)
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#define LUT_L_VAL GENMASK(7, 0)
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#define LUT_CORE_COUNT GENMASK(18, 16)
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#define LUT_VOLT GENMASK(11, 0)
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2018-12-13 21:10:24 -07:00
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#define CLK_HW_DIV 2
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#define LUT_TURBO_IND 1
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2018-12-13 21:10:24 -07:00
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2020-09-15 01:24:22 -06:00
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struct qcom_cpufreq_soc_data {
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u32 reg_enable;
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u32 reg_freq_lut;
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u32 reg_volt_lut;
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u32 reg_perf_state;
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u8 lut_row_size;
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};
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struct qcom_cpufreq_data {
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void __iomem *base;
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const struct qcom_cpufreq_soc_data *soc_data;
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};
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2018-12-13 21:10:24 -07:00
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static unsigned long cpu_hw_rate, xo_rate;
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static bool icc_scaling_enabled;
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static int qcom_cpufreq_set_bw(struct cpufreq_policy *policy,
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unsigned long freq_khz)
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{
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unsigned long freq_hz = freq_khz * 1000;
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struct dev_pm_opp *opp;
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struct device *dev;
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int ret;
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dev = get_cpu_device(policy->cpu);
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if (!dev)
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return -ENODEV;
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opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true);
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if (IS_ERR(opp))
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return PTR_ERR(opp);
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ret = dev_pm_opp_set_bw(dev, opp);
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dev_pm_opp_put(opp);
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return ret;
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}
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static int qcom_cpufreq_update_opp(struct device *cpu_dev,
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unsigned long freq_khz,
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unsigned long volt)
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{
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unsigned long freq_hz = freq_khz * 1000;
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int ret;
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/* Skip voltage update if the opp table is not available */
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if (!icc_scaling_enabled)
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return dev_pm_opp_add(cpu_dev, freq_hz, volt);
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ret = dev_pm_opp_adjust_voltage(cpu_dev, freq_hz, volt, volt, volt);
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if (ret) {
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dev_err(cpu_dev, "Voltage update failed freq=%ld\n", freq_khz);
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return ret;
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}
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return dev_pm_opp_enable(cpu_dev, freq_hz);
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}
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2018-12-13 21:10:24 -07:00
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static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
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unsigned int index)
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{
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struct qcom_cpufreq_data *data = policy->driver_data;
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const struct qcom_cpufreq_soc_data *soc_data = data->soc_data;
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2019-08-08 07:18:57 -06:00
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unsigned long freq = policy->freq_table[index].frequency;
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2018-12-13 21:10:24 -07:00
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2020-09-15 01:24:22 -06:00
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writel_relaxed(index, data->base + soc_data->reg_perf_state);
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2018-12-13 21:10:24 -07:00
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2020-06-22 02:16:48 -06:00
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if (icc_scaling_enabled)
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qcom_cpufreq_set_bw(policy, freq);
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2018-12-13 21:10:24 -07:00
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return 0;
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}
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static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)
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{
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struct qcom_cpufreq_data *data;
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const struct qcom_cpufreq_soc_data *soc_data;
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2018-12-13 21:10:24 -07:00
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struct cpufreq_policy *policy;
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unsigned int index;
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policy = cpufreq_cpu_get_raw(cpu);
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if (!policy)
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return 0;
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2020-09-15 01:24:22 -06:00
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data = policy->driver_data;
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soc_data = data->soc_data;
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2018-12-13 21:10:24 -07:00
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2020-09-15 01:24:22 -06:00
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index = readl_relaxed(data->base + soc_data->reg_perf_state);
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2018-12-13 21:10:24 -07:00
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index = min(index, LUT_MAX_ENTRIES - 1);
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return policy->freq_table[index].frequency;
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}
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static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
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unsigned int target_freq)
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{
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2020-09-15 01:24:22 -06:00
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struct qcom_cpufreq_data *data = policy->driver_data;
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const struct qcom_cpufreq_soc_data *soc_data = data->soc_data;
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2020-07-29 21:29:40 -06:00
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unsigned int index;
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2018-12-13 21:10:24 -07:00
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index = policy->cached_resolved_idx;
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2020-09-15 01:24:22 -06:00
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writel_relaxed(index, data->base + soc_data->reg_perf_state);
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2018-12-13 21:10:24 -07:00
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cpufreq: move invariance setter calls in cpufreq core
To properly scale its per-entity load-tracking signals, the task scheduler
needs to be given a frequency scale factor, i.e. some image of the current
frequency the CPU is running at. Currently, this scale can be computed
either by using counters (APERF/MPERF on x86, AMU on arm64), or by
piggy-backing on the frequency selection done by cpufreq.
For the latter, drivers have to explicitly set the scale factor
themselves, despite it being purely boiler-plate code: the required
information depends entirely on the kind of frequency switch callback
implemented by the driver, i.e. either of: target_index(), target(),
fast_switch() and setpolicy().
The fitness of those callbacks with regard to driving the Frequency
Invariance Engine (FIE) is studied below:
target_index()
==============
Documentation states that the chosen frequency "must be determined by
freq_table[index].frequency". It isn't clear if it *has* to be that
frequency, or if it can use that frequency value to do some computation
that ultimately leads to a different frequency selection. All drivers
go for the former, while the vexpress-spc-cpufreq has an atypical
implementation which is handled separately.
Therefore, the hook works on the assumption the core can use
freq_table[index].frequency.
target()
=======
This has been flagged as deprecated since:
commit 9c0ebcf78fde ("cpufreq: Implement light weight ->target_index() routine")
It also doesn't have that many users:
gx-suspmod.c:439: .target = cpufreq_gx_target,
s3c24xx-cpufreq.c:428: .target = s3c_cpufreq_target,
intel_pstate.c:2528: .target = intel_cpufreq_target,
cppc_cpufreq.c:401: .target = cppc_cpufreq_set_target,
cpufreq-nforce2.c:371: .target = nforce2_target,
sh-cpufreq.c:163: .target = sh_cpufreq_target,
pcc-cpufreq.c:573: .target = pcc_cpufreq_target,
Similarly to the path taken for target_index() calls in the cpufreq core
during a frequency change, all of the drivers above will mark the end of a
frequency change by a call to cpufreq_freq_transition_end().
Therefore, cpufreq_freq_transition_end() can be used as the location for
the arch_set_freq_scale() call to potentially inform the scheduler of the
frequency change.
This change maintains the previous functionality for the drivers that
implement the target_index() callback, while also adding support for the
few drivers that implement the deprecated target() callback.
fast_switch()
=============
This callback *has* to return the frequency that was selected.
setpolicy()
===========
This callback does not have any designated way of informing what was the
end choice. But there are only two drivers using setpolicy(), and none
of them have current FIE support:
drivers/cpufreq/longrun.c:281: .setpolicy = longrun_set_policy,
drivers/cpufreq/intel_pstate.c:2215: .setpolicy = intel_pstate_set_policy,
The intel_pstate is known to use counter-driven frequency invariance.
Conclusion
==========
Given that the significant majority of current FIE enabled drivers use
callbacks that lend themselves to triggering the setting of the FIE scale
factor in a generic way, move the invariance setter calls to cpufreq core.
As a result of setting the frequency scale factor in cpufreq core, after
callbacks that lend themselves to trigger it, remove this functionality
from the driver side.
To be noted that despite marking a successful frequency change, many
cpufreq drivers will consider the new frequency as the requested
frequency, although this is might not be the one granted by the hardware.
Therefore, the call to arch_set_freq_scale() is a "best effort" one, and
it is up to the architecture if the new frequency is used in the new
frequency scale factor setting (determined by the implementation of
arch_set_freq_scale()) or eventually used by the scheduler (determined
by the implementation of arch_scale_freq_capacity()). The architecture
is in a better position to decide if it has better methods to obtain
more accurate information regarding the current frequency and use that
information instead (for example, the use of counters).
Also, the implementation to arch_set_freq_scale() will now have to handle
error conditions (current frequency == 0) in order to prevent the
overhead in cpufreq core when the default arch_set_freq_scale()
implementation is used.
Signed-off-by: Ionela Voinescu <ionela.voinescu@arm.com>
Suggested-by: Valentin Schneider <valentin.schneider@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-09-01 14:55:46 -06:00
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return policy->freq_table[index].frequency;
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2018-12-13 21:10:24 -07:00
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}
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2019-01-31 10:32:50 -07:00
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static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
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struct cpufreq_policy *policy)
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{
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2019-08-07 05:45:43 -06:00
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u32 data, src, lval, i, core_count, prev_freq = 0, freq;
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2019-01-31 10:32:50 -07:00
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u32 volt;
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2018-12-13 21:10:24 -07:00
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struct cpufreq_frequency_table *table;
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2020-06-22 02:16:48 -06:00
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struct dev_pm_opp *opp;
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unsigned long rate;
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int ret;
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2020-09-15 01:24:22 -06:00
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struct qcom_cpufreq_data *drv_data = policy->driver_data;
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const struct qcom_cpufreq_soc_data *soc_data = drv_data->soc_data;
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2018-12-13 21:10:24 -07:00
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table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL);
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if (!table)
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return -ENOMEM;
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2020-06-22 02:16:48 -06:00
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ret = dev_pm_opp_of_add_table(cpu_dev);
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if (!ret) {
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/* Disable all opps and cross-validate against LUT later */
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icc_scaling_enabled = true;
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for (rate = 0; ; rate++) {
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
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if (IS_ERR(opp))
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break;
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dev_pm_opp_put(opp);
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dev_pm_opp_disable(cpu_dev, rate);
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}
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} else if (ret != -ENODEV) {
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dev_err(cpu_dev, "Invalid opp table in device tree\n");
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return ret;
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} else {
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2020-06-22 02:16:49 -06:00
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policy->fast_switch_possible = true;
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2020-06-22 02:16:48 -06:00
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icc_scaling_enabled = false;
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}
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2018-12-13 21:10:24 -07:00
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for (i = 0; i < LUT_MAX_ENTRIES; i++) {
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2020-09-15 01:24:22 -06:00
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data = readl_relaxed(drv_data->base + soc_data->reg_freq_lut +
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i * soc_data->lut_row_size);
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2018-12-13 21:10:24 -07:00
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src = FIELD_GET(LUT_SRC, data);
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lval = FIELD_GET(LUT_L_VAL, data);
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core_count = FIELD_GET(LUT_CORE_COUNT, data);
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2020-09-15 01:24:22 -06:00
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data = readl_relaxed(drv_data->base + soc_data->reg_volt_lut +
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i * soc_data->lut_row_size);
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2019-01-31 10:32:50 -07:00
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volt = FIELD_GET(LUT_VOLT, data) * 1000;
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2018-12-13 21:10:24 -07:00
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if (src)
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freq = xo_rate * lval / 1000;
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else
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freq = cpu_hw_rate / 1000;
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2019-08-07 05:45:43 -06:00
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if (freq != prev_freq && core_count != LUT_TURBO_IND) {
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2020-09-15 11:10:54 -06:00
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if (!qcom_cpufreq_update_opp(cpu_dev, freq, volt)) {
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table[i].frequency = freq;
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dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i,
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2018-12-13 21:10:24 -07:00
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freq, core_count);
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2020-09-15 11:10:54 -06:00
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} else {
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dev_warn(cpu_dev, "failed to update OPP for freq=%d\n", freq);
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table[i].frequency = CPUFREQ_ENTRY_INVALID;
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}
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2019-08-07 05:45:43 -06:00
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} else if (core_count == LUT_TURBO_IND) {
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2019-01-31 10:32:50 -07:00
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table[i].frequency = CPUFREQ_ENTRY_INVALID;
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2018-12-13 21:10:24 -07:00
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}
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/*
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* Two of the same frequencies with the same core counts means
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* end of table
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*/
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2019-08-07 05:45:43 -06:00
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if (i > 0 && prev_freq == freq) {
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2018-12-13 21:10:24 -07:00
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struct cpufreq_frequency_table *prev = &table[i - 1];
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/*
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* Only treat the last frequency that might be a boost
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* as the boost frequency
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*/
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2019-08-07 05:45:43 -06:00
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if (prev->frequency == CPUFREQ_ENTRY_INVALID) {
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2020-09-15 11:10:54 -06:00
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if (!qcom_cpufreq_update_opp(cpu_dev, prev_freq, volt)) {
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prev->frequency = prev_freq;
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prev->flags = CPUFREQ_BOOST_FREQ;
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} else {
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dev_warn(cpu_dev, "failed to update OPP for freq=%d\n",
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freq);
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}
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2018-12-13 21:10:24 -07:00
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}
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break;
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}
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prev_freq = freq;
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}
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table[i].frequency = CPUFREQ_TABLE_END;
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policy->freq_table = table;
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2019-01-31 10:32:50 -07:00
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dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
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2018-12-13 21:10:24 -07:00
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return 0;
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}
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static void qcom_get_related_cpus(int index, struct cpumask *m)
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{
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struct device_node *cpu_np;
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struct of_phandle_args args;
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int cpu, ret;
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for_each_possible_cpu(cpu) {
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cpu_np = of_cpu_device_node_get(cpu);
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if (!cpu_np)
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continue;
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ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
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"#freq-domain-cells", 0,
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&args);
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of_node_put(cpu_np);
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if (ret < 0)
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continue;
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if (index == args.args[0])
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cpumask_set_cpu(cpu, m);
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}
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}
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2020-09-15 01:24:22 -06:00
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static const struct qcom_cpufreq_soc_data qcom_soc_data = {
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.reg_enable = 0x0,
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.reg_freq_lut = 0x110,
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.reg_volt_lut = 0x114,
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.reg_perf_state = 0x920,
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.lut_row_size = 32,
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};
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2020-09-15 01:24:23 -06:00
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static const struct qcom_cpufreq_soc_data epss_soc_data = {
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|
|
|
.reg_enable = 0x0,
|
|
|
|
.reg_freq_lut = 0x100,
|
|
|
|
.reg_volt_lut = 0x200,
|
|
|
|
.reg_perf_state = 0x320,
|
|
|
|
.lut_row_size = 4,
|
|
|
|
};
|
|
|
|
|
2020-09-15 01:24:22 -06:00
|
|
|
static const struct of_device_id qcom_cpufreq_hw_match[] = {
|
|
|
|
{ .compatible = "qcom,cpufreq-hw", .data = &qcom_soc_data },
|
2020-09-15 01:24:23 -06:00
|
|
|
{ .compatible = "qcom,cpufreq-epss", .data = &epss_soc_data },
|
2020-09-15 01:24:22 -06:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match);
|
|
|
|
|
2018-12-13 21:10:24 -07:00
|
|
|
static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
|
|
|
|
{
|
2020-09-08 01:57:12 -06:00
|
|
|
struct platform_device *pdev = cpufreq_get_driver_data();
|
|
|
|
struct device *dev = &pdev->dev;
|
2018-12-13 21:10:24 -07:00
|
|
|
struct of_phandle_args args;
|
|
|
|
struct device_node *cpu_np;
|
2019-01-31 10:32:50 -07:00
|
|
|
struct device *cpu_dev;
|
2018-12-13 21:10:24 -07:00
|
|
|
void __iomem *base;
|
2020-09-15 01:24:22 -06:00
|
|
|
struct qcom_cpufreq_data *data;
|
2018-12-13 21:10:24 -07:00
|
|
|
int ret, index;
|
|
|
|
|
2019-01-31 10:32:50 -07:00
|
|
|
cpu_dev = get_cpu_device(policy->cpu);
|
|
|
|
if (!cpu_dev) {
|
|
|
|
pr_err("%s: failed to get cpu%d device\n", __func__,
|
|
|
|
policy->cpu);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2018-12-13 21:10:24 -07:00
|
|
|
cpu_np = of_cpu_device_node_get(policy->cpu);
|
|
|
|
if (!cpu_np)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
|
|
|
|
"#freq-domain-cells", 0, &args);
|
|
|
|
of_node_put(cpu_np);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
index = args.args[0];
|
|
|
|
|
2020-09-15 01:24:21 -06:00
|
|
|
base = devm_platform_ioremap_resource(pdev, index);
|
|
|
|
if (IS_ERR(base))
|
|
|
|
return PTR_ERR(base);
|
2018-12-13 21:10:24 -07:00
|
|
|
|
2020-09-15 01:24:22 -06:00
|
|
|
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
|
|
|
|
if (!data) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
data->soc_data = of_device_get_match_data(&pdev->dev);
|
|
|
|
data->base = base;
|
2018-12-13 21:10:24 -07:00
|
|
|
|
|
|
|
/* HW should be in enabled state to proceed */
|
2020-09-15 01:24:22 -06:00
|
|
|
if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) {
|
2018-12-13 21:10:24 -07:00
|
|
|
dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
qcom_get_related_cpus(index, policy->cpus);
|
|
|
|
if (!cpumask_weight(policy->cpus)) {
|
|
|
|
dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
|
|
|
|
ret = -ENOENT;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2020-09-15 01:24:22 -06:00
|
|
|
policy->driver_data = data;
|
2018-12-13 21:10:24 -07:00
|
|
|
|
2020-09-15 01:24:22 -06:00
|
|
|
ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy);
|
2018-12-13 21:10:24 -07:00
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "Domain-%d failed to read LUT\n", index);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2019-01-31 10:32:50 -07:00
|
|
|
ret = dev_pm_opp_get_opp_count(cpu_dev);
|
|
|
|
if (ret <= 0) {
|
|
|
|
dev_err(cpu_dev, "Failed to add OPPs\n");
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2020-05-27 03:58:54 -06:00
|
|
|
dev_pm_opp_of_register_em(cpu_dev, policy->cpus);
|
2019-02-05 10:52:24 -07:00
|
|
|
|
2018-12-13 21:10:24 -07:00
|
|
|
return 0;
|
|
|
|
error:
|
|
|
|
devm_iounmap(dev, base);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy)
|
|
|
|
{
|
2019-01-31 10:32:50 -07:00
|
|
|
struct device *cpu_dev = get_cpu_device(policy->cpu);
|
2020-09-15 01:24:22 -06:00
|
|
|
struct qcom_cpufreq_data *data = policy->driver_data;
|
2020-09-08 01:57:12 -06:00
|
|
|
struct platform_device *pdev = cpufreq_get_driver_data();
|
2018-12-13 21:10:24 -07:00
|
|
|
|
2019-01-31 10:32:50 -07:00
|
|
|
dev_pm_opp_remove_all_dynamic(cpu_dev);
|
2020-06-22 02:16:48 -06:00
|
|
|
dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
|
2018-12-13 21:10:24 -07:00
|
|
|
kfree(policy->freq_table);
|
2020-09-15 01:24:22 -06:00
|
|
|
devm_iounmap(&pdev->dev, data->base);
|
2018-12-13 21:10:24 -07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct freq_attr *qcom_cpufreq_hw_attr[] = {
|
|
|
|
&cpufreq_freq_attr_scaling_available_freqs,
|
|
|
|
&cpufreq_freq_attr_scaling_boost_freqs,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct cpufreq_driver cpufreq_qcom_hw_driver = {
|
|
|
|
.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
2019-01-28 21:55:09 -07:00
|
|
|
CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
|
|
|
CPUFREQ_IS_COOLING_DEV,
|
2018-12-13 21:10:24 -07:00
|
|
|
.verify = cpufreq_generic_frequency_table_verify,
|
|
|
|
.target_index = qcom_cpufreq_hw_target_index,
|
|
|
|
.get = qcom_cpufreq_hw_get,
|
|
|
|
.init = qcom_cpufreq_hw_cpu_init,
|
|
|
|
.exit = qcom_cpufreq_hw_cpu_exit,
|
|
|
|
.fast_switch = qcom_cpufreq_hw_fast_switch,
|
|
|
|
.name = "qcom-cpufreq-hw",
|
|
|
|
.attr = qcom_cpufreq_hw_attr,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
|
|
|
|
{
|
2020-06-22 02:16:48 -06:00
|
|
|
struct device *cpu_dev;
|
2018-12-13 21:10:24 -07:00
|
|
|
struct clk *clk;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
clk = clk_get(&pdev->dev, "xo");
|
|
|
|
if (IS_ERR(clk))
|
|
|
|
return PTR_ERR(clk);
|
|
|
|
|
|
|
|
xo_rate = clk_get_rate(clk);
|
|
|
|
clk_put(clk);
|
|
|
|
|
|
|
|
clk = clk_get(&pdev->dev, "alternate");
|
|
|
|
if (IS_ERR(clk))
|
|
|
|
return PTR_ERR(clk);
|
|
|
|
|
|
|
|
cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV;
|
|
|
|
clk_put(clk);
|
|
|
|
|
2020-09-08 01:57:12 -06:00
|
|
|
cpufreq_qcom_hw_driver.driver_data = pdev;
|
2018-12-13 21:10:24 -07:00
|
|
|
|
2020-06-22 02:16:48 -06:00
|
|
|
/* Check for optional interconnect paths on CPU0 */
|
|
|
|
cpu_dev = get_cpu_device(0);
|
|
|
|
if (!cpu_dev)
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
|
|
|
ret = dev_pm_opp_of_find_icc_paths(cpu_dev, NULL);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2018-12-13 21:10:24 -07:00
|
|
|
ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
|
|
|
|
if (ret)
|
|
|
|
dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
|
|
|
|
else
|
|
|
|
dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n");
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver qcom_cpufreq_hw_driver = {
|
|
|
|
.probe = qcom_cpufreq_hw_driver_probe,
|
|
|
|
.remove = qcom_cpufreq_hw_driver_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "qcom-cpufreq-hw",
|
|
|
|
.of_match_table = qcom_cpufreq_hw_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init qcom_cpufreq_hw_init(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&qcom_cpufreq_hw_driver);
|
|
|
|
}
|
2019-10-21 06:15:15 -06:00
|
|
|
postcore_initcall(qcom_cpufreq_hw_init);
|
2018-12-13 21:10:24 -07:00
|
|
|
|
|
|
|
static void __exit qcom_cpufreq_hw_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&qcom_cpufreq_hw_driver);
|
|
|
|
}
|
|
|
|
module_exit(qcom_cpufreq_hw_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|