2012-10-15 06:35:39 -06:00
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* AM335x Starter Kit
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* http://www.ti.com/tool/tmdssk3358
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*/
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/dts-v1/;
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2013-06-03 08:12:22 -06:00
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#include "am33xx.dtsi"
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2013-07-17 16:54:24 -06:00
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#include <dt-bindings/pwm/pwm.h>
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2015-03-18 10:38:29 -06:00
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#include <dt-bindings/interrupt-controller/irq.h>
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2012-10-15 06:35:39 -06:00
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/ {
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model = "TI AM335x EVM-SK";
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compatible = "ti,am335x-evmsk", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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2016-08-31 04:35:30 -06:00
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memory@80000000 {
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2012-10-15 06:35:39 -06:00
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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2017-01-17 21:03:23 -07:00
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chosen {
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stdout-path = &uart0;
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};
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2016-08-01 10:46:58 -06:00
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vbat: fixedregulator0 {
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2012-10-15 06:35:39 -06:00
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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2016-08-01 10:46:58 -06:00
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lis3_reg: fixedregulator1 {
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2012-10-15 06:35:39 -06:00
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compatible = "regulator-fixed";
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regulator-name = "lis3_reg";
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regulator-boot-on;
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};
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2012-11-06 06:48:36 -07:00
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2016-08-01 10:46:58 -06:00
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wl12xx_vmmc: fixedregulator2 {
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2014-03-03 02:02:56 -07:00
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_gpio>;
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 29 0>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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2016-08-01 10:46:58 -06:00
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vtt_fixed: fixedregulator3 {
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2014-05-05 13:58:29 -06:00
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compatible = "regulator-fixed";
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regulator-name = "vtt";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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};
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2019-03-15 04:59:17 -06:00
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/* TPS79518 */
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v1_8d_reg: fixedregulator-v1_8d {
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compatible = "regulator-fixed";
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regulator-name = "v1_8d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* TPS78633 */
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v3_3d_reg: fixedregulator-v3_3d {
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compatible = "regulator-fixed";
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regulator-name = "v3_3d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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2012-11-06 06:48:36 -07:00
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leds {
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2013-03-26 04:12:15 -06:00
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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2012-11-06 06:48:36 -07:00
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compatible = "gpio-leds";
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2016-08-01 10:47:03 -06:00
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led1 {
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2012-11-06 06:48:36 -07:00
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label = "evmsk:green:usr0";
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:36 -07:00
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default-state = "off";
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};
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2016-08-01 10:47:03 -06:00
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led2 {
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2012-11-06 06:48:36 -07:00
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label = "evmsk:green:usr1";
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:36 -07:00
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default-state = "off";
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};
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2016-08-01 10:47:03 -06:00
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led3 {
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2012-11-06 06:48:36 -07:00
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label = "evmsk:green:mmc0";
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:36 -07:00
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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2016-08-01 10:47:03 -06:00
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led4 {
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2012-11-06 06:48:36 -07:00
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label = "evmsk:green:heartbeat";
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:36 -07:00
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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};
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2012-11-06 06:48:38 -07:00
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2016-08-01 10:47:01 -06:00
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gpio_buttons: gpio_buttons0 {
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2012-11-06 06:48:38 -07:00
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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2016-08-01 10:47:01 -06:00
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switch1 {
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2012-11-06 06:48:38 -07:00
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label = "button0";
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linux,code = <0x100>;
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:38 -07:00
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};
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2016-08-01 10:47:01 -06:00
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switch2 {
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2012-11-06 06:48:38 -07:00
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label = "button1";
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linux,code = <0x101>;
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:38 -07:00
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};
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2016-08-01 10:47:01 -06:00
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switch3 {
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2012-11-06 06:48:38 -07:00
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label = "button2";
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linux,code = <0x102>;
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
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2015-10-21 04:10:06 -06:00
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wakeup-source;
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2012-11-06 06:48:38 -07:00
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};
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2016-08-01 10:47:01 -06:00
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switch4 {
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2012-11-06 06:48:38 -07:00
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label = "button3";
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linux,code = <0x103>;
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2013-06-03 08:12:23 -06:00
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gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
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2012-11-06 06:48:38 -07:00
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};
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};
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2013-06-06 07:52:39 -06:00
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2018-05-08 04:04:33 -06:00
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lcd_bl: backlight {
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2013-06-06 07:52:39 -06:00
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compatible = "pwm-backlight";
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2013-07-17 16:54:24 -06:00
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pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
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2013-06-06 07:52:39 -06:00
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brightness-levels = <0 58 61 66 75 90 125 170 255>;
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default-brightness-level = <8>;
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};
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2013-10-20 11:04:11 -06:00
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sound {
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2015-07-02 08:06:31 -06:00
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compatible = "simple-audio-card";
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simple-audio-card,name = "AM335x-EVMSK";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT";
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simple-audio-card,format = "dsp_b";
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simple-audio-card,bitclock-master = <&sound_master>;
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simple-audio-card,frame-master = <&sound_master>;
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simple-audio-card,bitclock-inversion;
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simple-audio-card,cpu {
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sound-dai = <&mcasp1>;
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};
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sound_master: simple-audio-card,codec {
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sound-dai = <&tlv320aic3106>;
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system-clock-frequency = <24000000>;
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};
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2013-10-20 11:04:11 -06:00
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};
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2014-07-01 15:00:20 -06:00
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panel {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcd_pins_default>;
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pinctrl-1 = <&lcd_pins_sleep>;
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2018-05-08 04:04:33 -06:00
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backlight = <&lcd_bl>;
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2014-07-01 15:00:20 -06:00
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status = "okay";
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panel-info {
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2016-09-16 05:50:12 -06:00
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <32>;
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fdd = <0x80>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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2014-07-01 15:00:20 -06:00
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};
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display-timings {
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480x272 {
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2016-09-16 05:50:12 -06:00
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hactive = <480>;
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vactive = <272>;
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hback-porch = <43>;
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hfront-porch = <8>;
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hsync-len = <4>;
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vback-porch = <12>;
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vfront-porch = <4>;
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vsync-len = <10>;
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2014-07-01 15:00:20 -06:00
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clock-frequency = <9000000>;
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2016-09-16 05:50:12 -06:00
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hsync-active = <0>;
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vsync-active = <0>;
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2014-07-01 15:00:20 -06:00
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};
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};
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};
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2012-10-15 06:35:39 -06:00
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};
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2013-09-20 09:00:00 -06:00
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
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2014-07-01 15:00:20 -06:00
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lcd_pins_default: lcd_pins_default {
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pinctrl-single,pins = <
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2015-11-12 21:53:47 -07:00
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AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
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AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
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AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
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AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
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AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
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AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
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AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
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AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
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AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
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AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
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AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
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AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
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AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
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AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
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AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
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AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
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AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
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AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
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AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
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AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
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AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
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AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
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AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
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AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
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AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
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AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
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AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
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AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
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2014-07-01 15:00:20 -06:00
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>;
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};
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lcd_pins_sleep: lcd_pins_sleep {
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pinctrl-single,pins = <
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2015-11-12 21:53:47 -07:00
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|
AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
|
|
|
|
|
AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
|
|
|
|
|
AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
|
|
|
|
|
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
|
|
|
|
|
AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
|
|
|
|
|
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
|
|
|
|
|
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
|
|
|
|
|
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
|
|
|
|
|
AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
|
|
|
|
|
AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
|
|
|
|
|
AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
|
|
|
|
|
AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
|
|
|
|
|
AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
|
|
|
|
|
AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
|
|
|
|
|
AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
|
|
|
|
|
AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
|
|
|
|
|
AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
|
|
|
|
|
AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
|
|
|
|
|
AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
|
|
|
|
|
AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
|
|
|
|
|
AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
|
|
|
|
|
AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
|
|
|
|
|
AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
|
|
|
|
|
AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
|
|
|
|
|
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
|
|
|
|
|
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
|
|
|
|
|
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
|
|
|
|
|
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
2014-07-01 15:00:20 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
2013-09-20 09:00:00 -06:00
|
|
|
user_leds_s0: user_leds_s0 {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
|
|
|
|
|
AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
|
|
|
|
|
AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
|
|
|
|
|
AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio_keys_s0: gpio_keys_s0 {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
|
|
|
|
|
AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
|
|
|
|
|
AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
|
|
|
|
|
AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c0_pins: pinmux_i2c0_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
|
|
|
|
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
uart0_pins: pinmux_uart0_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
|
|
|
|
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
clkout2_pin: pinmux_clkout2_pin {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ecap2_pins: backlight_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
cpsw_default: cpsw_default {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* Slave 1 */
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
|
|
|
|
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
|
|
|
|
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
|
|
|
|
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
|
|
|
|
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
|
|
|
|
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
|
|
|
|
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
|
|
|
|
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
|
|
|
|
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
|
|
|
|
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
|
|
|
|
|
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
|
|
|
|
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
2013-09-20 09:00:00 -06:00
|
|
|
|
|
|
|
|
/* Slave 2 */
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
|
|
|
|
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
|
|
|
|
AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
|
|
|
|
AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
|
|
|
|
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
|
|
|
|
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
|
|
|
|
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
|
|
|
|
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
|
|
|
|
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
|
|
|
|
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
|
|
|
|
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
|
|
|
|
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
cpsw_sleep: cpsw_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* Slave 1 reset value */
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
2013-09-20 09:00:00 -06:00
|
|
|
|
|
|
|
|
/* Slave 2 reset value*/
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
davinci_mdio_default: davinci_mdio_default {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* MDIO */
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
|
|
|
|
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
davinci_mdio_sleep: davinci_mdio_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* MDIO reset value */
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
2013-09-20 09:00:00 -06:00
|
|
|
>;
|
|
|
|
|
};
|
2013-10-20 11:04:11 -06:00
|
|
|
|
2013-12-23 02:28:35 -07:00
|
|
|
mmc1_pins: pinmux_mmc1_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2018-04-11 05:48:24 -06:00
|
|
|
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
|
|
|
|
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
|
|
|
|
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
|
|
|
|
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
|
|
|
|
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
|
|
|
|
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
|
|
|
|
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
|
|
|
|
AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
|
2013-12-23 02:28:35 -07:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-10-20 11:04:11 -06:00
|
|
|
mcasp1_pins: mcasp1_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
|
|
|
|
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
|
|
|
|
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
|
|
|
|
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
2013-10-20 11:04:11 -06:00
|
|
|
>;
|
|
|
|
|
};
|
2014-03-03 02:02:56 -07:00
|
|
|
|
2015-07-02 08:06:30 -06:00
|
|
|
mcasp1_pins_sleep: mcasp1_pins_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
2015-07-02 08:06:30 -06:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
2014-03-03 02:02:56 -07:00
|
|
|
mmc2_pins: pinmux_mmc2_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
|
|
|
|
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
|
|
|
|
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
|
|
|
|
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
|
|
|
|
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
|
|
|
|
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
|
|
|
|
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
2014-03-03 02:02:56 -07:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
wl12xx_gpio: pinmux_wl12xx_gpio {
|
|
|
|
|
pinctrl-single,pins = <
|
2015-11-12 21:53:47 -07:00
|
|
|
AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
|
2014-03-03 02:02:56 -07:00
|
|
|
>;
|
|
|
|
|
};
|
2013-09-20 09:00:00 -06:00
|
|
|
};
|
|
|
|
|
|
2013-09-20 09:42:19 -06:00
|
|
|
&uart0 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&uart0_pins>;
|
|
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
tps: tps@2d {
|
|
|
|
|
reg = <0x2d>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lis331dlh: lis331dlh@18 {
|
|
|
|
|
compatible = "st,lis331dlh", "st,lis3lv02d";
|
|
|
|
|
reg = <0x18>;
|
|
|
|
|
Vdd-supply = <&lis3_reg>;
|
|
|
|
|
Vdd_IO-supply = <&lis3_reg>;
|
|
|
|
|
|
|
|
|
|
st,click-single-x;
|
|
|
|
|
st,click-single-y;
|
|
|
|
|
st,click-single-z;
|
|
|
|
|
st,click-thresh-x = <10>;
|
|
|
|
|
st,click-thresh-y = <10>;
|
|
|
|
|
st,click-thresh-z = <10>;
|
|
|
|
|
st,irq1-click;
|
|
|
|
|
st,irq2-click;
|
|
|
|
|
st,wakeup-x-lo;
|
|
|
|
|
st,wakeup-x-hi;
|
|
|
|
|
st,wakeup-y-lo;
|
|
|
|
|
st,wakeup-y-hi;
|
|
|
|
|
st,wakeup-z-lo;
|
|
|
|
|
st,wakeup-z-hi;
|
|
|
|
|
st,min-limit-x = <120>;
|
|
|
|
|
st,min-limit-y = <120>;
|
|
|
|
|
st,min-limit-z = <140>;
|
|
|
|
|
st,max-limit-x = <550>;
|
|
|
|
|
st,max-limit-y = <550>;
|
|
|
|
|
st,max-limit-z = <750>;
|
|
|
|
|
};
|
2013-10-20 11:04:11 -06:00
|
|
|
|
|
|
|
|
tlv320aic3106: tlv320aic3106@1b {
|
2015-07-02 08:06:31 -06:00
|
|
|
#sound-dai-cells = <0>;
|
2013-10-20 11:04:11 -06:00
|
|
|
compatible = "ti,tlv320aic3106";
|
|
|
|
|
reg = <0x1b>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
/* Regulators */
|
2019-03-15 04:59:17 -06:00
|
|
|
AVDD-supply = <&v3_3d_reg>;
|
|
|
|
|
IOVDD-supply = <&v3_3d_reg>;
|
|
|
|
|
DRVDD-supply = <&v3_3d_reg>;
|
|
|
|
|
DVDD-supply = <&v1_8d_reg>;
|
2013-10-20 11:04:11 -06:00
|
|
|
};
|
2013-09-20 09:42:19 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb {
|
|
|
|
|
status = "okay";
|
2014-04-28 14:54:34 -06:00
|
|
|
};
|
2013-09-20 09:42:19 -06:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&usb_ctrl_mod {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2013-09-20 09:42:19 -06:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&usb0_phy {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2013-09-20 09:42:19 -06:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&usb1_phy {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2014-02-28 00:19:04 -07:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&usb0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2014-02-28 00:19:04 -07:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&usb1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
dr_mode = "host";
|
|
|
|
|
};
|
2014-03-10 09:26:57 -06:00
|
|
|
|
2014-04-28 14:54:34 -06:00
|
|
|
&cppi41dma {
|
|
|
|
|
status = "okay";
|
2013-09-20 09:42:19 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&epwmss2 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
2018-12-10 14:43:11 -07:00
|
|
|
ecap2: ecap@100 {
|
2013-09-20 09:42:19 -06:00
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&ecap2_pins>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2013-06-03 08:12:22 -06:00
|
|
|
#include "tps65910.dtsi"
|
2012-10-15 06:35:39 -06:00
|
|
|
|
|
|
|
|
&tps {
|
|
|
|
|
vcc1-supply = <&vbat>;
|
|
|
|
|
vcc2-supply = <&vbat>;
|
|
|
|
|
vcc3-supply = <&vbat>;
|
|
|
|
|
vcc4-supply = <&vbat>;
|
|
|
|
|
vcc5-supply = <&vbat>;
|
|
|
|
|
vcc6-supply = <&vbat>;
|
|
|
|
|
vcc7-supply = <&vbat>;
|
|
|
|
|
vccio-supply = <&vbat>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
vrtc_reg: regulator@0 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vio_reg: regulator@1 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd1_reg: regulator@2 {
|
|
|
|
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
|
|
|
|
regulator-name = "vdd_mpu";
|
|
|
|
|
regulator-min-microvolt = <912500>;
|
2016-05-18 17:36:26 -06:00
|
|
|
regulator-max-microvolt = <1351500>;
|
2012-10-15 06:35:39 -06:00
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd2_reg: regulator@3 {
|
|
|
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
|
|
|
|
regulator-name = "vdd_core";
|
|
|
|
|
regulator-min-microvolt = <912500>;
|
|
|
|
|
regulator-max-microvolt = <1150000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd3_reg: regulator@4 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdig1_reg: regulator@5 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdig2_reg: regulator@6 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vpll_reg: regulator@7 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdac_reg: regulator@8 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux1_reg: regulator@9 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux2_reg: regulator@10 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux33_reg: regulator@11 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vmmc_reg: regulator@12 {
|
2013-09-10 13:24:39 -06:00
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
2012-10-15 06:35:39 -06:00
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
2013-06-07 05:32:53 -06:00
|
|
|
|
|
|
|
|
&mac {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&cpsw_default>;
|
|
|
|
|
pinctrl-1 = <&cpsw_sleep>;
|
2014-03-05 00:29:19 -07:00
|
|
|
dual_emac = <1>;
|
2014-05-08 02:57:36 -06:00
|
|
|
status = "okay";
|
2013-06-07 05:32:53 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&davinci_mdio {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
|
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
2014-05-08 02:57:36 -06:00
|
|
|
status = "okay";
|
2018-09-08 18:05:05 -06:00
|
|
|
|
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
|
|
|
reg = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ethphy1: ethernet-phy@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
};
|
2013-06-07 05:32:53 -06:00
|
|
|
};
|
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
"This is a re-do of the net-next pull request for the current merge
window. The only difference from the one I made the other day is that
this has Eliezer's interface renames and the timeout handling changes
made based upon your feedback, as well as a few bug fixes that have
trickeled in.
Highlights:
1) Low latency device polling, eliminating the cost of interrupt
handling and context switches. Allows direct polling of a network
device from socket operations, such as recvmsg() and poll().
Currently ixgbe, mlx4, and bnx2x support this feature.
Full high level description, performance numbers, and design in
commit 0a4db187a999 ("Merge branch 'll_poll'")
From Eliezer Tamir.
2) With the routing cache removed, ip_check_mc_rcu() gets exercised
more than ever before in the case where we have lots of multicast
addresses. Use a hash table instead of a simple linked list, from
Eric Dumazet.
3) Add driver for Atheros CQA98xx 802.11ac wireless devices, from
Bartosz Markowski, Janusz Dziedzic, Kalle Valo, Marek Kwaczynski,
Marek Puzyniak, Michal Kazior, and Sujith Manoharan.
4) Support reporting the TUN device persist flag to userspace, from
Pavel Emelyanov.
5) Allow controlling network device VF link state using netlink, from
Rony Efraim.
6) Support GRE tunneling in openvswitch, from Pravin B Shelar.
7) Adjust SOCK_MIN_RCVBUF and SOCK_MIN_SNDBUF for modern times, from
Daniel Borkmann and Eric Dumazet.
8) Allow controlling of TCP quickack behavior on a per-route basis,
from Cong Wang.
9) Several bug fixes and improvements to vxlan from Stephen
Hemminger, Pravin B Shelar, and Mike Rapoport. In particular,
support receiving on multiple UDP ports.
10) Major cleanups, particular in the area of debugging and cookie
lifetime handline, to the SCTP protocol code. From Daniel
Borkmann.
11) Allow packets to cross network namespaces when traversing tunnel
devices. From Nicolas Dichtel.
12) Allow monitoring netlink traffic via AF_PACKET sockets, in a
manner akin to how we monitor real network traffic via ptype_all.
From Daniel Borkmann.
13) Several bug fixes and improvements for the new alx device driver,
from Johannes Berg.
14) Fix scalability issues in the netem packet scheduler's time queue,
by using an rbtree. From Eric Dumazet.
15) Several bug fixes in TCP loss recovery handling, from Yuchung
Cheng.
16) Add support for GSO segmentation of MPLS packets, from Simon
Horman.
17) Make network notifiers have a real data type for the opaque
pointer that's passed into them. Use this to properly handle
network device flag changes in arp_netdev_event(). From Jiri
Pirko and Timo Teräs.
18) Convert several drivers over to module_pci_driver(), from Peter
Huewe.
19) tcp_fixup_rcvbuf() can loop 500 times over loopback, just use a
O(1) calculation instead. From Eric Dumazet.
20) Support setting of explicit tunnel peer addresses in ipv6, just
like ipv4. From Nicolas Dichtel.
21) Protect x86 BPF JIT against spraying attacks, from Eric Dumazet.
22) Prevent a single high rate flow from overruning an individual cpu
during RX packet processing via selective flow shedding. From
Willem de Bruijn.
23) Don't use spinlocks in TCP md5 signing fast paths, from Eric
Dumazet.
24) Don't just drop GSO packets which are above the TBF scheduler's
burst limit, chop them up so they are in-bounds instead. Also
from Eric Dumazet.
25) VLAN offloads are missed when configured on top of a bridge, fix
from Vlad Yasevich.
26) Support IPV6 in ping sockets. From Lorenzo Colitti.
27) Receive flow steering targets should be updated at poll() time
too, from David Majnemer.
28) Fix several corner case regressions in PMTU/redirect handling due
to the routing cache removal, from Timo Teräs.
29) We have to be mindful of ipv4 mapped ipv6 sockets in
upd_v6_push_pending_frames(). From Hannes Frederic Sowa.
30) Fix L2TP sequence number handling bugs, from James Chapman."
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1214 commits)
drivers/net: caif: fix wrong rtnl_is_locked() usage
drivers/net: enic: release rtnl_lock on error-path
vhost-net: fix use-after-free in vhost_net_flush
net: mv643xx_eth: do not use port number as platform device id
net: sctp: confirm route during forward progress
virtio_net: fix race in RX VQ processing
virtio: support unlocked queue poll
net/cadence/macb: fix bug/typo in extracting gem_irq_read_clear bit
Documentation: Fix references to defunct linux-net@vger.kernel.org
net/fs: change busy poll time accounting
net: rename low latency sockets functions to busy poll
bridge: fix some kernel warning in multicast timer
sfc: Fix memory leak when discarding scattered packets
sit: fix tunnel update via netlink
dt:net:stmmac: Add dt specific phy reset callback support.
dt:net:stmmac: Add support to dwmac version 3.610 and 3.710
dt:net:stmmac: Allocate platform data only if its NULL.
net:stmmac: fix memleak in the open method
ipv6: rt6_check_neigh should successfully verify neigh if no NUD information are available
net: ipv6: fix wrong ping_v6_sendmsg return value
...
2013-07-09 19:24:39 -06:00
|
|
|
|
2013-06-03 14:10:09 -06:00
|
|
|
&cpsw_emac0 {
|
2018-09-08 18:05:05 -06:00
|
|
|
phy-handle = <ðphy0>;
|
2019-02-19 09:46:32 -07:00
|
|
|
phy-mode = "rgmii-id";
|
2014-03-05 00:29:19 -07:00
|
|
|
dual_emac_res_vlan = <1>;
|
2013-06-03 14:10:09 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&cpsw_emac1 {
|
2018-09-08 18:05:05 -06:00
|
|
|
phy-handle = <ðphy1>;
|
2019-02-19 09:46:32 -07:00
|
|
|
phy-mode = "rgmii-id";
|
2014-03-05 00:29:19 -07:00
|
|
|
dual_emac_res_vlan = <2>;
|
2013-06-03 14:10:09 -06:00
|
|
|
};
|
2013-09-10 13:24:39 -06:00
|
|
|
|
|
|
|
|
&mmc1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
vmmc-supply = <&vmmc_reg>;
|
2013-09-27 05:35:10 -06:00
|
|
|
bus-width = <4>;
|
2013-12-23 02:28:35 -07:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&mmc1_pins>;
|
2015-10-12 03:07:10 -06:00
|
|
|
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
2013-09-10 13:24:39 -06:00
|
|
|
};
|
2013-08-23 15:12:35 -06:00
|
|
|
|
|
|
|
|
&sham {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2013-08-23 15:12:36 -06:00
|
|
|
|
|
|
|
|
&aes {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2013-10-09 04:12:01 -06:00
|
|
|
|
|
|
|
|
&gpio0 {
|
|
|
|
|
ti,no-reset-on-init;
|
|
|
|
|
};
|
2013-10-20 11:04:11 -06:00
|
|
|
|
2014-03-03 02:02:56 -07:00
|
|
|
&mmc2 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
vmmc-supply = <&wl12xx_vmmc>;
|
|
|
|
|
ti,non-removable;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
cap-power-off-card;
|
2017-03-26 02:53:10 -06:00
|
|
|
keep-power-in-suspend;
|
2014-03-03 02:02:56 -07:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&mmc2_pins>;
|
2015-03-18 10:38:29 -06:00
|
|
|
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
wlcore: wlcore@2 {
|
|
|
|
|
compatible = "ti,wl1271";
|
|
|
|
|
reg = <2>;
|
2015-05-20 11:00:10 -06:00
|
|
|
interrupt-parent = <&gpio0>;
|
2018-07-03 00:57:20 -06:00
|
|
|
interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */
|
2015-03-18 10:38:29 -06:00
|
|
|
ref-clock-frequency = <38400000>;
|
|
|
|
|
};
|
2014-03-03 02:02:56 -07:00
|
|
|
};
|
|
|
|
|
|
2013-10-20 11:04:11 -06:00
|
|
|
&mcasp1 {
|
2015-07-02 08:06:31 -06:00
|
|
|
#sound-dai-cells = <0>;
|
2015-07-02 08:06:30 -06:00
|
|
|
pinctrl-names = "default", "sleep";
|
2015-07-02 08:06:29 -06:00
|
|
|
pinctrl-0 = <&mcasp1_pins>;
|
2015-07-02 08:06:30 -06:00
|
|
|
pinctrl-1 = <&mcasp1_pins_sleep>;
|
2013-10-20 11:04:11 -06:00
|
|
|
|
2015-07-02 08:06:29 -06:00
|
|
|
status = "okay";
|
2013-10-20 11:04:11 -06:00
|
|
|
|
2015-07-02 08:06:29 -06:00
|
|
|
op-mode = <0>; /* MCASP_IIS_MODE */
|
|
|
|
|
tdm-slots = <2>;
|
|
|
|
|
/* 4 serializers */
|
|
|
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
|
|
|
0 0 1 2
|
|
|
|
|
>;
|
|
|
|
|
tx-num-evt = <32>;
|
|
|
|
|
rx-num-evt = <32>;
|
2013-10-20 11:04:11 -06:00
|
|
|
};
|
2013-11-15 17:43:53 -07:00
|
|
|
|
2013-11-11 00:58:31 -07:00
|
|
|
&tscadc {
|
|
|
|
|
status = "okay";
|
|
|
|
|
tsc {
|
|
|
|
|
ti,wires = <4>;
|
|
|
|
|
ti,x-plate-resistance = <200>;
|
|
|
|
|
ti,coordinate-readouts = <5>;
|
|
|
|
|
ti,wire-config = <0x00 0x11 0x22 0x33>;
|
|
|
|
|
};
|
|
|
|
|
};
|
2014-07-01 15:00:20 -06:00
|
|
|
|
|
|
|
|
&lcdc {
|
2016-09-16 05:50:12 -06:00
|
|
|
status = "okay";
|
2016-09-16 05:50:13 -06:00
|
|
|
|
|
|
|
|
blue-and-red-wiring = "crossed";
|
2014-07-01 15:00:20 -06:00
|
|
|
};
|
2016-10-26 23:48:08 -06:00
|
|
|
|
|
|
|
|
&rtc {
|
2018-08-31 09:14:49 -06:00
|
|
|
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
|
2016-10-26 23:48:08 -06:00
|
|
|
clock-names = "ext-clk", "int-clk";
|
|
|
|
|
};
|