2010-02-25 17:09:45 -07:00
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/*
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* Performance event support - Freescale Embedded Performance Monitor
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*
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* Copyright 2008-2009 Paul Mackerras, IBM Corporation.
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* Copyright 2010 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/perf_event.h>
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#include <linux/percpu.h>
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#include <linux/hardirq.h>
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#include <asm/reg_fsl_emb.h>
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#include <asm/pmc.h>
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/ptrace.h>
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struct cpu_hw_events {
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int n_events;
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int disabled;
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u8 pmcs_enabled;
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struct perf_event *event[MAX_HWEVENTS];
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};
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static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
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static struct fsl_emb_pmu *ppmu;
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/* Number of perf_events counting hardware events */
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static atomic_t num_events;
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/* Used to avoid races in calling reserve/release_pmc_hardware */
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static DEFINE_MUTEX(pmc_reserve_mutex);
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/*
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* If interrupts were soft-disabled when a PMU interrupt occurs, treat
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* it as an NMI.
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*/
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static inline int perf_intr_is_nmi(struct pt_regs *regs)
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{
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#ifdef __powerpc64__
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return !regs->softe;
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#else
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return 0;
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#endif
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}
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static void perf_event_interrupt(struct pt_regs *regs);
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/*
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* Read one performance monitor counter (PMC).
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*/
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static unsigned long read_pmc(int idx)
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{
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unsigned long val;
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switch (idx) {
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case 0:
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val = mfpmr(PMRN_PMC0);
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break;
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case 1:
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val = mfpmr(PMRN_PMC1);
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break;
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case 2:
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val = mfpmr(PMRN_PMC2);
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break;
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case 3:
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val = mfpmr(PMRN_PMC3);
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break;
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2013-06-05 14:22:09 -06:00
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case 4:
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val = mfpmr(PMRN_PMC4);
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break;
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case 5:
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val = mfpmr(PMRN_PMC5);
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break;
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2010-02-25 17:09:45 -07:00
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default:
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printk(KERN_ERR "oops trying to read PMC%d\n", idx);
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val = 0;
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}
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return val;
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}
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/*
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* Write one PMC.
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*/
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static void write_pmc(int idx, unsigned long val)
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{
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switch (idx) {
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case 0:
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mtpmr(PMRN_PMC0, val);
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break;
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case 1:
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mtpmr(PMRN_PMC1, val);
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break;
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case 2:
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mtpmr(PMRN_PMC2, val);
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break;
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case 3:
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mtpmr(PMRN_PMC3, val);
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break;
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2013-06-05 14:22:09 -06:00
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case 4:
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mtpmr(PMRN_PMC4, val);
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break;
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case 5:
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mtpmr(PMRN_PMC5, val);
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break;
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2010-02-25 17:09:45 -07:00
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default:
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printk(KERN_ERR "oops trying to write PMC%d\n", idx);
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}
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isync();
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}
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/*
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* Write one local control A register
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*/
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static void write_pmlca(int idx, unsigned long val)
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{
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switch (idx) {
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case 0:
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mtpmr(PMRN_PMLCA0, val);
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break;
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case 1:
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mtpmr(PMRN_PMLCA1, val);
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break;
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case 2:
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mtpmr(PMRN_PMLCA2, val);
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break;
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case 3:
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mtpmr(PMRN_PMLCA3, val);
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break;
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2013-06-05 14:22:09 -06:00
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case 4:
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mtpmr(PMRN_PMLCA4, val);
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break;
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case 5:
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mtpmr(PMRN_PMLCA5, val);
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break;
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2010-02-25 17:09:45 -07:00
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default:
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printk(KERN_ERR "oops trying to write PMLCA%d\n", idx);
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}
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isync();
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}
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/*
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* Write one local control B register
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*/
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static void write_pmlcb(int idx, unsigned long val)
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{
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switch (idx) {
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case 0:
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mtpmr(PMRN_PMLCB0, val);
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break;
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case 1:
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mtpmr(PMRN_PMLCB1, val);
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break;
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case 2:
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mtpmr(PMRN_PMLCB2, val);
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break;
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case 3:
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mtpmr(PMRN_PMLCB3, val);
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break;
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2013-06-05 14:22:09 -06:00
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case 4:
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mtpmr(PMRN_PMLCB4, val);
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break;
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case 5:
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mtpmr(PMRN_PMLCB5, val);
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break;
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2010-02-25 17:09:45 -07:00
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default:
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printk(KERN_ERR "oops trying to write PMLCB%d\n", idx);
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}
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isync();
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}
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static void fsl_emb_pmu_read(struct perf_event *event)
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{
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s64 val, delta, prev;
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perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
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if (event->hw.state & PERF_HES_STOPPED)
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return;
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2010-02-25 17:09:45 -07:00
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/*
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* Performance monitor interrupts come even when interrupts
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* are soft-disabled, as long as interrupts are hard-enabled.
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* Therefore we treat them like NMIs.
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*/
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do {
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2010-07-09 02:21:22 -06:00
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prev = local64_read(&event->hw.prev_count);
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2010-02-25 17:09:45 -07:00
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barrier();
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val = read_pmc(event->hw.idx);
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2010-07-09 02:21:22 -06:00
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} while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
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2010-02-25 17:09:45 -07:00
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/* The counters are only 32 bits wide */
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delta = (val - prev) & 0xfffffffful;
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2010-07-09 02:21:22 -06:00
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local64_add(delta, &event->count);
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local64_sub(delta, &event->hw.period_left);
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2010-02-25 17:09:45 -07:00
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}
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/*
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* Disable all events to prevent PMU interrupts and to allow
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* events to be added or removed.
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*/
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perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
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static void fsl_emb_pmu_disable(struct pmu *pmu)
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2010-02-25 17:09:45 -07:00
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{
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struct cpu_hw_events *cpuhw;
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unsigned long flags;
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local_irq_save(flags);
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powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 14:23:25 -06:00
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cpuhw = this_cpu_ptr(&cpu_hw_events);
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2010-02-25 17:09:45 -07:00
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if (!cpuhw->disabled) {
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cpuhw->disabled = 1;
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/*
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* Check if we ever enabled the PMU on this cpu.
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*/
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if (!cpuhw->pmcs_enabled) {
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ppc_enable_pmcs();
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cpuhw->pmcs_enabled = 1;
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}
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if (atomic_read(&num_events)) {
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/*
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* Set the 'freeze all counters' bit, and disable
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* interrupts. The barrier is to make sure the
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* mtpmr has been executed and the PMU has frozen
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* the events before we return.
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*/
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mtpmr(PMRN_PMGC0, PMGC0_FAC);
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isync();
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}
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}
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local_irq_restore(flags);
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}
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/*
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* Re-enable all events if disable == 0.
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* If we were previously disabled and events were added, then
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* put the new config on the PMU.
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*/
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void fsl_emb_pmu_enable(struct pmu *pmu)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
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|
|
|
struct cpu_hw_events *cpuhw;
|
|
|
|
unsigned long flags;
|
|
|
|
|
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|
|
local_irq_save(flags);
|
powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 14:23:25 -06:00
|
|
|
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
2010-02-25 17:09:45 -07:00
|
|
|
if (!cpuhw->disabled)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
cpuhw->disabled = 0;
|
|
|
|
ppc_set_pmu_inuse(cpuhw->n_events != 0);
|
|
|
|
|
|
|
|
if (cpuhw->n_events > 0) {
|
|
|
|
mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
|
|
|
|
isync();
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int collect_events(struct perf_event *group, int max_count,
|
|
|
|
struct perf_event *ctrs[])
|
|
|
|
{
|
|
|
|
int n = 0;
|
|
|
|
struct perf_event *event;
|
|
|
|
|
|
|
|
if (!is_software_event(group)) {
|
|
|
|
if (n >= max_count)
|
|
|
|
return -1;
|
|
|
|
ctrs[n] = group;
|
|
|
|
n++;
|
|
|
|
}
|
|
|
|
list_for_each_entry(event, &group->sibling_list, group_entry) {
|
|
|
|
if (!is_software_event(event) &&
|
|
|
|
event->state != PERF_EVENT_STATE_OFF) {
|
|
|
|
if (n >= max_count)
|
|
|
|
return -1;
|
|
|
|
ctrs[n] = event;
|
|
|
|
n++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return n;
|
|
|
|
}
|
|
|
|
|
2010-06-11 09:32:03 -06:00
|
|
|
/* context locked on entry */
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static int fsl_emb_pmu_add(struct perf_event *event, int flags)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
|
|
|
|
struct cpu_hw_events *cpuhw;
|
|
|
|
int ret = -EAGAIN;
|
|
|
|
int num_counters = ppmu->n_counter;
|
|
|
|
u64 val;
|
|
|
|
int i;
|
|
|
|
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_disable(event->pmu);
|
2010-02-25 17:09:45 -07:00
|
|
|
cpuhw = &get_cpu_var(cpu_hw_events);
|
|
|
|
|
|
|
|
if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
|
|
|
|
num_counters = ppmu->n_restricted;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocate counters from top-down, so that restricted-capable
|
|
|
|
* counters are kept free as long as possible.
|
|
|
|
*/
|
|
|
|
for (i = num_counters - 1; i >= 0; i--) {
|
|
|
|
if (cpuhw->event[i])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
event->hw.idx = i;
|
|
|
|
cpuhw->event[i] = event;
|
|
|
|
++cpuhw->n_events;
|
|
|
|
|
|
|
|
val = 0;
|
|
|
|
if (event->hw.sample_period) {
|
2010-07-09 02:21:22 -06:00
|
|
|
s64 left = local64_read(&event->hw.period_left);
|
2010-02-25 17:09:45 -07:00
|
|
|
if (left < 0x80000000L)
|
|
|
|
val = 0x80000000L - left;
|
|
|
|
}
|
2010-07-09 02:21:22 -06:00
|
|
|
local64_set(&event->hw.prev_count, val);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
|
|
|
|
if (!(flags & PERF_EF_START)) {
|
|
|
|
event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
|
|
|
val = 0;
|
|
|
|
}
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
write_pmc(i, val);
|
|
|
|
perf_event_update_userpage(event);
|
|
|
|
|
|
|
|
write_pmlcb(i, event->hw.config >> 32);
|
|
|
|
write_pmlca(i, event->hw.config_base);
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
out:
|
|
|
|
put_cpu_var(cpu_hw_events);
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_enable(event->pmu);
|
2010-02-25 17:09:45 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-06-11 09:32:03 -06:00
|
|
|
/* context locked on entry */
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void fsl_emb_pmu_del(struct perf_event *event, int flags)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
|
|
|
|
struct cpu_hw_events *cpuhw;
|
|
|
|
int i = event->hw.idx;
|
|
|
|
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_disable(event->pmu);
|
2010-02-25 17:09:45 -07:00
|
|
|
if (i < 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
fsl_emb_pmu_read(event);
|
|
|
|
|
|
|
|
cpuhw = &get_cpu_var(cpu_hw_events);
|
|
|
|
|
|
|
|
WARN_ON(event != cpuhw->event[event->hw.idx]);
|
|
|
|
|
|
|
|
write_pmlca(i, 0);
|
|
|
|
write_pmlcb(i, 0);
|
|
|
|
write_pmc(i, 0);
|
|
|
|
|
|
|
|
cpuhw->event[i] = NULL;
|
|
|
|
event->hw.idx = -1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* TODO: if at least one restricted event exists, and we
|
|
|
|
* just freed up a non-restricted-capable counter, and
|
|
|
|
* there is a restricted-capable counter occupied by
|
|
|
|
* a non-restricted event, migrate that event to the
|
|
|
|
* vacated counter.
|
|
|
|
*/
|
|
|
|
|
|
|
|
cpuhw->n_events--;
|
|
|
|
|
|
|
|
out:
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_enable(event->pmu);
|
2010-02-25 17:09:45 -07:00
|
|
|
put_cpu_var(cpu_hw_events);
|
|
|
|
}
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
2015-01-20 15:19:50 -07:00
|
|
|
unsigned long val;
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
s64 left;
|
|
|
|
|
|
|
|
if (event->hw.idx < 0 || !event->hw.sample_period)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!(event->hw.state & PERF_HES_STOPPED))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (ef_flags & PERF_EF_RELOAD)
|
|
|
|
WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE));
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
perf_pmu_disable(event->pmu);
|
|
|
|
|
|
|
|
event->hw.state = 0;
|
|
|
|
left = local64_read(&event->hw.period_left);
|
2015-01-20 15:19:50 -07:00
|
|
|
val = 0;
|
|
|
|
if (left < 0x80000000L)
|
|
|
|
val = 0x80000000L - left;
|
|
|
|
write_pmc(event->hw.idx, val);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
|
|
|
|
perf_event_update_userpage(event);
|
|
|
|
perf_pmu_enable(event->pmu);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fsl_emb_pmu_stop(struct perf_event *event, int ef_flags)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (event->hw.idx < 0 || !event->hw.sample_period)
|
|
|
|
return;
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
|
|
|
|
if (event->hw.state & PERF_HES_STOPPED)
|
|
|
|
return;
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
local_irq_save(flags);
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_disable(event->pmu);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
fsl_emb_pmu_read(event);
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
event->hw.state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
|
|
|
write_pmc(event->hw.idx, 0);
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
perf_event_update_userpage(event);
|
2010-06-14 00:49:00 -06:00
|
|
|
perf_pmu_enable(event->pmu);
|
2010-02-25 17:09:45 -07:00
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Release the PMU if this is the last perf_event.
|
|
|
|
*/
|
|
|
|
static void hw_perf_event_destroy(struct perf_event *event)
|
|
|
|
{
|
|
|
|
if (!atomic_add_unless(&num_events, -1, 1)) {
|
|
|
|
mutex_lock(&pmc_reserve_mutex);
|
|
|
|
if (atomic_dec_return(&num_events) == 0)
|
|
|
|
release_pmc_hardware();
|
|
|
|
mutex_unlock(&pmc_reserve_mutex);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Translate a generic cache event_id config to a raw event_id code.
|
|
|
|
*/
|
|
|
|
static int hw_perf_cache_event(u64 config, u64 *eventp)
|
|
|
|
{
|
|
|
|
unsigned long type, op, result;
|
|
|
|
int ev;
|
|
|
|
|
|
|
|
if (!ppmu->cache_events)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* unpack config */
|
|
|
|
type = config & 0xff;
|
|
|
|
op = (config >> 8) & 0xff;
|
|
|
|
result = (config >> 16) & 0xff;
|
|
|
|
|
|
|
|
if (type >= PERF_COUNT_HW_CACHE_MAX ||
|
|
|
|
op >= PERF_COUNT_HW_CACHE_OP_MAX ||
|
|
|
|
result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ev = (*ppmu->cache_events)[type][op][result];
|
|
|
|
if (ev == 0)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
if (ev == -1)
|
|
|
|
return -EINVAL;
|
|
|
|
*eventp = ev;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-06-11 05:35:08 -06:00
|
|
|
static int fsl_emb_pmu_event_init(struct perf_event *event)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
|
|
|
|
u64 ev;
|
|
|
|
struct perf_event *events[MAX_HWEVENTS];
|
|
|
|
int n;
|
|
|
|
int err;
|
|
|
|
int num_restricted;
|
|
|
|
int i;
|
|
|
|
|
2013-06-05 14:22:08 -06:00
|
|
|
if (ppmu->n_counter > MAX_HWEVENTS) {
|
|
|
|
WARN(1, "No. of perf counters (%d) is higher than max array size(%d)\n",
|
|
|
|
ppmu->n_counter, MAX_HWEVENTS);
|
|
|
|
ppmu->n_counter = MAX_HWEVENTS;
|
|
|
|
}
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
switch (event->attr.type) {
|
|
|
|
case PERF_TYPE_HARDWARE:
|
|
|
|
ev = event->attr.config;
|
|
|
|
if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
|
2010-06-11 05:35:08 -06:00
|
|
|
return -EOPNOTSUPP;
|
2010-02-25 17:09:45 -07:00
|
|
|
ev = ppmu->generic_events[ev];
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PERF_TYPE_HW_CACHE:
|
|
|
|
err = hw_perf_cache_event(event->attr.config, &ev);
|
|
|
|
if (err)
|
2010-06-11 05:35:08 -06:00
|
|
|
return err;
|
2010-02-25 17:09:45 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case PERF_TYPE_RAW:
|
|
|
|
ev = event->attr.config;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2010-06-11 05:35:08 -06:00
|
|
|
return -ENOENT;
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
event->hw.config = ppmu->xlate_event(ev);
|
|
|
|
if (!(event->hw.config & FSL_EMB_EVENT_VALID))
|
2010-06-11 05:35:08 -06:00
|
|
|
return -EINVAL;
|
2010-02-25 17:09:45 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If this is in a group, check if it can go on with all the
|
|
|
|
* other hardware events in the group. We assume the event
|
|
|
|
* hasn't been linked into its leader's sibling list at this point.
|
|
|
|
*/
|
|
|
|
n = 0;
|
|
|
|
if (event->group_leader != event) {
|
|
|
|
n = collect_events(event->group_leader,
|
|
|
|
ppmu->n_counter - 1, events);
|
|
|
|
if (n < 0)
|
2010-06-11 05:35:08 -06:00
|
|
|
return -EINVAL;
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {
|
|
|
|
num_restricted = 0;
|
|
|
|
for (i = 0; i < n; i++) {
|
|
|
|
if (events[i]->hw.config & FSL_EMB_EVENT_RESTRICTED)
|
|
|
|
num_restricted++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (num_restricted >= ppmu->n_restricted)
|
2010-06-11 05:35:08 -06:00
|
|
|
return -EINVAL;
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
event->hw.idx = -1;
|
|
|
|
|
|
|
|
event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |
|
|
|
|
(u32)((ev << 16) & PMLCA_EVENT_MASK);
|
|
|
|
|
|
|
|
if (event->attr.exclude_user)
|
|
|
|
event->hw.config_base |= PMLCA_FCU;
|
|
|
|
if (event->attr.exclude_kernel)
|
|
|
|
event->hw.config_base |= PMLCA_FCS;
|
|
|
|
if (event->attr.exclude_idle)
|
2010-06-11 05:35:08 -06:00
|
|
|
return -ENOTSUPP;
|
2010-02-25 17:09:45 -07:00
|
|
|
|
|
|
|
event->hw.last_period = event->hw.sample_period;
|
2010-07-09 02:21:22 -06:00
|
|
|
local64_set(&event->hw.period_left, event->hw.last_period);
|
2010-02-25 17:09:45 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* See if we need to reserve the PMU.
|
|
|
|
* If no events are currently in use, then we have to take a
|
|
|
|
* mutex to ensure that we don't race with another task doing
|
|
|
|
* reserve_pmc_hardware or release_pmc_hardware.
|
|
|
|
*/
|
|
|
|
err = 0;
|
|
|
|
if (!atomic_inc_not_zero(&num_events)) {
|
|
|
|
mutex_lock(&pmc_reserve_mutex);
|
|
|
|
if (atomic_read(&num_events) == 0 &&
|
|
|
|
reserve_pmc_hardware(perf_event_interrupt))
|
|
|
|
err = -EBUSY;
|
|
|
|
else
|
|
|
|
atomic_inc(&num_events);
|
|
|
|
mutex_unlock(&pmc_reserve_mutex);
|
|
|
|
|
|
|
|
mtpmr(PMRN_PMGC0, PMGC0_FAC);
|
|
|
|
isync();
|
|
|
|
}
|
|
|
|
event->destroy = hw_perf_event_destroy;
|
|
|
|
|
2010-06-11 05:35:08 -06:00
|
|
|
return err;
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
|
2010-06-11 05:35:08 -06:00
|
|
|
static struct pmu fsl_emb_pmu = {
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
.pmu_enable = fsl_emb_pmu_enable,
|
|
|
|
.pmu_disable = fsl_emb_pmu_disable,
|
2010-06-11 05:35:08 -06:00
|
|
|
.event_init = fsl_emb_pmu_event_init,
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
.add = fsl_emb_pmu_add,
|
|
|
|
.del = fsl_emb_pmu_del,
|
|
|
|
.start = fsl_emb_pmu_start,
|
|
|
|
.stop = fsl_emb_pmu_stop,
|
2010-06-11 05:35:08 -06:00
|
|
|
.read = fsl_emb_pmu_read,
|
|
|
|
};
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
/*
|
|
|
|
* A counter has overflowed; update its count and record
|
|
|
|
* things if requested. Note that interrupts are hard-disabled
|
|
|
|
* here so there is no possibility of being interrupted.
|
|
|
|
*/
|
|
|
|
static void record_and_restart(struct perf_event *event, unsigned long val,
|
2011-06-27 06:41:57 -06:00
|
|
|
struct pt_regs *regs)
|
2010-02-25 17:09:45 -07:00
|
|
|
{
|
|
|
|
u64 period = event->hw.sample_period;
|
|
|
|
s64 prev, delta, left;
|
|
|
|
int record = 0;
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
if (event->hw.state & PERF_HES_STOPPED) {
|
|
|
|
write_pmc(event->hw.idx, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
/* we don't have to worry about interrupts here */
|
2010-07-09 02:21:22 -06:00
|
|
|
prev = local64_read(&event->hw.prev_count);
|
2010-02-25 17:09:45 -07:00
|
|
|
delta = (val - prev) & 0xfffffffful;
|
2010-07-09 02:21:22 -06:00
|
|
|
local64_add(delta, &event->count);
|
2010-02-25 17:09:45 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* See if the total period for this event has expired,
|
|
|
|
* and update for the next period.
|
|
|
|
*/
|
|
|
|
val = 0;
|
2010-07-09 02:21:22 -06:00
|
|
|
left = local64_read(&event->hw.period_left) - delta;
|
2010-02-25 17:09:45 -07:00
|
|
|
if (period) {
|
|
|
|
if (left <= 0) {
|
|
|
|
left += period;
|
|
|
|
if (left <= 0)
|
|
|
|
left = period;
|
|
|
|
record = 1;
|
2011-01-18 03:44:04 -07:00
|
|
|
event->hw.last_period = event->hw.sample_period;
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
if (left < 0x80000000LL)
|
|
|
|
val = 0x80000000LL - left;
|
|
|
|
}
|
|
|
|
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
write_pmc(event->hw.idx, val);
|
|
|
|
local64_set(&event->hw.prev_count, val);
|
|
|
|
local64_set(&event->hw.period_left, left);
|
|
|
|
perf_event_update_userpage(event);
|
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
/*
|
|
|
|
* Finally record data if requested.
|
|
|
|
*/
|
|
|
|
if (record) {
|
2010-07-09 02:21:21 -06:00
|
|
|
struct perf_sample_data data;
|
|
|
|
|
2012-04-02 12:19:08 -06:00
|
|
|
perf_sample_data_init(&data, 0, event->hw.last_period);
|
2010-02-25 17:09:45 -07:00
|
|
|
|
2011-06-27 06:41:57 -06:00
|
|
|
if (perf_event_overflow(event, &data, regs))
|
perf: Rework the PMU methods
Replace pmu::{enable,disable,start,stop,unthrottle} with
pmu::{add,del,start,stop}, all of which take a flags argument.
The new interface extends the capability to stop a counter while
keeping it scheduled on the PMU. We replace the throttled state with
the generic stopped state.
This also allows us to efficiently stop/start counters over certain
code paths (like IRQ handlers).
It also allows scheduling a counter without it starting, allowing for
a generic frozen state (useful for rotating stopped counters).
The stopped state is implemented in two different ways, depending on
how the architecture implemented the throttled state:
1) We disable the counter:
a) the pmu has per-counter enable bits, we flip that
b) we program a NOP event, preserving the counter state
2) We store the counter state and ignore all read/overflow events
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus <paulus@samba.org>
Cc: stephane eranian <eranian@googlemail.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Yanmin <yanmin_zhang@linux.intel.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Miller <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-06-16 06:37:10 -06:00
|
|
|
fsl_emb_pmu_stop(event, 0);
|
2010-02-25 17:09:45 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void perf_event_interrupt(struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
int i;
|
powerpc: Replace __get_cpu_var uses
This still has not been merged and now powerpc is the only arch that does
not have this change. Sorry about missing linuxppc-dev before.
V2->V2
- Fix up to work against 3.18-rc1
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
[mpe: Fix build errors caused by set/or_softirq_pending(), and rework
assignment in __set_breakpoint() to use memcpy().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-21 14:23:25 -06:00
|
|
|
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
2010-02-25 17:09:45 -07:00
|
|
|
struct perf_event *event;
|
|
|
|
unsigned long val;
|
|
|
|
int found = 0;
|
|
|
|
int nmi;
|
|
|
|
|
|
|
|
nmi = perf_intr_is_nmi(regs);
|
|
|
|
if (nmi)
|
|
|
|
nmi_enter();
|
|
|
|
else
|
|
|
|
irq_enter();
|
|
|
|
|
|
|
|
for (i = 0; i < ppmu->n_counter; ++i) {
|
|
|
|
event = cpuhw->event[i];
|
|
|
|
|
|
|
|
val = read_pmc(i);
|
|
|
|
if ((int)val < 0) {
|
|
|
|
if (event) {
|
|
|
|
/* event has overflowed */
|
|
|
|
found = 1;
|
2011-06-27 06:41:57 -06:00
|
|
|
record_and_restart(event, val, regs);
|
2010-02-25 17:09:45 -07:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Disabled counter is negative,
|
|
|
|
* reset it just in case.
|
|
|
|
*/
|
|
|
|
write_pmc(i, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* PMM will keep counters frozen until we return from the interrupt. */
|
|
|
|
mtmsr(mfmsr() | MSR_PMM);
|
|
|
|
mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
|
|
|
|
isync();
|
|
|
|
|
|
|
|
if (nmi)
|
|
|
|
nmi_exit();
|
|
|
|
else
|
|
|
|
irq_exit();
|
|
|
|
}
|
|
|
|
|
|
|
|
void hw_perf_event_setup(int cpu)
|
|
|
|
{
|
|
|
|
struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
|
|
|
|
|
|
|
|
memset(cpuhw, 0, sizeof(*cpuhw));
|
|
|
|
}
|
|
|
|
|
|
|
|
int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
|
|
|
|
{
|
|
|
|
if (ppmu)
|
|
|
|
return -EBUSY; /* something's already registered */
|
|
|
|
|
|
|
|
ppmu = pmu;
|
|
|
|
pr_info("%s performance monitor hardware support registered\n",
|
|
|
|
pmu->name);
|
|
|
|
|
2010-11-17 15:17:36 -07:00
|
|
|
perf_pmu_register(&fsl_emb_pmu, "cpu", PERF_TYPE_RAW);
|
2010-06-11 05:35:08 -06:00
|
|
|
|
2010-02-25 17:09:45 -07:00
|
|
|
return 0;
|
|
|
|
}
|