2008-09-02 09:16:59 -06:00
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/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/mach/flash.h>
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#include <mach/mxc_nand.h>
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2009-10-05 04:14:21 -06:00
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#include <mach/hardware.h>
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2008-09-02 09:16:59 -06:00
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#define DRIVER_NAME "mxc_nand"
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2009-10-05 04:14:21 -06:00
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#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35())
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#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27())
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2008-09-02 09:16:59 -06:00
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/* Addresses for NFC registers */
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#define NFC_BUF_SIZE 0xE00
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#define NFC_BUF_ADDR 0xE04
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#define NFC_FLASH_ADDR 0xE06
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#define NFC_FLASH_CMD 0xE08
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#define NFC_CONFIG 0xE0A
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#define NFC_ECC_STATUS_RESULT 0xE0C
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#define NFC_RSLTMAIN_AREA 0xE0E
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#define NFC_RSLTSPARE_AREA 0xE10
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#define NFC_WRPROT 0xE12
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2009-10-05 04:14:21 -06:00
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#define NFC_V1_UNLOCKSTART_BLKADDR 0xe14
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#define NFC_V1_UNLOCKEND_BLKADDR 0xe16
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#define NFC_V21_UNLOCKSTART_BLKADDR 0xe20
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#define NFC_V21_UNLOCKEND_BLKADDR 0xe22
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2008-09-02 09:16:59 -06:00
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#define NFC_NF_WRPRST 0xE18
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#define NFC_CONFIG1 0xE1A
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#define NFC_CONFIG2 0xE1C
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/* Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register
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* for Command operation */
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#define NFC_CMD 0x1
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/* Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register
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* for Address operation */
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#define NFC_ADDR 0x2
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/* Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register
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* for Input operation */
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#define NFC_INPUT 0x4
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/* Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register
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* for Data Output operation */
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#define NFC_OUTPUT 0x8
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/* Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register
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* for Read ID operation */
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#define NFC_ID 0x10
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/* Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register
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* for Read Status operation */
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#define NFC_STATUS 0x20
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/* Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read
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* Status operation */
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#define NFC_INT 0x8000
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#define NFC_SP_EN (1 << 2)
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#define NFC_ECC_EN (1 << 3)
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#define NFC_INT_MSK (1 << 4)
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#define NFC_BIG (1 << 5)
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#define NFC_RST (1 << 6)
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#define NFC_CE (1 << 7)
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#define NFC_ONE_CYCLE (1 << 8)
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struct mxc_nand_host {
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struct mtd_info mtd;
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struct nand_chip nand;
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struct mtd_partition *parts;
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struct device *dev;
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2009-10-05 03:14:35 -06:00
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void *spare0;
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void *main_area0;
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void *main_area1;
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void __iomem *base;
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2008-09-02 09:16:59 -06:00
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void __iomem *regs;
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int status_request;
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struct clk *clk;
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int clk_act;
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int irq;
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wait_queue_head_t irq_waitq;
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2009-06-04 09:12:26 -06:00
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uint8_t *data_buf;
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unsigned int buf_start;
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int spare_len;
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2008-09-02 09:16:59 -06:00
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};
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/* OOB placement block for use with hardware ecc generation */
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2009-10-05 04:14:21 -06:00
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static struct nand_ecclayout nandv1_hw_eccoob_smallpage = {
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2008-09-02 09:16:59 -06:00
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.eccbytes = 5,
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.eccpos = {6, 7, 8, 9, 10},
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mxc_nand: cleanup eccoob descriptions
The original Freescale driver used to have eccoob descriptions like
this:
static struct nand_ecclayout nand_hw_eccoob_8 = {
.eccbytes = 5,
.eccpos = {6, 7, 8, 9, 10},
.oobfree = {{0, 5}, {11, 5}}
};
static struct nand_ecclayout nand_hw_eccoob_16 = {
.eccbytes = 5,
.eccpos = {6, 7, 8, 9, 10},
.oobfree = {{0, 6}, {12, 4}}
};
The former was used for 8bit flashes and the latter for 16bit flashes.
They honored the fact that the bad block marker on 8bit flashes is on byte 5
while on 16bit flashes it is on byte 11.
In the Kernel driver this was copied wrong and we ended up with two identical
descriptions.
Change it so that we have only one description which leaves byte 5 and byte
11 unspecified so that it won't be used by others.
Also, rename the descriptions to nand_hw_eccoob_smallpage and
nand_hw_eccoob_largepage so that it can't be confused with Nand chip bus
widths (what actually happened in this driver)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-10-21 02:22:01 -06:00
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.oobfree = {{0, 5}, {12, 4}, }
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2009-05-25 03:06:17 -06:00
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};
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2009-10-05 04:14:21 -06:00
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static struct nand_ecclayout nandv1_hw_eccoob_largepage = {
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2009-05-25 03:06:17 -06:00
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.eccbytes = 20,
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.eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
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38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
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.oobfree = {{2, 4}, {11, 10}, {27, 10}, {43, 10}, {59, 5}, }
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2008-09-02 09:16:59 -06:00
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};
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2009-10-05 04:14:21 -06:00
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/* OOB description for 512 byte pages with 16 byte OOB */
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static struct nand_ecclayout nandv2_hw_eccoob_smallpage = {
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.eccbytes = 1 * 9,
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.eccpos = {
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7, 8, 9, 10, 11, 12, 13, 14, 15
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},
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.oobfree = {
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{.offset = 0, .length = 5}
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}
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};
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/* OOB description for 2048 byte pages with 64 byte OOB */
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static struct nand_ecclayout nandv2_hw_eccoob_largepage = {
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.eccbytes = 4 * 9,
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.eccpos = {
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7, 8, 9, 10, 11, 12, 13, 14, 15,
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23, 24, 25, 26, 27, 28, 29, 30, 31,
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39, 40, 41, 42, 43, 44, 45, 46, 47,
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55, 56, 57, 58, 59, 60, 61, 62, 63
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},
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.oobfree = {
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{.offset = 2, .length = 4},
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{.offset = 16, .length = 7},
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{.offset = 32, .length = 7},
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{.offset = 48, .length = 7}
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}
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};
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2008-09-02 09:16:59 -06:00
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#ifdef CONFIG_MTD_PARTITIONS
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static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL };
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#endif
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static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)
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{
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struct mxc_nand_host *host = dev_id;
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uint16_t tmp;
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tmp = readw(host->regs + NFC_CONFIG1);
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tmp |= NFC_INT_MSK; /* Disable interrupt */
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writew(tmp, host->regs + NFC_CONFIG1);
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wake_up(&host->irq_waitq);
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return IRQ_HANDLED;
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}
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/* This function polls the NANDFC to wait for the basic operation to
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* complete by checking the INT bit of config2 register.
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*/
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2009-10-21 08:01:02 -06:00
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static void wait_op_done(struct mxc_nand_host *host, int useirq)
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2008-09-02 09:16:59 -06:00
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{
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uint32_t tmp;
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2009-10-21 08:01:02 -06:00
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int max_retries = 2000;
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2008-09-02 09:16:59 -06:00
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if (useirq) {
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if ((readw(host->regs + NFC_CONFIG2) & NFC_INT) == 0) {
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tmp = readw(host->regs + NFC_CONFIG1);
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tmp &= ~NFC_INT_MSK; /* Enable interrupt */
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writew(tmp, host->regs + NFC_CONFIG1);
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wait_event(host->irq_waitq,
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readw(host->regs + NFC_CONFIG2) & NFC_INT);
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tmp = readw(host->regs + NFC_CONFIG2);
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tmp &= ~NFC_INT;
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writew(tmp, host->regs + NFC_CONFIG2);
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}
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} else {
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while (max_retries-- > 0) {
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if (readw(host->regs + NFC_CONFIG2) & NFC_INT) {
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tmp = readw(host->regs + NFC_CONFIG2);
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tmp &= ~NFC_INT;
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writew(tmp, host->regs + NFC_CONFIG2);
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break;
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}
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udelay(1);
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}
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2009-06-04 08:24:59 -06:00
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if (max_retries < 0)
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2009-06-04 07:57:20 -06:00
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DEBUG(MTD_DEBUG_LEVEL0, "%s: INT not set\n",
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__func__);
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2008-09-02 09:16:59 -06:00
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}
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}
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/* This function issues the specified command to the NAND device and
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* waits for completion. */
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static void send_cmd(struct mxc_nand_host *host, uint16_t cmd, int useirq)
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{
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DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x, %d)\n", cmd, useirq);
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writew(cmd, host->regs + NFC_FLASH_CMD);
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writew(NFC_CMD, host->regs + NFC_CONFIG2);
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/* Wait for operation to complete */
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2009-10-21 08:01:02 -06:00
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wait_op_done(host, useirq);
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2008-09-02 09:16:59 -06:00
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}
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/* This function sends an address (or partial address) to the
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* NAND device. The address is used to select the source/destination for
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* a NAND command. */
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static void send_addr(struct mxc_nand_host *host, uint16_t addr, int islast)
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{
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DEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x %d)\n", addr, islast);
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writew(addr, host->regs + NFC_FLASH_ADDR);
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writew(NFC_ADDR, host->regs + NFC_CONFIG2);
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/* Wait for operation to complete */
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2009-10-21 08:01:02 -06:00
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wait_op_done(host, islast);
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2008-09-02 09:16:59 -06:00
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}
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2009-10-05 03:24:02 -06:00
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static void send_page(struct mtd_info *mtd, unsigned int ops)
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2008-09-02 09:16:59 -06:00
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{
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2009-10-05 03:24:02 -06:00
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struct nand_chip *nand_chip = mtd->priv;
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struct mxc_nand_host *host = nand_chip->priv;
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2009-06-04 09:25:53 -06:00
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int bufs, i;
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2008-09-02 09:16:59 -06:00
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2009-10-05 04:14:21 -06:00
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if (nfc_is_v1() && mtd->writesize > 512)
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2009-06-04 09:25:53 -06:00
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bufs = 4;
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else
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bufs = 1;
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2008-09-02 09:16:59 -06:00
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2009-06-04 09:25:53 -06:00
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for (i = 0; i < bufs; i++) {
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2008-09-02 09:16:59 -06:00
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2009-06-04 09:25:53 -06:00
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/* NANDFC buffer 0 is used for page read/write */
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writew(i, host->regs + NFC_BUF_ADDR);
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2008-09-02 09:16:59 -06:00
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2009-06-04 09:25:53 -06:00
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writew(ops, host->regs + NFC_CONFIG2);
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2008-09-02 09:16:59 -06:00
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2009-06-04 09:25:53 -06:00
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/* Wait for operation to complete */
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2009-10-21 08:01:02 -06:00
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wait_op_done(host, true);
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2008-09-02 09:16:59 -06:00
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}
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}
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/* Request the NANDFC to perform a read of the NAND device ID. */
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static void send_read_id(struct mxc_nand_host *host)
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{
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struct nand_chip *this = &host->nand;
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/* NANDFC buffer 0 is used for device ID output */
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writew(0x0, host->regs + NFC_BUF_ADDR);
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writew(NFC_ID, host->regs + NFC_CONFIG2);
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/* Wait for operation to complete */
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2009-10-21 08:01:02 -06:00
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wait_op_done(host, true);
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2008-09-02 09:16:59 -06:00
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if (this->options & NAND_BUSWIDTH_16) {
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2009-10-05 03:14:35 -06:00
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void __iomem *main_buf = host->main_area0;
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2008-09-02 09:16:59 -06:00
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/* compress the ID info */
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writeb(readb(main_buf + 2), main_buf + 1);
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writeb(readb(main_buf + 4), main_buf + 2);
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writeb(readb(main_buf + 6), main_buf + 3);
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writeb(readb(main_buf + 8), main_buf + 4);
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writeb(readb(main_buf + 10), main_buf + 5);
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}
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2009-10-05 03:14:35 -06:00
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memcpy(host->data_buf, host->main_area0, 16);
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2008-09-02 09:16:59 -06:00
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}
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/* This function requests the NANDFC to perform a read of the
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* NAND device status and returns the current status. */
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static uint16_t get_dev_status(struct mxc_nand_host *host)
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{
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2009-10-05 03:14:35 -06:00
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void __iomem *main_buf = host->main_area1;
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2008-09-02 09:16:59 -06:00
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uint32_t store;
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2009-10-05 09:18:42 -06:00
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uint16_t ret;
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2008-09-02 09:16:59 -06:00
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/* Issue status request to NAND device */
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|
|
|
|
|
|
|
/* store the main area1 first word, later do recovery */
|
|
|
|
store = readl(main_buf);
|
|
|
|
/* NANDFC buffer 1 is used for device status to prevent
|
|
|
|
* corruption of read/write buffer on status requests. */
|
|
|
|
writew(1, host->regs + NFC_BUF_ADDR);
|
|
|
|
|
|
|
|
writew(NFC_STATUS, host->regs + NFC_CONFIG2);
|
|
|
|
|
|
|
|
/* Wait for operation to complete */
|
2009-10-21 08:01:02 -06:00
|
|
|
wait_op_done(host, true);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Status is placed in first word of main buffer */
|
|
|
|
/* get status, then recovery area 1 data */
|
|
|
|
ret = readw(main_buf);
|
|
|
|
writel(store, main_buf);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This functions is used by upper layer to checks if device is ready */
|
|
|
|
static int mxc_nand_dev_ready(struct mtd_info *mtd)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* NFC handles R/B internally. Therefore, this function
|
|
|
|
* always returns status as ready.
|
|
|
|
*/
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If HW ECC is enabled, we turn it on during init. There is
|
|
|
|
* no need to enable again here.
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
|
|
|
|
u_char *read_ecc, u_char *calc_ecc)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 1-Bit errors are automatically corrected in HW. No need for
|
|
|
|
* additional correction. 2-Bit errors cannot be corrected by
|
|
|
|
* HW ECC, so we need to return failure
|
|
|
|
*/
|
|
|
|
uint16_t ecc_status = readw(host->regs + NFC_ECC_STATUS_RESULT);
|
|
|
|
|
|
|
|
if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
|
|
"MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
|
|
|
|
u_char *ecc_code)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_char mxc_nand_read_byte(struct mtd_info *mtd)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2009-06-04 09:12:26 -06:00
|
|
|
uint8_t ret;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Check for status request */
|
|
|
|
if (host->status_request)
|
|
|
|
return get_dev_status(host) & 0xFF;
|
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
ret = *(uint8_t *)(host->data_buf + host->buf_start);
|
|
|
|
host->buf_start++;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2009-06-04 09:12:26 -06:00
|
|
|
uint16_t ret;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
ret = *(uint16_t *)(host->data_buf + host->buf_start);
|
|
|
|
host->buf_start += 2;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write data of length len to buffer buf. The data to be
|
|
|
|
* written on NAND Flash is first copied to RAMbuffer. After the Data Input
|
|
|
|
* Operation by the NFC, the data is written to NAND Flash */
|
|
|
|
static void mxc_nand_write_buf(struct mtd_info *mtd,
|
|
|
|
const u_char *buf, int len)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2009-06-04 09:12:26 -06:00
|
|
|
u16 col = host->buf_start;
|
|
|
|
int n = mtd->oobsize + mtd->writesize - col;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
n = min(n, len);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
memcpy(host->data_buf + col, buf, n);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
host->buf_start += n;
|
2008-09-02 09:16:59 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Read the data buffer from the NAND Flash. To read the data from NAND
|
|
|
|
* Flash first the data output cycle is initiated by the NFC, which copies
|
|
|
|
* the data to RAMbuffer. This data of length len is then copied to buffer buf.
|
|
|
|
*/
|
|
|
|
static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2009-06-04 09:12:26 -06:00
|
|
|
u16 col = host->buf_start;
|
|
|
|
int n = mtd->oobsize + mtd->writesize - col;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
n = min(n, len);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
memcpy(buf, host->data_buf + col, len);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
host->buf_start += len;
|
2008-09-02 09:16:59 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Used by the upper layer to verify the data in NAND Flash
|
|
|
|
* with the data in the buf. */
|
|
|
|
static int mxc_nand_verify_buf(struct mtd_info *mtd,
|
|
|
|
const u_char *buf, int len)
|
|
|
|
{
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This function is used by upper layer for select and
|
|
|
|
* deselect of the NAND chip */
|
|
|
|
static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
|
|
|
|
|
|
|
switch (chip) {
|
|
|
|
case -1:
|
|
|
|
/* Disable the NFC clock */
|
|
|
|
if (host->clk_act) {
|
|
|
|
clk_disable(host->clk);
|
|
|
|
host->clk_act = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0:
|
|
|
|
/* Enable the NFC clock */
|
|
|
|
if (!host->clk_act) {
|
|
|
|
clk_enable(host->clk);
|
|
|
|
host->clk_act = 1;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
/*
|
|
|
|
* Function to transfer data to/from spare area.
|
|
|
|
*/
|
|
|
|
static void copy_spare(struct mtd_info *mtd, bool bfrom)
|
2008-09-02 09:16:59 -06:00
|
|
|
{
|
2009-06-04 09:12:26 -06:00
|
|
|
struct nand_chip *this = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = this->priv;
|
|
|
|
u16 i, j;
|
|
|
|
u16 n = mtd->writesize >> 9;
|
|
|
|
u8 *d = host->data_buf + mtd->writesize;
|
2009-10-05 03:14:35 -06:00
|
|
|
u8 *s = host->spare0;
|
2009-06-04 09:12:26 -06:00
|
|
|
u16 t = host->spare_len;
|
|
|
|
|
|
|
|
j = (mtd->oobsize / n >> 1) << 1;
|
|
|
|
|
|
|
|
if (bfrom) {
|
|
|
|
for (i = 0; i < n - 1; i++)
|
|
|
|
memcpy(d + i * j, s + i * t, j);
|
|
|
|
|
|
|
|
/* the last section */
|
|
|
|
memcpy(d + i * j, s + i * t, mtd->oobsize - i * j);
|
|
|
|
} else {
|
|
|
|
for (i = 0; i < n - 1; i++)
|
|
|
|
memcpy(&s[i * t], &d[i * j], j);
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
/* the last section */
|
|
|
|
memcpy(&s[i * t], &d[i * j], mtd->oobsize - i * j);
|
2008-09-02 09:16:59 -06:00
|
|
|
}
|
2009-06-04 09:12:26 -06:00
|
|
|
}
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-06-02 03:47:59 -06:00
|
|
|
static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Write out column address, if necessary */
|
|
|
|
if (column != -1) {
|
|
|
|
/*
|
|
|
|
* MXC NANDFC can only perform full page+spare or
|
|
|
|
* spare-only read/write. When the upper layers
|
|
|
|
* layers perform a read/write buf operation,
|
tree-wide: Assorted spelling fixes
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Joe Perches <joe@perches.com>
Cc: Junio C Hamano <gitster@pobox.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-02-02 17:01:28 -07:00
|
|
|
* we will used the saved column address to index into
|
2008-09-02 09:16:59 -06:00
|
|
|
* the full page.
|
|
|
|
*/
|
|
|
|
send_addr(host, 0, page_addr == -1);
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize > 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
/* another col addr cycle for 2k page */
|
|
|
|
send_addr(host, 0, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write out page address, if necessary */
|
|
|
|
if (page_addr != -1) {
|
|
|
|
/* paddr_0 - p_addr_7 */
|
|
|
|
send_addr(host, (page_addr & 0xff), false);
|
|
|
|
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize > 512) {
|
2009-05-25 03:06:17 -06:00
|
|
|
if (mtd->size >= 0x10000000) {
|
|
|
|
/* paddr_8 - paddr_15 */
|
|
|
|
send_addr(host, (page_addr >> 8) & 0xff, false);
|
2008-09-02 09:16:59 -06:00
|
|
|
send_addr(host, (page_addr >> 16) & 0xff, true);
|
2009-05-25 03:06:17 -06:00
|
|
|
} else
|
|
|
|
/* paddr_8 - paddr_15 */
|
|
|
|
send_addr(host, (page_addr >> 8) & 0xff, true);
|
2008-09-02 09:16:59 -06:00
|
|
|
} else {
|
|
|
|
/* One more address cycle for higher density devices */
|
|
|
|
if (mtd->size >= 0x4000000) {
|
|
|
|
/* paddr_8 - paddr_15 */
|
|
|
|
send_addr(host, (page_addr >> 8) & 0xff, false);
|
|
|
|
send_addr(host, (page_addr >> 16) & 0xff, true);
|
|
|
|
} else
|
|
|
|
/* paddr_8 - paddr_15 */
|
|
|
|
send_addr(host, (page_addr >> 8) & 0xff, true);
|
|
|
|
}
|
|
|
|
}
|
2009-06-02 03:47:59 -06:00
|
|
|
}
|
|
|
|
|
2008-09-02 09:16:59 -06:00
|
|
|
/* Used by the upper layer to write command to NAND Flash for
|
|
|
|
* different operations to be carried out on NAND Flash */
|
|
|
|
static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
|
|
|
|
int column, int page_addr)
|
|
|
|
{
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
|
|
|
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL3,
|
|
|
|
"mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
|
|
|
|
command, column, page_addr);
|
|
|
|
|
|
|
|
/* Reset command state information */
|
|
|
|
host->status_request = false;
|
|
|
|
|
|
|
|
/* Command pre-processing step */
|
|
|
|
switch (command) {
|
|
|
|
|
|
|
|
case NAND_CMD_STATUS:
|
2009-06-04 09:12:26 -06:00
|
|
|
host->buf_start = 0;
|
2008-09-02 09:16:59 -06:00
|
|
|
host->status_request = true;
|
|
|
|
|
2009-06-04 09:18:01 -06:00
|
|
|
send_cmd(host, command, true);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
|
|
|
|
case NAND_CMD_READ0:
|
|
|
|
case NAND_CMD_READOOB:
|
2009-06-04 09:18:01 -06:00
|
|
|
if (command == NAND_CMD_READ0)
|
|
|
|
host->buf_start = column;
|
|
|
|
else
|
|
|
|
host->buf_start = column + mtd->writesize;
|
2009-06-04 09:12:26 -06:00
|
|
|
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize > 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
command = NAND_CMD_READ0; /* only READ0 is valid */
|
2009-06-04 09:18:01 -06:00
|
|
|
|
|
|
|
send_cmd(host, command, false);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
|
|
|
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize > 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
send_cmd(host, NAND_CMD_READSTART, true);
|
2009-06-04 09:25:53 -06:00
|
|
|
|
2009-10-05 03:24:02 -06:00
|
|
|
send_page(mtd, NFC_OUTPUT);
|
2009-06-04 09:18:01 -06:00
|
|
|
|
2009-10-05 03:14:35 -06:00
|
|
|
memcpy(host->data_buf, host->main_area0, mtd->writesize);
|
2009-06-04 09:18:01 -06:00
|
|
|
copy_spare(mtd, true);
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
|
|
|
|
case NAND_CMD_SEQIN:
|
|
|
|
if (column >= mtd->writesize) {
|
|
|
|
/*
|
|
|
|
* FIXME: before send SEQIN command for write OOB,
|
|
|
|
* We must read one page out.
|
|
|
|
* For K9F1GXX has no READ1 command to set current HW
|
|
|
|
* pointer to spare area, we must write the whole page
|
|
|
|
* including OOB together.
|
|
|
|
*/
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize > 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
/* call ourself to read a page */
|
|
|
|
mxc_nand_command(mtd, NAND_CMD_READ0, 0,
|
|
|
|
page_addr);
|
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
host->buf_start = column;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Set program pointer to spare region */
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize == 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
send_cmd(host, NAND_CMD_READOOB, false);
|
|
|
|
} else {
|
2009-06-04 09:12:26 -06:00
|
|
|
host->buf_start = column;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Set program pointer to page start */
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize == 512)
|
2008-09-02 09:16:59 -06:00
|
|
|
send_cmd(host, NAND_CMD_READ0, false);
|
|
|
|
}
|
2009-06-04 09:18:01 -06:00
|
|
|
|
|
|
|
send_cmd(host, command, false);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
|
|
|
|
case NAND_CMD_PAGEPROG:
|
2009-10-05 03:14:35 -06:00
|
|
|
memcpy(host->main_area0, host->data_buf, mtd->writesize);
|
2009-06-04 09:12:26 -06:00
|
|
|
copy_spare(mtd, false);
|
2009-10-05 03:24:02 -06:00
|
|
|
send_page(mtd, NFC_INPUT);
|
2009-06-04 09:18:01 -06:00
|
|
|
send_cmd(host, command, true);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
|
|
|
|
case NAND_CMD_READID:
|
2009-06-04 09:18:01 -06:00
|
|
|
send_cmd(host, command, true);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
2008-09-02 09:16:59 -06:00
|
|
|
send_read_id(host);
|
2009-10-05 04:14:21 -06:00
|
|
|
host->buf_start = column;
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
|
2009-06-04 09:18:01 -06:00
|
|
|
case NAND_CMD_ERASE1:
|
2008-09-02 09:16:59 -06:00
|
|
|
case NAND_CMD_ERASE2:
|
2009-06-04 09:18:01 -06:00
|
|
|
send_cmd(host, command, false);
|
|
|
|
mxc_do_addr_cycle(mtd, column, page_addr);
|
|
|
|
|
2008-09-02 09:16:59 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-10-21 06:25:27 -06:00
|
|
|
/*
|
|
|
|
* The generic flash bbt decriptors overlap with our ecc
|
|
|
|
* hardware, so define some i.MX specific ones.
|
|
|
|
*/
|
|
|
|
static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
|
|
|
|
static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
|
|
|
|
|
|
|
|
static struct nand_bbt_descr bbt_main_descr = {
|
|
|
|
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
|
|
|
|
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
|
|
|
|
.offs = 0,
|
|
|
|
.len = 4,
|
|
|
|
.veroffs = 4,
|
|
|
|
.maxblocks = 4,
|
|
|
|
.pattern = bbt_pattern,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct nand_bbt_descr bbt_mirror_descr = {
|
|
|
|
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
|
|
|
|
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
|
|
|
|
.offs = 0,
|
|
|
|
.len = 4,
|
|
|
|
.veroffs = 4,
|
|
|
|
.maxblocks = 4,
|
|
|
|
.pattern = mirror_pattern,
|
|
|
|
};
|
|
|
|
|
2008-09-02 09:16:59 -06:00
|
|
|
static int __init mxcnd_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct nand_chip *this;
|
|
|
|
struct mtd_info *mtd;
|
|
|
|
struct mxc_nand_platform_data *pdata = pdev->dev.platform_data;
|
|
|
|
struct mxc_nand_host *host;
|
|
|
|
struct resource *res;
|
|
|
|
uint16_t tmp;
|
|
|
|
int err = 0, nr_parts = 0;
|
2009-10-05 04:14:21 -06:00
|
|
|
struct nand_ecclayout *oob_smallpage, *oob_largepage;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* Allocate memory for MTD device structure and private data */
|
2009-06-04 09:12:26 -06:00
|
|
|
host = kzalloc(sizeof(struct mxc_nand_host) + NAND_MAX_PAGESIZE +
|
|
|
|
NAND_MAX_OOBSIZE, GFP_KERNEL);
|
2008-09-02 09:16:59 -06:00
|
|
|
if (!host)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2009-06-04 09:12:26 -06:00
|
|
|
host->data_buf = (uint8_t *)(host + 1);
|
|
|
|
|
2008-09-02 09:16:59 -06:00
|
|
|
host->dev = &pdev->dev;
|
|
|
|
/* structures must be linked */
|
|
|
|
this = &host->nand;
|
|
|
|
mtd = &host->mtd;
|
|
|
|
mtd->priv = this;
|
|
|
|
mtd->owner = THIS_MODULE;
|
2009-03-26 01:42:50 -06:00
|
|
|
mtd->dev.parent = &pdev->dev;
|
2009-10-21 08:06:27 -06:00
|
|
|
mtd->name = DRIVER_NAME;
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
/* 50 us command delay time */
|
|
|
|
this->chip_delay = 5;
|
|
|
|
|
|
|
|
this->priv = host;
|
|
|
|
this->dev_ready = mxc_nand_dev_ready;
|
|
|
|
this->cmdfunc = mxc_nand_command;
|
|
|
|
this->select_chip = mxc_nand_select_chip;
|
|
|
|
this->read_byte = mxc_nand_read_byte;
|
|
|
|
this->read_word = mxc_nand_read_word;
|
|
|
|
this->write_buf = mxc_nand_write_buf;
|
|
|
|
this->read_buf = mxc_nand_read_buf;
|
|
|
|
this->verify_buf = mxc_nand_verify_buf;
|
|
|
|
|
2009-02-16 06:29:10 -07:00
|
|
|
host->clk = clk_get(&pdev->dev, "nfc");
|
2009-04-23 05:47:22 -06:00
|
|
|
if (IS_ERR(host->clk)) {
|
|
|
|
err = PTR_ERR(host->clk);
|
2008-09-02 09:16:59 -06:00
|
|
|
goto eclk;
|
2009-04-23 05:47:22 -06:00
|
|
|
}
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
clk_enable(host->clk);
|
|
|
|
host->clk_act = 1;
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto eres;
|
|
|
|
}
|
|
|
|
|
2009-10-05 03:14:35 -06:00
|
|
|
host->base = ioremap(res->start, resource_size(res));
|
|
|
|
if (!host->base) {
|
2009-04-23 05:47:22 -06:00
|
|
|
err = -ENOMEM;
|
2008-09-02 09:16:59 -06:00
|
|
|
goto eres;
|
|
|
|
}
|
|
|
|
|
2009-10-05 03:14:35 -06:00
|
|
|
host->main_area0 = host->base;
|
|
|
|
host->main_area1 = host->base + 0x200;
|
2009-10-05 04:14:21 -06:00
|
|
|
|
|
|
|
if (nfc_is_v21()) {
|
|
|
|
host->regs = host->base + 0x1000;
|
|
|
|
host->spare0 = host->base + 0x1000;
|
|
|
|
host->spare_len = 64;
|
|
|
|
oob_smallpage = &nandv2_hw_eccoob_smallpage;
|
|
|
|
oob_largepage = &nandv2_hw_eccoob_largepage;
|
|
|
|
} else if (nfc_is_v1()) {
|
|
|
|
host->regs = host->base;
|
|
|
|
host->spare0 = host->base + 0x800;
|
|
|
|
host->spare_len = 16;
|
|
|
|
oob_smallpage = &nandv1_hw_eccoob_smallpage;
|
|
|
|
oob_largepage = &nandv1_hw_eccoob_largepage;
|
|
|
|
} else
|
|
|
|
BUG();
|
2009-10-05 03:14:35 -06:00
|
|
|
|
2009-10-05 09:18:42 -06:00
|
|
|
/* disable interrupt and spare enable */
|
2008-09-02 09:16:59 -06:00
|
|
|
tmp = readw(host->regs + NFC_CONFIG1);
|
|
|
|
tmp |= NFC_INT_MSK;
|
2009-10-05 09:18:42 -06:00
|
|
|
tmp &= ~NFC_SP_EN;
|
2008-09-02 09:16:59 -06:00
|
|
|
writew(tmp, host->regs + NFC_CONFIG1);
|
|
|
|
|
|
|
|
init_waitqueue_head(&host->irq_waitq);
|
|
|
|
|
|
|
|
host->irq = platform_get_irq(pdev, 0);
|
|
|
|
|
2009-10-21 08:06:27 -06:00
|
|
|
err = request_irq(host->irq, mxc_nfc_irq, 0, DRIVER_NAME, host);
|
2008-09-02 09:16:59 -06:00
|
|
|
if (err)
|
|
|
|
goto eirq;
|
|
|
|
|
2009-10-21 02:39:05 -06:00
|
|
|
/* Reset NAND */
|
|
|
|
this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
|
|
|
|
|
|
|
|
/* preset operation */
|
|
|
|
/* Unlock the internal RAM Buffer */
|
|
|
|
writew(0x2, host->regs + NFC_CONFIG);
|
|
|
|
|
|
|
|
/* Blocks to be unlocked */
|
2009-10-05 04:14:21 -06:00
|
|
|
if (nfc_is_v21()) {
|
|
|
|
writew(0x0, host->regs + NFC_V21_UNLOCKSTART_BLKADDR);
|
|
|
|
writew(0xffff, host->regs + NFC_V21_UNLOCKEND_BLKADDR);
|
|
|
|
this->ecc.bytes = 9;
|
|
|
|
} else if (nfc_is_v1()) {
|
|
|
|
writew(0x0, host->regs + NFC_V1_UNLOCKSTART_BLKADDR);
|
|
|
|
writew(0x4000, host->regs + NFC_V1_UNLOCKEND_BLKADDR);
|
|
|
|
this->ecc.bytes = 3;
|
|
|
|
} else
|
|
|
|
BUG();
|
2009-10-21 02:39:05 -06:00
|
|
|
|
|
|
|
/* Unlock Block Command for given address range */
|
|
|
|
writew(0x4, host->regs + NFC_WRPROT);
|
|
|
|
|
|
|
|
this->ecc.size = 512;
|
2009-10-05 04:14:21 -06:00
|
|
|
this->ecc.layout = oob_smallpage;
|
2009-10-21 02:39:05 -06:00
|
|
|
|
2008-09-02 09:16:59 -06:00
|
|
|
if (pdata->hw_ecc) {
|
|
|
|
this->ecc.calculate = mxc_nand_calculate_ecc;
|
|
|
|
this->ecc.hwctl = mxc_nand_enable_hwecc;
|
|
|
|
this->ecc.correct = mxc_nand_correct_data;
|
|
|
|
this->ecc.mode = NAND_ECC_HW;
|
|
|
|
tmp = readw(host->regs + NFC_CONFIG1);
|
|
|
|
tmp |= NFC_ECC_EN;
|
|
|
|
writew(tmp, host->regs + NFC_CONFIG1);
|
|
|
|
} else {
|
|
|
|
this->ecc.mode = NAND_ECC_SOFT;
|
|
|
|
tmp = readw(host->regs + NFC_CONFIG1);
|
|
|
|
tmp &= ~NFC_ECC_EN;
|
|
|
|
writew(tmp, host->regs + NFC_CONFIG1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* NAND bus width determines access funtions used by upper layer */
|
2009-10-21 02:39:05 -06:00
|
|
|
if (pdata->width == 2)
|
2008-09-02 09:16:59 -06:00
|
|
|
this->options |= NAND_BUSWIDTH_16;
|
|
|
|
|
2009-10-21 06:25:27 -06:00
|
|
|
if (pdata->flash_bbt) {
|
|
|
|
this->bbt_td = &bbt_main_descr;
|
|
|
|
this->bbt_md = &bbt_mirror_descr;
|
|
|
|
/* update flash based bbt */
|
|
|
|
this->options |= NAND_USE_FLASH_BBT;
|
2008-09-02 09:16:59 -06:00
|
|
|
}
|
|
|
|
|
2009-05-25 03:06:17 -06:00
|
|
|
/* first scan to find the device and get the page size */
|
|
|
|
if (nand_scan_ident(mtd, 1)) {
|
|
|
|
err = -ENXIO;
|
|
|
|
goto escan;
|
|
|
|
}
|
2008-09-02 09:16:59 -06:00
|
|
|
|
2009-10-05 03:24:02 -06:00
|
|
|
if (mtd->writesize == 2048)
|
2009-10-05 04:14:21 -06:00
|
|
|
this->ecc.layout = oob_largepage;
|
2009-05-25 03:06:17 -06:00
|
|
|
|
|
|
|
/* second phase scan */
|
|
|
|
if (nand_scan_tail(mtd)) {
|
2008-09-02 09:16:59 -06:00
|
|
|
err = -ENXIO;
|
|
|
|
goto escan;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Register the partitions */
|
|
|
|
#ifdef CONFIG_MTD_PARTITIONS
|
|
|
|
nr_parts =
|
|
|
|
parse_mtd_partitions(mtd, part_probes, &host->parts, 0);
|
|
|
|
if (nr_parts > 0)
|
|
|
|
add_mtd_partitions(mtd, host->parts, nr_parts);
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
pr_info("Registering %s as whole device\n", mtd->name);
|
|
|
|
add_mtd_device(mtd);
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, host);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
escan:
|
2009-05-08 13:57:47 -06:00
|
|
|
free_irq(host->irq, host);
|
2008-09-02 09:16:59 -06:00
|
|
|
eirq:
|
2009-10-05 03:14:35 -06:00
|
|
|
iounmap(host->base);
|
2008-09-02 09:16:59 -06:00
|
|
|
eres:
|
|
|
|
clk_put(host->clk);
|
|
|
|
eclk:
|
|
|
|
kfree(host);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2009-12-07 02:44:05 -07:00
|
|
|
static int __devexit mxcnd_remove(struct platform_device *pdev)
|
2008-09-02 09:16:59 -06:00
|
|
|
{
|
|
|
|
struct mxc_nand_host *host = platform_get_drvdata(pdev);
|
|
|
|
|
|
|
|
clk_put(host->clk);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
|
|
|
|
nand_release(&host->mtd);
|
2009-05-08 13:57:47 -06:00
|
|
|
free_irq(host->irq, host);
|
2009-10-05 03:14:35 -06:00
|
|
|
iounmap(host->base);
|
2008-09-02 09:16:59 -06:00
|
|
|
kfree(host);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state)
|
|
|
|
{
|
2009-04-23 05:47:22 -06:00
|
|
|
struct mtd_info *mtd = platform_get_drvdata(pdev);
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2008-09-02 09:16:59 -06:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND suspend\n");
|
2009-04-23 05:47:22 -06:00
|
|
|
if (mtd) {
|
|
|
|
ret = mtd->suspend(mtd);
|
|
|
|
/* Disable the NFC clock */
|
|
|
|
clk_disable(host->clk);
|
|
|
|
}
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxcnd_resume(struct platform_device *pdev)
|
|
|
|
{
|
2009-04-23 05:47:22 -06:00
|
|
|
struct mtd_info *mtd = platform_get_drvdata(pdev);
|
|
|
|
struct nand_chip *nand_chip = mtd->priv;
|
|
|
|
struct mxc_nand_host *host = nand_chip->priv;
|
2008-09-02 09:16:59 -06:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND resume\n");
|
|
|
|
|
2009-04-23 05:47:22 -06:00
|
|
|
if (mtd) {
|
|
|
|
/* Enable the NFC clock */
|
|
|
|
clk_enable(host->clk);
|
|
|
|
mtd->resume(mtd);
|
|
|
|
}
|
2008-09-02 09:16:59 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
# define mxcnd_suspend NULL
|
|
|
|
# define mxcnd_resume NULL
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
|
|
|
static struct platform_driver mxcnd_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
},
|
2009-11-24 14:07:08 -07:00
|
|
|
.remove = __devexit_p(mxcnd_remove),
|
2008-09-02 09:16:59 -06:00
|
|
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.suspend = mxcnd_suspend,
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|
|
|
.resume = mxcnd_resume,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init mxc_nd_init(void)
|
|
|
|
{
|
2009-04-23 05:47:22 -06:00
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|
|
return platform_driver_probe(&mxcnd_driver, mxcnd_probe);
|
2008-09-02 09:16:59 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit mxc_nd_cleanup(void)
|
|
|
|
{
|
|
|
|
/* Unregister the device structure */
|
|
|
|
platform_driver_unregister(&mxcnd_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(mxc_nd_init);
|
|
|
|
module_exit(mxc_nd_cleanup);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Freescale Semiconductor, Inc.");
|
|
|
|
MODULE_DESCRIPTION("MXC NAND MTD driver");
|
|
|
|
MODULE_LICENSE("GPL");
|