2005-09-11 03:26:31 -06:00
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/*
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* linux/drivers/mfd/ucb1x00-core.c
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*
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* Copyright (C) 2001 Russell King, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* The UCB1x00 core driver provides basic services for handling IO,
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* the ADC, interrupts, and accessing registers. It is designed
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* such that everything goes through this layer, thereby providing
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* a consistent locking methodology, as well as allowing the drivers
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* to be used on other non-MCP-enabled hardware platforms.
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*
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* Note that all locks are private to this file. Nothing else may
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* touch them.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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2009-10-07 07:09:06 -06:00
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#include <linux/sched.h>
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2005-09-11 03:26:31 -06:00
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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2012-01-21 07:58:28 -07:00
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#include <linux/irq.h>
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2005-09-11 03:26:31 -06:00
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#include <linux/device.h>
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2006-01-12 11:43:35 -07:00
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#include <linux/mutex.h>
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2009-02-10 06:54:57 -07:00
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#include <linux/mfd/ucb1x00.h>
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2012-01-21 09:36:30 -07:00
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#include <linux/pm.h>
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2016-03-30 02:48:08 -06:00
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#include <linux/gpio/driver.h>
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2005-09-11 03:26:31 -06:00
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2006-01-12 11:43:35 -07:00
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static DEFINE_MUTEX(ucb1x00_mutex);
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2005-09-11 03:26:31 -06:00
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static LIST_HEAD(ucb1x00_drivers);
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static LIST_HEAD(ucb1x00_devices);
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/**
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* ucb1x00_io_set_dir - set IO direction
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* @ucb: UCB1x00 structure describing chip
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* @in: bitfield of IO pins to be set as inputs
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* @out: bitfield of IO pins to be set as outputs
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*
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* Set the IO direction of the ten general purpose IO pins on
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* the UCB1x00 chip. The @in bitfield has priority over the
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* @out bitfield, in that if you specify a pin as both input
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* and output, it will end up as an input.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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* This function takes a spinlock, disabling interrupts.
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*/
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void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
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{
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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ucb->io_dir |= out;
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ucb->io_dir &= ~in;
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ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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}
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/**
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* ucb1x00_io_write - set or clear IO outputs
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* @ucb: UCB1x00 structure describing chip
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* @set: bitfield of IO pins to set to logic '1'
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* @clear: bitfield of IO pins to set to logic '0'
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*
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* Set the IO output state of the specified IO pins. The value
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* is retained if the pins are subsequently configured as inputs.
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* The @clear bitfield has priority over the @set bitfield -
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* outputs will be cleared.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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* This function takes a spinlock, disabling interrupts.
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*/
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void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
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{
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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ucb->io_out |= set;
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ucb->io_out &= ~clear;
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ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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}
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/**
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* ucb1x00_io_read - read the current state of the IO pins
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* @ucb: UCB1x00 structure describing chip
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*
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* Return a bitfield describing the logic state of the ten
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* general purpose IO pins.
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*
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* ucb1x00_enable must have been called to enable the comms
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* before using this function.
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*
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2012-01-21 02:33:38 -07:00
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* This function does not take any mutexes or spinlocks.
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2005-09-11 03:26:31 -06:00
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*/
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unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
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{
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return ucb1x00_reg_read(ucb, UCB_IO_DATA);
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}
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2009-02-10 06:50:56 -07:00
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static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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2016-03-30 02:48:08 -06:00
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struct ucb1x00 *ucb = gpiochip_get_data(chip);
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2009-02-10 06:50:56 -07:00
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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if (value)
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ucb->io_out |= 1 << offset;
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else
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ucb->io_out &= ~(1 << offset);
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2012-01-21 11:13:20 -07:00
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ucb1x00_enable(ucb);
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2009-02-10 06:50:56 -07:00
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ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
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2012-01-21 11:13:20 -07:00
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ucb1x00_disable(ucb);
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2009-02-10 06:50:56 -07:00
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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}
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static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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2016-03-30 02:48:08 -06:00
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struct ucb1x00 *ucb = gpiochip_get_data(chip);
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2012-01-21 11:13:20 -07:00
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unsigned val;
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ucb1x00_enable(ucb);
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val = ucb1x00_reg_read(ucb, UCB_IO_DATA);
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ucb1x00_disable(ucb);
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2015-12-22 07:48:33 -07:00
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return !!(val & (1 << offset));
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2009-02-10 06:50:56 -07:00
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}
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static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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2016-03-30 02:48:08 -06:00
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struct ucb1x00 *ucb = gpiochip_get_data(chip);
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2009-02-10 06:50:56 -07:00
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unsigned long flags;
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spin_lock_irqsave(&ucb->io_lock, flags);
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ucb->io_dir &= ~(1 << offset);
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2012-01-21 11:13:20 -07:00
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ucb1x00_enable(ucb);
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2009-02-10 06:50:56 -07:00
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ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
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2012-01-21 11:13:20 -07:00
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ucb1x00_disable(ucb);
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2009-02-10 06:50:56 -07:00
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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return 0;
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}
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static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset
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, int value)
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{
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2016-03-30 02:48:08 -06:00
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struct ucb1x00 *ucb = gpiochip_get_data(chip);
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2009-02-10 06:50:56 -07:00
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unsigned long flags;
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2012-01-21 11:21:50 -07:00
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unsigned old, mask = 1 << offset;
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2009-02-10 06:50:56 -07:00
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spin_lock_irqsave(&ucb->io_lock, flags);
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2012-01-21 11:21:50 -07:00
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old = ucb->io_out;
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2009-02-10 06:50:56 -07:00
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if (value)
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2012-01-21 11:21:50 -07:00
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ucb->io_out |= mask;
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2009-02-10 06:50:56 -07:00
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else
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2012-01-21 11:21:50 -07:00
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ucb->io_out &= ~mask;
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2012-01-21 11:13:20 -07:00
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ucb1x00_enable(ucb);
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2012-01-21 11:21:50 -07:00
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if (old != ucb->io_out)
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ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
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if (!(ucb->io_dir & mask)) {
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ucb->io_dir |= mask;
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ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
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}
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2012-01-21 11:13:20 -07:00
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ucb1x00_disable(ucb);
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2009-02-10 06:50:56 -07:00
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spin_unlock_irqrestore(&ucb->io_lock, flags);
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return 0;
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}
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2012-01-21 07:58:28 -07:00
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static int ucb1x00_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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2016-03-30 02:48:08 -06:00
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struct ucb1x00 *ucb = gpiochip_get_data(chip);
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2012-01-21 07:58:28 -07:00
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return ucb->irq_base > 0 ? ucb->irq_base + offset : -ENXIO;
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}
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2005-09-11 03:26:31 -06:00
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/*
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* UCB1300 data sheet says we must:
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* 1. enable ADC => 5us (including reference startup time)
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* 2. select input => 51*tsibclk => 4.3us
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* 3. start conversion => 102*tsibclk => 8.5us
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* (tsibclk = 1/11981000)
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* Period between SIB 128-bit frames = 10.7us
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*/
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/**
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* ucb1x00_adc_enable - enable the ADC converter
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* @ucb: UCB1x00 structure describing chip
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*
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* Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
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* Any code wishing to use the ADC converter must call this
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* function prior to using it.
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*
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2012-01-21 02:33:38 -07:00
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* This function takes the ADC mutex to prevent two or more
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2005-09-11 03:26:31 -06:00
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* concurrent uses, and therefore may sleep. As a result, it
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* can only be called from process context, not interrupt
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* context.
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*
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* You should release the ADC as soon as possible using
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* ucb1x00_adc_disable.
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*/
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void ucb1x00_adc_enable(struct ucb1x00 *ucb)
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{
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2012-01-21 02:33:38 -07:00
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mutex_lock(&ucb->adc_mutex);
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2005-09-11 03:26:31 -06:00
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ucb->adc_cr |= UCB_ADC_ENA;
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ucb1x00_enable(ucb);
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
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}
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/**
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* ucb1x00_adc_read - read the specified ADC channel
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* @ucb: UCB1x00 structure describing chip
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* @adc_channel: ADC channel mask
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* @sync: wait for syncronisation pulse.
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*
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* Start an ADC conversion and wait for the result. Note that
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* synchronised ADC conversions (via the ADCSYNC pin) must wait
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* until the trigger is asserted and the conversion is finished.
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*
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* This function currently spins waiting for the conversion to
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* complete (2 frames max without sync).
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*
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* If called for a synchronised ADC conversion, it may sleep
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2012-01-21 02:33:38 -07:00
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* with the ADC mutex held.
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2005-09-11 03:26:31 -06:00
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*/
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unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
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{
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unsigned int val;
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if (sync)
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adc_channel |= UCB_ADC_SYNC_ENA;
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
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for (;;) {
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val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
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if (val & UCB_ADC_DAT_VAL)
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break;
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/* yield to other processes */
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(1);
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}
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return UCB_ADC_DAT(val);
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}
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/**
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* ucb1x00_adc_disable - disable the ADC converter
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* @ucb: UCB1x00 structure describing chip
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*
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2012-01-21 02:33:38 -07:00
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* Disable the ADC converter and release the ADC mutex.
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2005-09-11 03:26:31 -06:00
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*/
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void ucb1x00_adc_disable(struct ucb1x00 *ucb)
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{
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ucb->adc_cr &= ~UCB_ADC_ENA;
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ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
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ucb1x00_disable(ucb);
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2012-01-21 02:33:38 -07:00
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mutex_unlock(&ucb->adc_mutex);
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2005-09-11 03:26:31 -06:00
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}
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/*
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* UCB1x00 Interrupt handling.
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*
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* The UCB1x00 can generate interrupts when the SIBCLK is stopped.
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* Since we need to read an internal register, we must re-enable
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* SIBCLK to talk to the chip. We leave the clock running until
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* we have finished processing all interrupts from the chip.
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*/
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2015-09-14 02:42:37 -06:00
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static void ucb1x00_irq(struct irq_desc *desc)
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2005-09-11 03:26:31 -06:00
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{
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2012-01-21 07:58:28 -07:00
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struct ucb1x00 *ucb = irq_desc_get_handler_data(desc);
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2005-09-11 03:26:31 -06:00
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unsigned int isr, i;
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ucb1x00_enable(ucb);
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isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
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ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
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2015-07-13 14:44:57 -06:00
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for (i = 0; i < 16 && isr; i++, isr >>= 1)
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2012-01-21 07:58:28 -07:00
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if (isr & 1)
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generic_handle_irq(ucb->irq_base + i);
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2005-09-11 03:26:31 -06:00
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ucb1x00_disable(ucb);
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}
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2012-01-21 07:58:28 -07:00
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static void ucb1x00_irq_update(struct ucb1x00 *ucb, unsigned mask)
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2005-09-11 03:26:31 -06:00
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{
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2012-01-21 07:58:28 -07:00
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ucb1x00_enable(ucb);
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if (ucb->irq_ris_enbl & mask)
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ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl &
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ucb->irq_mask);
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|
if (ucb->irq_fal_enbl & mask)
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl &
|
|
|
|
ucb->irq_mask);
|
|
|
|
ucb1x00_disable(ucb);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
static void ucb1x00_irq_noop(struct irq_data *data)
|
2005-09-11 03:26:31 -06:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
static void ucb1x00_irq_mask(struct irq_data *data)
|
2005-09-11 03:26:31 -06:00
|
|
|
{
|
2012-01-21 07:58:28 -07:00
|
|
|
struct ucb1x00 *ucb = irq_data_get_irq_chip_data(data);
|
|
|
|
unsigned mask = 1 << (data->irq - ucb->irq_base);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
raw_spin_lock(&ucb->irq_lock);
|
|
|
|
ucb->irq_mask &= ~mask;
|
|
|
|
ucb1x00_irq_update(ucb, mask);
|
|
|
|
raw_spin_unlock(&ucb->irq_lock);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
static void ucb1x00_irq_unmask(struct irq_data *data)
|
2005-09-11 03:26:31 -06:00
|
|
|
{
|
2012-01-21 07:58:28 -07:00
|
|
|
struct ucb1x00 *ucb = irq_data_get_irq_chip_data(data);
|
|
|
|
unsigned mask = 1 << (data->irq - ucb->irq_base);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
raw_spin_lock(&ucb->irq_lock);
|
|
|
|
ucb->irq_mask |= mask;
|
|
|
|
ucb1x00_irq_update(ucb, mask);
|
|
|
|
raw_spin_unlock(&ucb->irq_lock);
|
|
|
|
}
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
static int ucb1x00_irq_set_type(struct irq_data *data, unsigned int type)
|
|
|
|
{
|
|
|
|
struct ucb1x00 *ucb = irq_data_get_irq_chip_data(data);
|
|
|
|
unsigned mask = 1 << (data->irq - ucb->irq_base);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
raw_spin_lock(&ucb->irq_lock);
|
|
|
|
if (type & IRQ_TYPE_EDGE_RISING)
|
|
|
|
ucb->irq_ris_enbl |= mask;
|
|
|
|
else
|
|
|
|
ucb->irq_ris_enbl &= ~mask;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
if (type & IRQ_TYPE_EDGE_FALLING)
|
|
|
|
ucb->irq_fal_enbl |= mask;
|
|
|
|
else
|
|
|
|
ucb->irq_fal_enbl &= ~mask;
|
|
|
|
if (ucb->irq_mask & mask) {
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl &
|
|
|
|
ucb->irq_mask);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl &
|
|
|
|
ucb->irq_mask);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
2012-01-21 07:58:28 -07:00
|
|
|
raw_spin_unlock(&ucb->irq_lock);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
return 0;
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
2012-01-22 13:05:24 -07:00
|
|
|
static int ucb1x00_irq_set_wake(struct irq_data *data, unsigned int on)
|
|
|
|
{
|
|
|
|
struct ucb1x00 *ucb = irq_data_get_irq_chip_data(data);
|
|
|
|
struct ucb1x00_plat_data *pdata = ucb->mcp->attached_device.platform_data;
|
|
|
|
unsigned mask = 1 << (data->irq - ucb->irq_base);
|
|
|
|
|
|
|
|
if (!pdata || !pdata->can_wakeup)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
raw_spin_lock(&ucb->irq_lock);
|
|
|
|
if (on)
|
|
|
|
ucb->irq_wake |= mask;
|
|
|
|
else
|
|
|
|
ucb->irq_wake &= ~mask;
|
|
|
|
raw_spin_unlock(&ucb->irq_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
static struct irq_chip ucb1x00_irqchip = {
|
|
|
|
.name = "ucb1x00",
|
|
|
|
.irq_ack = ucb1x00_irq_noop,
|
|
|
|
.irq_mask = ucb1x00_irq_mask,
|
|
|
|
.irq_unmask = ucb1x00_irq_unmask,
|
|
|
|
.irq_set_type = ucb1x00_irq_set_type,
|
2012-01-22 13:05:24 -07:00
|
|
|
.irq_set_wake = ucb1x00_irq_set_wake,
|
2012-01-21 07:58:28 -07:00
|
|
|
};
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)
|
|
|
|
{
|
|
|
|
struct ucb1x00_dev *dev;
|
2013-07-19 07:19:58 -06:00
|
|
|
int ret;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
|
|
|
dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);
|
2013-07-19 07:19:58 -06:00
|
|
|
if (!dev)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dev->ucb = ucb;
|
|
|
|
dev->drv = drv;
|
|
|
|
|
|
|
|
ret = drv->add(dev);
|
|
|
|
if (ret) {
|
|
|
|
kfree(dev);
|
|
|
|
return ret;
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
2013-07-19 07:19:58 -06:00
|
|
|
|
|
|
|
list_add_tail(&dev->dev_node, &ucb->devs);
|
|
|
|
list_add_tail(&dev->drv_node, &drv->devs);
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)
|
|
|
|
{
|
|
|
|
dev->drv->remove(dev);
|
|
|
|
list_del(&dev->dev_node);
|
|
|
|
list_del(&dev->drv_node);
|
|
|
|
kfree(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Try to probe our interrupt, rather than relying on lots of
|
|
|
|
* hard-coded machine dependencies. For reference, the expected
|
|
|
|
* IRQ mappings are:
|
|
|
|
*
|
|
|
|
* Machine Default IRQ
|
|
|
|
* adsbitsy IRQ_GPCIN4
|
|
|
|
* cerf IRQ_GPIO_UCB1200_IRQ
|
|
|
|
* flexanet IRQ_GPIO_GUI
|
|
|
|
* freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
|
|
|
|
* graphicsclient ADS_EXT_IRQ(8)
|
|
|
|
* graphicsmaster ADS_EXT_IRQ(8)
|
|
|
|
* lart LART_IRQ_UCB1200
|
|
|
|
* omnimeter IRQ_GPIO23
|
|
|
|
* pfs168 IRQ_GPIO_UCB1300_IRQ
|
|
|
|
* simpad IRQ_GPIO_UCB1300_IRQ
|
|
|
|
* shannon SHANNON_IRQ_GPIO_IRQ_CODEC
|
|
|
|
* yopy IRQ_GPIO_UCB1200_IRQ
|
|
|
|
*/
|
|
|
|
static int ucb1x00_detect_irq(struct ucb1x00 *ucb)
|
|
|
|
{
|
|
|
|
unsigned long mask;
|
|
|
|
|
|
|
|
mask = probe_irq_on();
|
2006-06-26 08:26:13 -06:00
|
|
|
if (!mask) {
|
|
|
|
probe_irq_off(mask);
|
2005-09-11 03:26:31 -06:00
|
|
|
return NO_IRQ;
|
2006-06-26 08:26:13 -06:00
|
|
|
}
|
2005-09-11 03:26:31 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable the ADC interrupt.
|
|
|
|
*/
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Cause an ADC interrupt.
|
|
|
|
*/
|
|
|
|
ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for the conversion to complete.
|
|
|
|
*/
|
|
|
|
while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Disable and clear interrupt.
|
|
|
|
*/
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read triggered interrupt.
|
|
|
|
*/
|
|
|
|
return probe_irq_off(mask);
|
|
|
|
}
|
|
|
|
|
2007-09-24 18:03:03 -06:00
|
|
|
static void ucb1x00_release(struct device *dev)
|
2005-10-10 11:22:17 -06:00
|
|
|
{
|
|
|
|
struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);
|
|
|
|
kfree(ucb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct class ucb1x00_class = {
|
|
|
|
.name = "ucb1x00",
|
2007-09-24 18:03:03 -06:00
|
|
|
.dev_release = ucb1x00_release,
|
2005-10-10 11:22:17 -06:00
|
|
|
};
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
static int ucb1x00_probe(struct mcp *mcp)
|
|
|
|
{
|
2012-01-22 12:02:25 -07:00
|
|
|
struct ucb1x00_plat_data *pdata = mcp->attached_device.platform_data;
|
2005-09-11 03:26:31 -06:00
|
|
|
struct ucb1x00_driver *drv;
|
2012-01-22 12:02:25 -07:00
|
|
|
struct ucb1x00 *ucb;
|
2012-01-21 07:58:28 -07:00
|
|
|
unsigned id, i, irq_base;
|
2005-09-11 03:26:31 -06:00
|
|
|
int ret = -ENODEV;
|
|
|
|
|
2012-01-22 12:02:25 -07:00
|
|
|
/* Tell the platform to deassert the UCB1x00 reset */
|
|
|
|
if (pdata && pdata->reset)
|
|
|
|
pdata->reset(UCB_RST_PROBE);
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
mcp_enable(mcp);
|
|
|
|
id = mcp_reg_read(mcp, UCB_ID);
|
2012-01-21 11:24:17 -07:00
|
|
|
mcp_disable(mcp);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-20 10:38:58 -07:00
|
|
|
if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) {
|
|
|
|
printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
|
2012-01-21 11:24:17 -07:00
|
|
|
goto out;
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
some kmalloc/memset ->kzalloc (tree wide)
Transform some calls to kmalloc/memset to a single kzalloc (or kcalloc).
Here is a short excerpt of the semantic patch performing
this transformation:
@@
type T2;
expression x;
identifier f,fld;
expression E;
expression E1,E2;
expression e1,e2,e3,y;
statement S;
@@
x =
- kmalloc
+ kzalloc
(E1,E2)
... when != \(x->fld=E;\|y=f(...,x,...);\|f(...,x,...);\|x=E;\|while(...) S\|for(e1;e2;e3) S\)
- memset((T2)x,0,E1);
@@
expression E1,E2,E3;
@@
- kzalloc(E1 * E2,E3)
+ kcalloc(E1,E2,E3)
[akpm@linux-foundation.org: get kcalloc args the right way around]
Signed-off-by: Yoann Padioleau <padator@wanadoo.fr>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Acked-by: Russell King <rmk@arm.linux.org.uk>
Cc: Bryan Wu <bryan.wu@analog.com>
Acked-by: Jiri Slaby <jirislaby@gmail.com>
Cc: Dave Airlie <airlied@linux.ie>
Acked-by: Roland Dreier <rolandd@cisco.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Acked-by: Dmitry Torokhov <dtor@mail.ru>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Acked-by: Pierre Ossman <drzeus-list@drzeus.cx>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: "David S. Miller" <davem@davemloft.net>
Acked-by: Greg KH <greg@kroah.com>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-19 02:49:03 -06:00
|
|
|
ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL);
|
2005-09-11 03:26:31 -06:00
|
|
|
ret = -ENOMEM;
|
|
|
|
if (!ucb)
|
2012-01-21 11:24:17 -07:00
|
|
|
goto out;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:45:17 -07:00
|
|
|
device_initialize(&ucb->dev);
|
2007-09-24 18:03:03 -06:00
|
|
|
ucb->dev.class = &ucb1x00_class;
|
|
|
|
ucb->dev.parent = &mcp->attached_device;
|
2012-01-20 10:38:58 -07:00
|
|
|
dev_set_name(&ucb->dev, "ucb1x00");
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
raw_spin_lock_init(&ucb->irq_lock);
|
2005-09-11 03:26:31 -06:00
|
|
|
spin_lock_init(&ucb->io_lock);
|
2012-01-21 02:33:38 -07:00
|
|
|
mutex_init(&ucb->adc_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-20 10:38:58 -07:00
|
|
|
ucb->id = id;
|
2005-09-11 03:26:31 -06:00
|
|
|
ucb->mcp = mcp;
|
2012-01-21 07:45:17 -07:00
|
|
|
|
|
|
|
ret = device_add(&ucb->dev);
|
|
|
|
if (ret)
|
|
|
|
goto err_dev_add;
|
|
|
|
|
2012-01-21 11:24:17 -07:00
|
|
|
ucb1x00_enable(ucb);
|
2005-09-11 03:26:31 -06:00
|
|
|
ucb->irq = ucb1x00_detect_irq(ucb);
|
2012-01-21 11:24:17 -07:00
|
|
|
ucb1x00_disable(ucb);
|
2005-09-11 03:26:31 -06:00
|
|
|
if (ucb->irq == NO_IRQ) {
|
2012-01-21 07:45:17 -07:00
|
|
|
dev_err(&ucb->dev, "IRQ probe failed\n");
|
2005-09-11 03:26:31 -06:00
|
|
|
ret = -ENODEV;
|
2012-01-21 07:45:17 -07:00
|
|
|
goto err_no_irq;
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
2009-02-10 06:50:56 -07:00
|
|
|
ucb->gpio.base = -1;
|
2012-01-21 07:58:28 -07:00
|
|
|
irq_base = pdata ? pdata->irq_base : 0;
|
|
|
|
ucb->irq_base = irq_alloc_descs(-1, irq_base, 16, -1);
|
|
|
|
if (ucb->irq_base < 0) {
|
|
|
|
dev_err(&ucb->dev, "unable to allocate 16 irqs: %d\n",
|
|
|
|
ucb->irq_base);
|
2013-09-11 05:20:37 -06:00
|
|
|
ret = ucb->irq_base;
|
2012-01-21 07:58:28 -07:00
|
|
|
goto err_irq_alloc;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
unsigned irq = ucb->irq_base + i;
|
|
|
|
|
|
|
|
irq_set_chip_and_handler(irq, &ucb1x00_irqchip, handle_edge_irq);
|
|
|
|
irq_set_chip_data(irq, ucb);
|
2015-07-27 14:55:20 -06:00
|
|
|
irq_clear_status_flags(irq, IRQ_NOREQUEST);
|
2012-01-21 07:58:28 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
irq_set_irq_type(ucb->irq, IRQ_TYPE_EDGE_RISING);
|
2015-06-16 16:06:25 -06:00
|
|
|
irq_set_chained_handler_and_data(ucb->irq, ucb1x00_irq, ucb);
|
2012-01-21 07:58:28 -07:00
|
|
|
|
2012-01-20 15:13:52 -07:00
|
|
|
if (pdata && pdata->gpio_base) {
|
2009-02-10 06:50:56 -07:00
|
|
|
ucb->gpio.label = dev_name(&ucb->dev);
|
2015-11-04 01:56:26 -07:00
|
|
|
ucb->gpio.parent = &ucb->dev;
|
2012-01-21 07:47:00 -07:00
|
|
|
ucb->gpio.owner = THIS_MODULE;
|
2012-01-20 15:13:52 -07:00
|
|
|
ucb->gpio.base = pdata->gpio_base;
|
2009-02-10 06:50:56 -07:00
|
|
|
ucb->gpio.ngpio = 10;
|
|
|
|
ucb->gpio.set = ucb1x00_gpio_set;
|
|
|
|
ucb->gpio.get = ucb1x00_gpio_get;
|
|
|
|
ucb->gpio.direction_input = ucb1x00_gpio_direction_input;
|
|
|
|
ucb->gpio.direction_output = ucb1x00_gpio_direction_output;
|
2012-01-21 07:58:28 -07:00
|
|
|
ucb->gpio.to_irq = ucb1x00_to_irq;
|
2016-03-30 02:48:08 -06:00
|
|
|
ret = gpiochip_add_data(&ucb->gpio, ucb);
|
2009-02-10 06:50:56 -07:00
|
|
|
if (ret)
|
2012-01-21 07:45:17 -07:00
|
|
|
goto err_gpio_add;
|
2009-02-10 06:50:56 -07:00
|
|
|
} else
|
|
|
|
dev_info(&ucb->dev, "gpio_base not set so no gpiolib support");
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
mcp_set_drvdata(mcp, ucb);
|
|
|
|
|
2012-01-22 13:05:24 -07:00
|
|
|
if (pdata)
|
|
|
|
device_set_wakeup_capable(&ucb->dev, pdata->can_wakeup);
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
INIT_LIST_HEAD(&ucb->devs);
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2012-01-21 08:35:01 -07:00
|
|
|
list_add_tail(&ucb->node, &ucb1x00_devices);
|
2005-09-11 03:26:31 -06:00
|
|
|
list_for_each_entry(drv, &ucb1x00_drivers, node) {
|
|
|
|
ucb1x00_add_dev(ucb, drv);
|
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2009-02-10 06:50:56 -07:00
|
|
|
|
2012-01-22 12:02:25 -07:00
|
|
|
return ret;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-21 07:45:17 -07:00
|
|
|
err_gpio_add:
|
2012-01-21 07:58:28 -07:00
|
|
|
irq_set_chained_handler(ucb->irq, NULL);
|
|
|
|
err_irq_alloc:
|
|
|
|
if (ucb->irq_base > 0)
|
|
|
|
irq_free_descs(ucb->irq_base, 16);
|
2012-01-21 07:45:17 -07:00
|
|
|
err_no_irq:
|
|
|
|
device_del(&ucb->dev);
|
|
|
|
err_dev_add:
|
|
|
|
put_device(&ucb->dev);
|
2005-09-11 03:26:31 -06:00
|
|
|
out:
|
2012-01-22 12:02:25 -07:00
|
|
|
if (pdata && pdata->reset)
|
|
|
|
pdata->reset(UCB_RST_PROBE_FAIL);
|
2005-09-11 03:26:31 -06:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ucb1x00_remove(struct mcp *mcp)
|
|
|
|
{
|
2012-01-22 12:02:25 -07:00
|
|
|
struct ucb1x00_plat_data *pdata = mcp->attached_device.platform_data;
|
2005-09-11 03:26:31 -06:00
|
|
|
struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
|
|
|
|
struct list_head *l, *n;
|
|
|
|
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
list_del(&ucb->node);
|
|
|
|
list_for_each_safe(l, n, &ucb->devs) {
|
|
|
|
struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);
|
|
|
|
ucb1x00_remove_dev(dev);
|
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2014-07-12 14:30:14 -06:00
|
|
|
if (ucb->gpio.base != -1)
|
|
|
|
gpiochip_remove(&ucb->gpio);
|
2009-02-10 06:50:56 -07:00
|
|
|
|
2012-01-21 07:58:28 -07:00
|
|
|
irq_set_chained_handler(ucb->irq, NULL);
|
|
|
|
irq_free_descs(ucb->irq_base, 16);
|
2007-09-24 18:03:03 -06:00
|
|
|
device_unregister(&ucb->dev);
|
2012-01-22 12:02:25 -07:00
|
|
|
|
|
|
|
if (pdata && pdata->reset)
|
|
|
|
pdata->reset(UCB_RST_REMOVE);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
int ucb1x00_register_driver(struct ucb1x00_driver *drv)
|
|
|
|
{
|
|
|
|
struct ucb1x00 *ucb;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&drv->devs);
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2012-01-21 08:35:01 -07:00
|
|
|
list_add_tail(&drv->node, &ucb1x00_drivers);
|
2005-09-11 03:26:31 -06:00
|
|
|
list_for_each_entry(ucb, &ucb1x00_devices, node) {
|
|
|
|
ucb1x00_add_dev(ucb, drv);
|
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)
|
|
|
|
{
|
|
|
|
struct list_head *n, *l;
|
|
|
|
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
list_del(&drv->node);
|
|
|
|
list_for_each_safe(l, n, &drv->devs) {
|
|
|
|
struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);
|
|
|
|
ucb1x00_remove_dev(dev);
|
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
|
|
|
|
2013-08-01 23:45:25 -06:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2012-01-21 09:36:30 -07:00
|
|
|
static int ucb1x00_suspend(struct device *dev)
|
2005-09-11 03:26:31 -06:00
|
|
|
{
|
2013-07-30 02:10:05 -06:00
|
|
|
struct ucb1x00_plat_data *pdata = dev_get_platdata(dev);
|
2012-01-21 09:36:30 -07:00
|
|
|
struct ucb1x00 *ucb = dev_get_drvdata(dev);
|
|
|
|
struct ucb1x00_dev *udev;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2012-01-21 09:36:30 -07:00
|
|
|
list_for_each_entry(udev, &ucb->devs, dev_node) {
|
|
|
|
if (udev->drv->suspend)
|
|
|
|
udev->drv->suspend(udev);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2012-01-22 13:05:24 -07:00
|
|
|
|
|
|
|
if (ucb->irq_wake) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&ucb->irq_lock, flags);
|
|
|
|
ucb1x00_enable(ucb);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl &
|
|
|
|
ucb->irq_wake);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl &
|
|
|
|
ucb->irq_wake);
|
|
|
|
ucb1x00_disable(ucb);
|
|
|
|
raw_spin_unlock_irqrestore(&ucb->irq_lock, flags);
|
|
|
|
|
|
|
|
enable_irq_wake(ucb->irq);
|
|
|
|
} else if (pdata && pdata->reset)
|
|
|
|
pdata->reset(UCB_RST_SUSPEND);
|
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-01-21 09:36:30 -07:00
|
|
|
static int ucb1x00_resume(struct device *dev)
|
2005-09-11 03:26:31 -06:00
|
|
|
{
|
2013-07-30 02:10:05 -06:00
|
|
|
struct ucb1x00_plat_data *pdata = dev_get_platdata(dev);
|
2012-01-21 09:36:30 -07:00
|
|
|
struct ucb1x00 *ucb = dev_get_drvdata(dev);
|
|
|
|
struct ucb1x00_dev *udev;
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2012-01-22 13:05:24 -07:00
|
|
|
if (!ucb->irq_wake && pdata && pdata->reset)
|
|
|
|
pdata->reset(UCB_RST_RESUME);
|
|
|
|
|
2012-01-21 11:13:20 -07:00
|
|
|
ucb1x00_enable(ucb);
|
2012-01-21 11:15:24 -07:00
|
|
|
ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
|
2009-02-10 06:50:56 -07:00
|
|
|
ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
|
2012-01-22 13:05:24 -07:00
|
|
|
|
|
|
|
if (ucb->irq_wake) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
raw_spin_lock_irqsave(&ucb->irq_lock, flags);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl &
|
|
|
|
ucb->irq_mask);
|
|
|
|
ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl &
|
|
|
|
ucb->irq_mask);
|
|
|
|
raw_spin_unlock_irqrestore(&ucb->irq_lock, flags);
|
|
|
|
|
|
|
|
disable_irq_wake(ucb->irq);
|
|
|
|
}
|
2012-01-21 11:13:20 -07:00
|
|
|
ucb1x00_disable(ucb);
|
2012-01-22 13:05:24 -07:00
|
|
|
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_lock(&ucb1x00_mutex);
|
2012-01-21 09:36:30 -07:00
|
|
|
list_for_each_entry(udev, &ucb->devs, dev_node) {
|
|
|
|
if (udev->drv->resume)
|
|
|
|
udev->drv->resume(udev);
|
2005-09-11 03:26:31 -06:00
|
|
|
}
|
2006-01-12 11:43:35 -07:00
|
|
|
mutex_unlock(&ucb1x00_mutex);
|
2005-09-11 03:26:31 -06:00
|
|
|
return 0;
|
|
|
|
}
|
2013-08-01 23:45:25 -06:00
|
|
|
#endif
|
2005-09-11 03:26:31 -06:00
|
|
|
|
2014-02-27 04:39:18 -07:00
|
|
|
static SIMPLE_DEV_PM_OPS(ucb1x00_pm_ops, ucb1x00_suspend, ucb1x00_resume);
|
2012-01-21 09:36:30 -07:00
|
|
|
|
2005-09-11 03:26:31 -06:00
|
|
|
static struct mcp_driver ucb1x00_driver = {
|
|
|
|
.drv = {
|
|
|
|
.name = "ucb1x00",
|
2012-01-21 09:33:38 -07:00
|
|
|
.owner = THIS_MODULE,
|
2012-01-21 09:36:30 -07:00
|
|
|
.pm = &ucb1x00_pm_ops,
|
2005-09-11 03:26:31 -06:00
|
|
|
},
|
|
|
|
.probe = ucb1x00_probe,
|
|
|
|
.remove = ucb1x00_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init ucb1x00_init(void)
|
|
|
|
{
|
|
|
|
int ret = class_register(&ucb1x00_class);
|
|
|
|
if (ret == 0) {
|
|
|
|
ret = mcp_driver_register(&ucb1x00_driver);
|
|
|
|
if (ret)
|
|
|
|
class_unregister(&ucb1x00_class);
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit ucb1x00_exit(void)
|
|
|
|
{
|
|
|
|
mcp_driver_unregister(&ucb1x00_driver);
|
|
|
|
class_unregister(&ucb1x00_class);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(ucb1x00_init);
|
|
|
|
module_exit(ucb1x00_exit);
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(ucb1x00_io_set_dir);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_io_write);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_io_read);
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(ucb1x00_adc_enable);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_adc_read);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_adc_disable);
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(ucb1x00_register_driver);
|
|
|
|
EXPORT_SYMBOL(ucb1x00_unregister_driver);
|
|
|
|
|
2012-01-21 09:33:38 -07:00
|
|
|
MODULE_ALIAS("mcp:ucb1x00");
|
2005-09-11 03:26:31 -06:00
|
|
|
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
|
|
|
|
MODULE_DESCRIPTION("UCB1x00 core driver");
|
|
|
|
MODULE_LICENSE("GPL");
|