2005-04-16 16:20:36 -06:00
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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2014-04-25 17:49:14 -06:00
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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2005-04-16 16:20:36 -06:00
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*
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* Nov 7, 2000
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* Modification to allow integration with Linux kernel
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*
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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2005-04-28 07:39:10 -06:00
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*/
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2005-10-23 06:44:31 -06:00
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#ifndef __ARCH_MIPS_MATH_EMU_IEEE754_H
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#define __ARCH_MIPS_MATH_EMU_IEEE754_H
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2005-04-16 16:20:36 -06:00
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2014-04-15 16:47:59 -06:00
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#include <linux/compiler.h>
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2005-04-28 07:39:10 -06:00
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#include <asm/byteorder.h>
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2014-04-19 06:20:54 -06:00
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#include <linux/kernel.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/types.h>
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2005-04-28 07:39:10 -06:00
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#include <linux/sched.h>
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2014-04-15 16:40:02 -06:00
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#include <asm/bitfield.h>
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754dp {
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2005-04-16 16:20:36 -06:00
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struct {
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2014-04-15 16:40:02 -06:00
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__BITFIELD_FIELD(unsigned int sign:1,
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__BITFIELD_FIELD(unsigned int bexp:11,
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__BITFIELD_FIELD(u64 mant:52,
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;)))
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2014-04-25 07:48:40 -06:00
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};
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2005-04-16 16:20:36 -06:00
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u64 bits;
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2014-04-15 17:31:11 -06:00
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};
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754sp {
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2014-04-25 07:48:40 -06:00
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struct {
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__BITFIELD_FIELD(unsigned sign:1,
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__BITFIELD_FIELD(unsigned bexp:8,
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__BITFIELD_FIELD(unsigned mant:23,
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;)))
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};
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2005-04-16 16:20:36 -06:00
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u32 bits;
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2014-04-15 17:31:11 -06:00
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};
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2005-04-16 16:20:36 -06:00
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/*
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* single precision (often aka float)
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*/
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2014-04-15 17:31:11 -06:00
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int ieee754sp_class(union ieee754sp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754sp ieee754sp_abs(union ieee754sp x);
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union ieee754sp ieee754sp_neg(union ieee754sp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y);
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union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y);
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union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y);
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union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754sp ieee754sp_fint(int x);
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union ieee754sp ieee754sp_flong(s64 x);
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union ieee754sp ieee754sp_fdp(union ieee754dp x);
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MIPS: math-emu: RINT.<D|S>: Fix several problems by reimplementation
Reimplement RINT.<D|S> kernel emulation so that all RINT.<D|S>
specifications are met.
For the sake of simplicity, let's analyze RINT.S only. Prior to
this patch, RINT.S emulation was essentially implemented as (in
pseudocode) <output> = ieee754sp_flong(ieee754sp_tlong(<input>)),
where ieee754sp_tlong() and ieee754sp_flong() are functions
providing conversion from double to integer, and from integer
to double, respectively. On surface, this implementation looks
correct, but actually fails in many cases. Following problems
were detected:
1. NaN and infinity cases will not be handled properly. The
function ieee754sp_flong() never returns NaN nor infinity.
2. For RINT.S, for all inputs larger than LONG_MAX, and smaller
than FLT_MAX, the result will be wrong, and the overflow
exception will be erroneously set. A similar problem for
negative inputs exists as well.
3. For some rounding modes, for some negative inputs close to zero,
the return value will be zero, and should be -zero. This is
because ieee754sp_flong() never returns -zero.
This patch removes the problems above by implementing dedicated
functions for RINT.<D|S> emulation.
The core of the new function functionality is adapted version of
the core of the function ieee754sp_tlong(). However, there are many
details that are implemented to match RINT.<D|S> specification. It
should be said that the functionality of ieee754sp_tlong() actually
closely corresponds to CVT.L.S instruction, and it is used while
emulating CVT.L.S. However, RINT.S and CVT.L.S instructions differ
in many aspects. This patch fulfills missing support for RINT.<D|S>.
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17141/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-21 06:24:48 -06:00
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union ieee754sp ieee754sp_rint(union ieee754sp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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int ieee754sp_tint(union ieee754sp x);
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s64 ieee754sp_tlong(union ieee754sp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cop, int sig);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754sp ieee754sp_sqrt(union ieee754sp x);
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2005-04-16 16:20:36 -06:00
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2015-08-13 01:56:31 -06:00
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union ieee754sp ieee754sp_maddf(union ieee754sp z, union ieee754sp x,
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union ieee754sp y);
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2015-08-13 01:56:32 -06:00
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union ieee754sp ieee754sp_msubf(union ieee754sp z, union ieee754sp x,
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union ieee754sp y);
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2015-08-13 01:56:34 -06:00
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int ieee754sp_2008class(union ieee754sp x);
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2015-08-13 01:56:35 -06:00
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union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y);
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union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y);
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2015-08-13 01:56:36 -06:00
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union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y);
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union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y);
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2015-08-13 01:56:31 -06:00
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2005-04-16 16:20:36 -06:00
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/*
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* double precision (often aka double)
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*/
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2014-04-15 17:31:11 -06:00
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int ieee754dp_class(union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y);
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union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y);
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union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y);
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union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754dp ieee754dp_abs(union ieee754dp x);
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union ieee754dp ieee754dp_neg(union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754dp ieee754dp_fint(int x);
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union ieee754dp ieee754dp_flong(s64 x);
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union ieee754dp ieee754dp_fsp(union ieee754sp x);
|
MIPS: math-emu: RINT.<D|S>: Fix several problems by reimplementation
Reimplement RINT.<D|S> kernel emulation so that all RINT.<D|S>
specifications are met.
For the sake of simplicity, let's analyze RINT.S only. Prior to
this patch, RINT.S emulation was essentially implemented as (in
pseudocode) <output> = ieee754sp_flong(ieee754sp_tlong(<input>)),
where ieee754sp_tlong() and ieee754sp_flong() are functions
providing conversion from double to integer, and from integer
to double, respectively. On surface, this implementation looks
correct, but actually fails in many cases. Following problems
were detected:
1. NaN and infinity cases will not be handled properly. The
function ieee754sp_flong() never returns NaN nor infinity.
2. For RINT.S, for all inputs larger than LONG_MAX, and smaller
than FLT_MAX, the result will be wrong, and the overflow
exception will be erroneously set. A similar problem for
negative inputs exists as well.
3. For some rounding modes, for some negative inputs close to zero,
the return value will be zero, and should be -zero. This is
because ieee754sp_flong() never returns -zero.
This patch removes the problems above by implementing dedicated
functions for RINT.<D|S> emulation.
The core of the new function functionality is adapted version of
the core of the function ieee754sp_tlong(). However, there are many
details that are implemented to match RINT.<D|S> specification. It
should be said that the functionality of ieee754sp_tlong() actually
closely corresponds to CVT.L.S instruction, and it is used while
emulating CVT.L.S. However, RINT.S and CVT.L.S instructions differ
in many aspects. This patch fulfills missing support for RINT.<D|S>.
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17141/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-21 06:24:48 -06:00
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union ieee754dp ieee754dp_rint(union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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int ieee754dp_tint(union ieee754dp x);
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s64 ieee754dp_tlong(union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cop, int sig);
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2005-04-16 16:20:36 -06:00
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2014-04-15 17:31:11 -06:00
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union ieee754dp ieee754dp_sqrt(union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2015-08-13 01:56:31 -06:00
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union ieee754dp ieee754dp_maddf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y);
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2015-08-13 01:56:32 -06:00
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union ieee754dp ieee754dp_msubf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y);
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2015-08-13 01:56:34 -06:00
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int ieee754dp_2008class(union ieee754dp x);
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2015-08-13 01:56:35 -06:00
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union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y);
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union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y);
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2015-08-13 01:56:36 -06:00
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union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y);
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union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y);
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2005-04-16 16:20:36 -06:00
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/* 5 types of floating point number
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*/
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2014-04-18 16:36:32 -06:00
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enum {
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IEEE754_CLASS_NORM = 0x00,
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IEEE754_CLASS_ZERO = 0x01,
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IEEE754_CLASS_DNORM = 0x02,
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IEEE754_CLASS_INF = 0x03,
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IEEE754_CLASS_SNAN = 0x04,
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IEEE754_CLASS_QNAN = 0x05,
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};
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2005-04-16 16:20:36 -06:00
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/* exception numbers */
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#define IEEE754_INEXACT 0x01
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#define IEEE754_UNDERFLOW 0x02
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#define IEEE754_OVERFLOW 0x04
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#define IEEE754_ZERO_DIVIDE 0x08
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#define IEEE754_INVALID_OPERATION 0x10
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/* cmp operators
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*/
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#define IEEE754_CLT 0x01
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#define IEEE754_CEQ 0x02
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#define IEEE754_CGT 0x04
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#define IEEE754_CUN 0x08
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2005-04-28 07:39:10 -06:00
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/*
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* The control status register
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*/
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struct _ieee754_csr {
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2015-04-03 16:27:38 -06:00
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__BITFIELD_FIELD(unsigned fcc:7, /* condition[7:1] */
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__BITFIELD_FIELD(unsigned nod:1, /* set 1 for no denormals */
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__BITFIELD_FIELD(unsigned c:1, /* condition[0] */
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__BITFIELD_FIELD(unsigned pad0:3,
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__BITFIELD_FIELD(unsigned abs2008:1, /* IEEE 754-2008 ABS/NEG.fmt */
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__BITFIELD_FIELD(unsigned nan2008:1, /* IEEE 754-2008 NaN mode */
|
2014-04-15 16:40:02 -06:00
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__BITFIELD_FIELD(unsigned cx:6, /* exceptions this operation */
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__BITFIELD_FIELD(unsigned mx:5, /* exception enable mask */
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__BITFIELD_FIELD(unsigned sx:5, /* exceptions total */
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__BITFIELD_FIELD(unsigned rm:2, /* current rounding mode */
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2015-04-03 16:27:38 -06:00
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;))))))))))
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2005-04-16 16:20:36 -06:00
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};
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2006-05-15 10:26:03 -06:00
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#define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31))
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2005-04-16 16:20:36 -06:00
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2017-11-02 05:13:59 -06:00
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static inline unsigned int ieee754_getrm(void)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.rm);
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}
|
2017-11-02 05:13:59 -06:00
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static inline unsigned int ieee754_setrm(unsigned int rm)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.rm = rm);
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}
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/*
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* get current exceptions
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*/
|
2017-11-02 05:13:59 -06:00
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static inline unsigned int ieee754_getcx(void)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.cx);
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}
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/* test for current exception condition
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*/
|
2017-11-02 05:13:59 -06:00
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static inline int ieee754_cxtest(unsigned int n)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.cx & n);
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}
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/*
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* get sticky exceptions
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*/
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2017-11-02 05:13:59 -06:00
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static inline unsigned int ieee754_getsx(void)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.sx);
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}
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/* clear sticky conditions
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*/
|
2017-11-02 05:13:59 -06:00
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static inline unsigned int ieee754_clrsx(void)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.sx = 0);
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}
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/* test for sticky exception condition
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*/
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2017-11-02 05:13:59 -06:00
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static inline int ieee754_sxtest(unsigned int n)
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2005-04-16 16:20:36 -06:00
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{
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return (ieee754_csr.sx & n);
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}
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/* debugging */
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2014-04-15 17:31:11 -06:00
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union ieee754sp ieee754sp_dump(char *s, union ieee754sp x);
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union ieee754dp ieee754dp_dump(char *s, union ieee754dp x);
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2005-04-16 16:20:36 -06:00
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2015-04-03 16:24:09 -06:00
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#define IEEE754_SPCVAL_PZERO 0 /* +0.0 */
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#define IEEE754_SPCVAL_NZERO 1 /* -0.0 */
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#define IEEE754_SPCVAL_PONE 2 /* +1.0 */
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#define IEEE754_SPCVAL_NONE 3 /* -1.0 */
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#define IEEE754_SPCVAL_PTEN 4 /* +10.0 */
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#define IEEE754_SPCVAL_NTEN 5 /* -10.0 */
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#define IEEE754_SPCVAL_PINFINITY 6 /* +inf */
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#define IEEE754_SPCVAL_NINFINITY 7 /* -inf */
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2015-11-12 17:47:28 -07:00
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#define IEEE754_SPCVAL_INDEF_LEG 8 /* legacy quiet NaN */
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#define IEEE754_SPCVAL_INDEF_2008 9 /* IEEE 754-2008 quiet NaN */
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#define IEEE754_SPCVAL_PMAX 10 /* +max norm */
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#define IEEE754_SPCVAL_NMAX 11 /* -max norm */
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#define IEEE754_SPCVAL_PMIN 12 /* +min norm */
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#define IEEE754_SPCVAL_NMIN 13 /* -min norm */
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#define IEEE754_SPCVAL_PMIND 14 /* +min denorm */
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#define IEEE754_SPCVAL_NMIND 15 /* -min denorm */
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#define IEEE754_SPCVAL_P1E31 16 /* + 1.0e31 */
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#define IEEE754_SPCVAL_P1E63 17 /* + 1.0e63 */
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2005-04-16 16:20:36 -06:00
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2014-04-25 07:48:40 -06:00
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extern const union ieee754dp __ieee754dp_spcvals[];
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extern const union ieee754sp __ieee754sp_spcvals[];
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2014-04-15 17:31:11 -06:00
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#define ieee754dp_spcvals ((const union ieee754dp *)__ieee754dp_spcvals)
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#define ieee754sp_spcvals ((const union ieee754sp *)__ieee754sp_spcvals)
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2005-04-16 16:20:36 -06:00
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2005-04-28 07:39:10 -06:00
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/*
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* Return infinity with given sign
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*/
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#define ieee754dp_inf(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
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#define ieee754dp_zero(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
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#define ieee754dp_one(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
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#define ieee754dp_ten(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
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2015-11-12 17:47:28 -07:00
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#define ieee754dp_indef() (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF_LEG + \
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ieee754_csr.nan2008])
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2005-04-28 07:39:10 -06:00
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#define ieee754dp_max(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
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#define ieee754dp_min(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
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#define ieee754dp_mind(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
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#define ieee754dp_1e31() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
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#define ieee754dp_1e63() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
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#define ieee754sp_inf(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
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#define ieee754sp_zero(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
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#define ieee754sp_one(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
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#define ieee754sp_ten(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
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2015-11-12 17:47:28 -07:00
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#define ieee754sp_indef() (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF_LEG + \
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ieee754_csr.nan2008])
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2005-04-28 07:39:10 -06:00
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#define ieee754sp_max(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
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#define ieee754sp_min(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
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#define ieee754sp_mind(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
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#define ieee754sp_1e31() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
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#define ieee754sp_1e63() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
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/*
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|
* Indefinite integer value
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*/
|
2014-04-19 06:20:54 -06:00
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static inline int ieee754si_indef(void)
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{
|
2015-11-12 17:47:28 -07:00
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return ieee754_csr.nan2008 ? 0 : INT_MAX;
|
2014-04-19 06:20:54 -06:00
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}
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static inline s64 ieee754di_indef(void)
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|
{
|
2015-11-12 17:47:28 -07:00
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|
return ieee754_csr.nan2008 ? 0 : S64_MAX;
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}
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|
/*
|
|
|
|
* Overflow integer value
|
|
|
|
*/
|
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|
static inline int ieee754si_overflow(int xs)
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|
|
{
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|
return ieee754_csr.nan2008 && xs ? INT_MIN : INT_MAX;
|
|
|
|
}
|
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|
static inline s64 ieee754di_overflow(int xs)
|
|
|
|
{
|
|
|
|
return ieee754_csr.nan2008 && xs ? S64_MIN : S64_MAX;
|
2014-04-19 06:20:54 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* result types for xctx.rt */
|
|
|
|
#define IEEE754_RT_SP 0
|
|
|
|
#define IEEE754_RT_DP 1
|
|
|
|
#define IEEE754_RT_XP 2
|
|
|
|
#define IEEE754_RT_SI 3
|
|
|
|
#define IEEE754_RT_DI 4
|
|
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|
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|
|
|
/* compat */
|
|
|
|
#define ieee754dp_fix(x) ieee754dp_tint(x)
|
|
|
|
#define ieee754sp_fix(x) ieee754sp_tint(x)
|
2005-10-23 06:44:31 -06:00
|
|
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|
|
|
|
#endif /* __ARCH_MIPS_MATH_EMU_IEEE754_H */
|