2005-04-16 16:20:36 -06:00
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/* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
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* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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2005-09-24 22:28:13 -06:00
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*
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2005-04-16 16:20:36 -06:00
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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2005-09-24 22:28:13 -06:00
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*
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2005-04-16 16:20:36 -06:00
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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* Keith Whitwell <keith@tungstengraphics.com>
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* Abraham vd Merwe <abraham@2d3d.co.za>
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "i830_drm.h"
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#include "i830_drv.h"
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#include <linux/interrupt.h> /* For task queue support */
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2010-07-10 15:51:39 -06:00
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#include <linux/smp_lock.h>
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2008-02-13 16:03:17 -07:00
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#include <linux/pagemap.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/delay.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/uaccess.h>
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#define I830_BUF_FREE 2
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#define I830_BUF_CLIENT 1
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2007-11-04 19:50:58 -07:00
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#define I830_BUF_HARDWARE 0
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2005-04-16 16:20:36 -06:00
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#define I830_BUF_UNMAPPED 0
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#define I830_BUF_MAPPED 1
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2007-07-11 00:17:42 -06:00
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static struct drm_buf *i830_freelist_get(struct drm_device * dev)
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2005-04-16 16:20:36 -06:00
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{
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2007-07-11 00:32:08 -06:00
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struct drm_device_dma *dma = dev->dma;
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2005-09-24 22:28:13 -06:00
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int i;
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int used;
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2005-04-16 16:20:36 -06:00
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/* Linear search might not be the best solution */
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2005-09-24 22:28:13 -06:00
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for (i = 0; i < dma->buf_count; i++) {
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2007-07-11 00:17:42 -06:00
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struct drm_buf *buf = dma->buflist[i];
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2005-09-24 22:28:13 -06:00
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drm_i830_buf_priv_t *buf_priv = buf->dev_private;
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2005-04-16 16:20:36 -06:00
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/* In use is already a pointer */
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2005-09-24 22:28:13 -06:00
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used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
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2005-04-16 16:20:36 -06:00
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I830_BUF_CLIENT);
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2010-07-14 16:14:43 -06:00
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if (used == I830_BUF_FREE)
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2005-04-16 16:20:36 -06:00
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return buf;
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}
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2005-09-24 22:28:13 -06:00
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return NULL;
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2005-04-16 16:20:36 -06:00
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}
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/* This should only be called if the buffer is not sent to the hardware
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* yet, the hardware updates in use for us once its on the ring buffer.
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*/
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2010-07-14 16:14:43 -06:00
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static int i830_freelist_put(struct drm_device *dev, struct drm_buf *buf)
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2005-04-16 16:20:36 -06:00
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{
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2005-09-24 22:28:13 -06:00
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drm_i830_buf_priv_t *buf_priv = buf->dev_private;
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int used;
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/* In use is already a pointer */
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used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
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if (used != I830_BUF_CLIENT) {
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DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
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return -EINVAL;
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2005-04-16 16:20:36 -06:00
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}
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2005-09-24 22:28:13 -06:00
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return 0;
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2005-04-16 16:20:36 -06:00
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}
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2005-07-07 05:03:38 -06:00
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static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
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2005-04-16 16:20:36 -06:00
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{
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2007-07-11 00:09:54 -06:00
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struct drm_file *priv = filp->private_data;
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struct drm_device *dev;
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2005-09-24 22:28:13 -06:00
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drm_i830_private_t *dev_priv;
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2007-07-11 00:17:42 -06:00
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struct drm_buf *buf;
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2005-04-16 16:20:36 -06:00
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drm_i830_buf_priv_t *buf_priv;
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lock_kernel();
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2008-04-21 00:47:32 -06:00
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dev = priv->minor->dev;
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2005-04-16 16:20:36 -06:00
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dev_priv = dev->dev_private;
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2005-09-24 22:28:13 -06:00
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buf = dev_priv->mmap_buffer;
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2005-04-16 16:20:36 -06:00
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buf_priv = buf->dev_private;
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2005-09-24 22:28:13 -06:00
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2005-04-16 16:20:36 -06:00
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vma->vm_flags |= (VM_IO | VM_DONTCOPY);
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vma->vm_file = filp;
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2005-09-24 22:28:13 -06:00
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buf_priv->currently_mapped = I830_BUF_MAPPED;
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2005-04-16 16:20:36 -06:00
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unlock_kernel();
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if (io_remap_pfn_range(vma, vma->vm_start,
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2006-08-07 04:07:43 -06:00
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vma->vm_pgoff,
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2005-09-24 22:28:13 -06:00
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vma->vm_end - vma->vm_start, vma->vm_page_prot))
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return -EAGAIN;
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2005-04-16 16:20:36 -06:00
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return 0;
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}
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2007-02-12 01:55:32 -07:00
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static const struct file_operations i830_buffer_fops = {
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2005-09-24 22:28:13 -06:00
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.open = drm_open,
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2005-07-07 05:03:38 -06:00
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.release = drm_release,
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2010-09-29 09:47:58 -06:00
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.unlocked_ioctl = i830_ioctl,
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2005-09-24 22:28:13 -06:00
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.mmap = i830_mmap_buffers,
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.fasync = drm_fasync,
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llseek: automatically add .llseek fop
All file_operations should get a .llseek operation so we can make
nonseekable_open the default for future file operations without a
.llseek pointer.
The three cases that we can automatically detect are no_llseek, seq_lseek
and default_llseek. For cases where we can we can automatically prove that
the file offset is always ignored, we use noop_llseek, which maintains
the current behavior of not returning an error from a seek.
New drivers should normally not use noop_llseek but instead use no_llseek
and call nonseekable_open at open time. Existing drivers can be converted
to do the same when the maintainer knows for certain that no user code
relies on calling seek on the device file.
The generated code is often incorrectly indented and right now contains
comments that clarify for each added line why a specific variant was
chosen. In the version that gets submitted upstream, the comments will
be gone and I will manually fix the indentation, because there does not
seem to be a way to do that using coccinelle.
Some amount of new code is currently sitting in linux-next that should get
the same modifications, which I will do at the end of the merge window.
Many thanks to Julia Lawall for helping me learn to write a semantic
patch that does all this.
===== begin semantic patch =====
// This adds an llseek= method to all file operations,
// as a preparation for making no_llseek the default.
//
// The rules are
// - use no_llseek explicitly if we do nonseekable_open
// - use seq_lseek for sequential files
// - use default_llseek if we know we access f_pos
// - use noop_llseek if we know we don't access f_pos,
// but we still want to allow users to call lseek
//
@ open1 exists @
identifier nested_open;
@@
nested_open(...)
{
<+...
nonseekable_open(...)
...+>
}
@ open exists@
identifier open_f;
identifier i, f;
identifier open1.nested_open;
@@
int open_f(struct inode *i, struct file *f)
{
<+...
(
nonseekable_open(...)
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nested_open(...)
)
...+>
}
@ read disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
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*off += E
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func(..., off, ...)
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E = *off
)
...+>
}
@ read_no_fpos disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
... when != off
}
@ write @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
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*off += E
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func(..., off, ...)
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E = *off
)
...+>
}
@ write_no_fpos @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
... when != off
}
@ fops0 @
identifier fops;
@@
struct file_operations fops = {
...
};
@ has_llseek depends on fops0 @
identifier fops0.fops;
identifier llseek_f;
@@
struct file_operations fops = {
...
.llseek = llseek_f,
...
};
@ has_read depends on fops0 @
identifier fops0.fops;
identifier read_f;
@@
struct file_operations fops = {
...
.read = read_f,
...
};
@ has_write depends on fops0 @
identifier fops0.fops;
identifier write_f;
@@
struct file_operations fops = {
...
.write = write_f,
...
};
@ has_open depends on fops0 @
identifier fops0.fops;
identifier open_f;
@@
struct file_operations fops = {
...
.open = open_f,
...
};
// use no_llseek if we call nonseekable_open
////////////////////////////////////////////
@ nonseekable1 depends on !has_llseek && has_open @
identifier fops0.fops;
identifier nso ~= "nonseekable_open";
@@
struct file_operations fops = {
... .open = nso, ...
+.llseek = no_llseek, /* nonseekable */
};
@ nonseekable2 depends on !has_llseek @
identifier fops0.fops;
identifier open.open_f;
@@
struct file_operations fops = {
... .open = open_f, ...
+.llseek = no_llseek, /* open uses nonseekable */
};
// use seq_lseek for sequential files
/////////////////////////////////////
@ seq depends on !has_llseek @
identifier fops0.fops;
identifier sr ~= "seq_read";
@@
struct file_operations fops = {
... .read = sr, ...
+.llseek = seq_lseek, /* we have seq_read */
};
// use default_llseek if there is a readdir
///////////////////////////////////////////
@ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier readdir_e;
@@
// any other fop is used that changes pos
struct file_operations fops = {
... .readdir = readdir_e, ...
+.llseek = default_llseek, /* readdir is present */
};
// use default_llseek if at least one of read/write touches f_pos
/////////////////////////////////////////////////////////////////
@ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read.read_f;
@@
// read fops use offset
struct file_operations fops = {
... .read = read_f, ...
+.llseek = default_llseek, /* read accesses f_pos */
};
@ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write.write_f;
@@
// write fops use offset
struct file_operations fops = {
... .write = write_f, ...
+ .llseek = default_llseek, /* write accesses f_pos */
};
// Use noop_llseek if neither read nor write accesses f_pos
///////////////////////////////////////////////////////////
@ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
identifier write_no_fpos.write_f;
@@
// write fops use offset
struct file_operations fops = {
...
.write = write_f,
.read = read_f,
...
+.llseek = noop_llseek, /* read and write both use no f_pos */
};
@ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write_no_fpos.write_f;
@@
struct file_operations fops = {
... .write = write_f, ...
+.llseek = noop_llseek, /* write uses no f_pos */
};
@ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
@@
struct file_operations fops = {
... .read = read_f, ...
+.llseek = noop_llseek, /* read uses no f_pos */
};
@ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
@@
struct file_operations fops = {
...
+.llseek = noop_llseek, /* no read or write fn */
};
===== End semantic patch =====
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Julia Lawall <julia@diku.dk>
Cc: Christoph Hellwig <hch@infradead.org>
2010-08-15 10:52:59 -06:00
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.llseek = noop_llseek,
|
2005-07-07 05:03:38 -06:00
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};
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|
2010-07-14 16:14:43 -06:00
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static int i830_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
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{
|
2008-04-21 00:47:32 -06:00
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struct drm_device *dev = file_priv->minor->dev;
|
2005-04-16 16:20:36 -06:00
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drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
2005-09-24 22:28:13 -06:00
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drm_i830_private_t *dev_priv = dev->dev_private;
|
2006-03-28 02:56:41 -07:00
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const struct file_operations *old_fops;
|
2005-04-16 16:20:36 -06:00
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unsigned long virtual;
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int retcode = 0;
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2005-09-24 22:28:13 -06:00
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if (buf_priv->currently_mapped == I830_BUF_MAPPED)
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return -EINVAL;
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2005-04-16 16:20:36 -06:00
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2005-09-24 22:28:13 -06:00
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down_write(¤t->mm->mmap_sem);
|
2007-08-25 04:23:09 -06:00
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old_fops = file_priv->filp->f_op;
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file_priv->filp->f_op = &i830_buffer_fops;
|
2005-04-16 16:20:36 -06:00
|
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|
dev_priv->mmap_buffer = buf;
|
2007-08-25 04:23:09 -06:00
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|
virtual = do_mmap(file_priv->filp, 0, buf->total, PROT_READ | PROT_WRITE,
|
2005-09-24 22:28:13 -06:00
|
|
|
MAP_SHARED, buf->bus_address);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->mmap_buffer = NULL;
|
2007-08-25 04:23:09 -06:00
|
|
|
file_priv->filp->f_op = old_fops;
|
2005-09-24 22:28:13 -06:00
|
|
|
if (IS_ERR((void *)virtual)) { /* ugh */
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Real error */
|
|
|
|
DRM_ERROR("mmap error\n");
|
2006-08-15 19:54:07 -06:00
|
|
|
retcode = PTR_ERR((void *)virtual);
|
2005-04-16 16:20:36 -06:00
|
|
|
buf_priv->virtual = NULL;
|
|
|
|
} else {
|
|
|
|
buf_priv->virtual = (void __user *)virtual;
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
up_write(¤t->mm->mmap_sem);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return retcode;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_unmap_buffer(struct drm_buf *buf)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
int retcode = 0;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (buf_priv->currently_mapped != I830_BUF_MAPPED)
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
down_write(¤t->mm->mmap_sem);
|
|
|
|
retcode = do_munmap(current->mm,
|
|
|
|
(unsigned long)buf_priv->virtual,
|
|
|
|
(size_t) buf->total);
|
|
|
|
up_write(¤t->mm->mmap_sem);
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
buf_priv->currently_mapped = I830_BUF_UNMAPPED;
|
|
|
|
buf_priv->virtual = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return retcode;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_dma_get_buffer(struct drm_device *dev, drm_i830_dma_t *d,
|
2007-08-25 04:23:09 -06:00
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:17:42 -06:00
|
|
|
struct drm_buf *buf;
|
2005-04-16 16:20:36 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv;
|
|
|
|
int retcode = 0;
|
|
|
|
|
|
|
|
buf = i830_freelist_get(dev);
|
|
|
|
if (!buf) {
|
|
|
|
retcode = -ENOMEM;
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_DEBUG("retcode=%d\n", retcode);
|
2005-04-16 16:20:36 -06:00
|
|
|
return retcode;
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
retcode = i830_map_buffer(buf, file_priv);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (retcode) {
|
2005-04-16 16:20:36 -06:00
|
|
|
i830_freelist_put(dev, buf);
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
|
2005-04-16 16:20:36 -06:00
|
|
|
return retcode;
|
|
|
|
}
|
2007-08-25 04:23:09 -06:00
|
|
|
buf->file_priv = file_priv;
|
2005-09-24 22:28:13 -06:00
|
|
|
buf_priv = buf->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
d->granted = 1;
|
2005-09-24 22:28:13 -06:00
|
|
|
d->request_idx = buf->idx;
|
|
|
|
d->request_size = buf->total;
|
|
|
|
d->virtual = buf_priv->virtual;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return retcode;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_dma_cleanup(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:32:08 -06:00
|
|
|
struct drm_device_dma *dma = dev->dma;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Make sure interrupts are disabled here because the uninstall ioctl
|
|
|
|
* may not have been called from userspace and after dev_private
|
|
|
|
* is freed, it's too late.
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev->irq_enabled)
|
|
|
|
drm_irq_uninstall(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (dev->dev_private) {
|
|
|
|
int i;
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv =
|
|
|
|
(drm_i830_private_t *) dev->dev_private;
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
if (dev_priv->ring.virtual_start)
|
2007-01-08 03:31:13 -07:00
|
|
|
drm_core_ioremapfree(&dev_priv->ring.map, dev);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->hw_status_page) {
|
2005-04-16 16:20:36 -06:00
|
|
|
pci_free_consistent(dev->pdev, PAGE_SIZE,
|
|
|
|
dev_priv->hw_status_page,
|
|
|
|
dev_priv->dma_status_page);
|
2005-09-24 22:28:13 -06:00
|
|
|
/* Need to rewrite hardware status page */
|
|
|
|
I830_WRITE(0x02080, 0x1ffff000);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(dev->dev_private);
|
2005-09-24 22:28:13 -06:00
|
|
|
dev->dev_private = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
2007-07-11 00:17:42 -06:00
|
|
|
struct drm_buf *buf = dma->buflist[i];
|
2005-04-16 16:20:36 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
2005-09-24 22:28:13 -06:00
|
|
|
if (buf_priv->kernel_virtual && buf->total)
|
2007-01-08 03:31:13 -07:00
|
|
|
drm_core_ioremapfree(&buf_priv->map, dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
int i830_wait_ring(struct drm_device *dev, int n, const char *caller)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
|
|
|
|
int iters = 0;
|
|
|
|
unsigned long end;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
end = jiffies + (HZ * 3);
|
|
|
|
while (ring->space < n) {
|
|
|
|
ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
|
|
|
|
ring->space = ring->head - (ring->tail + 8);
|
|
|
|
if (ring->space < 0)
|
|
|
|
ring->space += ring->Size;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ring->head != last_head) {
|
2005-09-24 22:28:13 -06:00
|
|
|
end = jiffies + (HZ * 3);
|
2005-04-16 16:20:36 -06:00
|
|
|
last_head = ring->head;
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
iters++;
|
|
|
|
if (time_before(end, jiffies)) {
|
|
|
|
DRM_ERROR("space: %d wanted %d\n", ring->space, n);
|
|
|
|
DRM_ERROR("lockup\n");
|
|
|
|
goto out_wait_ring;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
udelay(1);
|
|
|
|
dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
out_wait_ring:
|
2005-09-24 22:28:13 -06:00
|
|
|
return iters;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_kernel_lost_context(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
|
|
|
|
|
|
|
|
ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
|
|
|
|
ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
|
|
|
|
ring->space = ring->head - (ring->tail + 8);
|
|
|
|
if (ring->space < 0)
|
|
|
|
ring->space += ring->Size;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (ring->head == ring->tail)
|
|
|
|
dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_freelist_init(struct drm_device *dev, drm_i830_private_t *dev_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:32:08 -06:00
|
|
|
struct drm_device_dma *dma = dev->dma;
|
2005-09-24 22:28:13 -06:00
|
|
|
int my_idx = 36;
|
|
|
|
u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (dma->buf_count > 1019) {
|
|
|
|
/* Not enough space in the status page for the freelist */
|
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
2007-07-11 00:17:42 -06:00
|
|
|
struct drm_buf *buf = dma->buflist[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
buf_priv->in_use = hw_status++;
|
|
|
|
buf_priv->my_use_idx = my_idx;
|
|
|
|
my_idx += 4;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
*buf_priv->in_use = I830_BUF_FREE;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-01-08 03:31:13 -07:00
|
|
|
buf_priv->map.offset = buf->bus_address;
|
|
|
|
buf_priv->map.size = buf->total;
|
|
|
|
buf_priv->map.type = _DRM_AGP;
|
|
|
|
buf_priv->map.flags = 0;
|
|
|
|
buf_priv->map.mtrr = 0;
|
|
|
|
|
|
|
|
drm_core_ioremap(&buf_priv->map, dev);
|
|
|
|
buf_priv->kernel_virtual = buf_priv->map.handle;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_dma_initialize(struct drm_device *dev,
|
|
|
|
drm_i830_private_t *dev_priv,
|
|
|
|
drm_i830_init_t *init)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:53:40 -06:00
|
|
|
struct drm_map_list *r_list;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
memset(dev_priv, 0, sizeof(drm_i830_private_t));
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-05-25 13:01:51 -06:00
|
|
|
list_for_each_entry(r_list, &dev->maplist, head) {
|
2005-09-24 22:28:13 -06:00
|
|
|
if (r_list->map &&
|
2005-04-16 16:20:36 -06:00
|
|
|
r_list->map->type == _DRM_SHM &&
|
2005-09-24 22:28:13 -06:00
|
|
|
r_list->map->flags & _DRM_CONTAINS_LOCK) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->sarea_map = r_list->map;
|
2005-09-24 22:28:13 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev_priv->sarea_map) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("can not find sarea!\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev_priv->mmio_map) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("can not find mmio map!\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2005-08-05 06:11:22 -06:00
|
|
|
dev->agp_buffer_token = init->buffers_offset;
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev->agp_buffer_map) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("can not find dma buffer map!\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_priv->sarea_priv = (drm_i830_sarea_t *)
|
2005-09-24 22:28:13 -06:00
|
|
|
((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
dev_priv->ring.Start = init->ring_start;
|
|
|
|
dev_priv->ring.End = init->ring_end;
|
|
|
|
dev_priv->ring.Size = init->ring_size;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-01-08 03:31:13 -07:00
|
|
|
dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
|
|
|
|
dev_priv->ring.map.size = init->ring_size;
|
|
|
|
dev_priv->ring.map.type = _DRM_AGP;
|
|
|
|
dev_priv->ring.map.flags = 0;
|
|
|
|
dev_priv->ring.map.mtrr = 0;
|
|
|
|
|
|
|
|
drm_core_ioremap(&dev_priv->ring.map, dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-01-08 03:31:13 -07:00
|
|
|
if (dev_priv->ring.map.handle == NULL) {
|
2005-09-24 22:28:13 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("can not ioremap virtual address for"
|
2005-04-16 16:20:36 -06:00
|
|
|
" ring buffer\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-01-08 03:31:13 -07:00
|
|
|
dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->w = init->w;
|
|
|
|
dev_priv->h = init->h;
|
|
|
|
dev_priv->pitch = init->pitch;
|
|
|
|
dev_priv->back_offset = init->back_offset;
|
|
|
|
dev_priv->depth_offset = init->depth_offset;
|
|
|
|
dev_priv->front_offset = init->front_offset;
|
|
|
|
|
|
|
|
dev_priv->front_di1 = init->front_offset | init->pitch_bits;
|
|
|
|
dev_priv->back_di1 = init->back_offset | init->pitch_bits;
|
|
|
|
dev_priv->zi1 = init->depth_offset | init->pitch_bits;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_DEBUG("front_di1 %x\n", dev_priv->front_di1);
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_DEBUG("back_di1 %x\n", dev_priv->back_di1);
|
|
|
|
DRM_DEBUG("pitch_bits %x\n", init->pitch_bits);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
dev_priv->cpp = init->cpp;
|
|
|
|
/* We are using separate values as placeholders for mechanisms for
|
|
|
|
* private backbuffer/depthbuffer usage.
|
|
|
|
*/
|
|
|
|
|
|
|
|
dev_priv->back_pitch = init->back_pitch;
|
|
|
|
dev_priv->depth_pitch = init->depth_pitch;
|
|
|
|
dev_priv->do_boxes = 0;
|
|
|
|
dev_priv->use_mi_batchbuffer_start = 0;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
/* Program Hardware Status Page */
|
|
|
|
dev_priv->hw_status_page =
|
|
|
|
pci_alloc_consistent(dev->pdev, PAGE_SIZE,
|
|
|
|
&dev_priv->dma_status_page);
|
|
|
|
if (!dev_priv->hw_status_page) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("Can not allocate hardware status page\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
I830_WRITE(0x02080, dev_priv->dma_status_page);
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("Enabled hardware status page\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
/* Now we need to init our freelist */
|
|
|
|
if (i830_freelist_init(dev, dev_priv) != 0) {
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->dev_private = (void *)dev_priv;
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("Not enough space in the status page for"
|
2005-04-16 16:20:36 -06:00
|
|
|
" the freelist\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
return -ENOMEM;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_dma_init(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_init_t *init = data;
|
2005-09-24 22:28:13 -06:00
|
|
|
int retcode = 0;
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (init->func) {
|
2005-09-24 22:28:13 -06:00
|
|
|
case I830_INIT_DMA:
|
2009-03-24 13:23:04 -06:00
|
|
|
dev_priv = kmalloc(sizeof(drm_i830_private_t), GFP_KERNEL);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv == NULL)
|
|
|
|
return -ENOMEM;
|
2007-09-02 20:06:45 -06:00
|
|
|
retcode = i830_dma_initialize(dev, dev_priv, init);
|
2005-09-24 22:28:13 -06:00
|
|
|
break;
|
|
|
|
case I830_CLEANUP_DMA:
|
|
|
|
retcode = i830_dma_cleanup(dev);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
retcode = -EINVAL;
|
|
|
|
break;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
return retcode;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
|
|
|
|
#define ST1_ENABLE (1<<16)
|
|
|
|
#define ST1_MASK (0xffff)
|
|
|
|
|
|
|
|
/* Most efficient way to verify state for the i830 is as it is
|
|
|
|
* emitted. Non-conformant state is silently dropped.
|
|
|
|
*/
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitContextVerified(struct drm_device *dev, unsigned int *code)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
int i, j = 0;
|
|
|
|
unsigned int tmp;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(I830_CTX_SETUP_SIZE + 4);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = 0; i < I830_CTXREG_BLENDCOLR0; i++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
tmp = code[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
if ((tmp & (7 << 29)) == CMD_3D &&
|
|
|
|
(tmp & (0x1f << 24)) < (0x1d << 24)) {
|
|
|
|
OUT_RING(tmp);
|
2005-04-16 16:20:36 -06:00
|
|
|
j++;
|
|
|
|
} else {
|
|
|
|
DRM_ERROR("Skipping %d\n", i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD);
|
|
|
|
OUT_RING(code[I830_CTXREG_BLENDCOLR]);
|
2005-04-16 16:20:36 -06:00
|
|
|
j += 2;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = I830_CTXREG_VF; i < I830_CTXREG_MCSB0; i++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
tmp = code[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
if ((tmp & (7 << 29)) == CMD_3D &&
|
|
|
|
(tmp & (0x1f << 24)) < (0x1d << 24)) {
|
|
|
|
OUT_RING(tmp);
|
2005-04-16 16:20:36 -06:00
|
|
|
j++;
|
|
|
|
} else {
|
|
|
|
DRM_ERROR("Skipping %d\n", i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD);
|
|
|
|
OUT_RING(code[I830_CTXREG_MCSB1]);
|
2005-04-16 16:20:36 -06:00
|
|
|
j += 2;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (j & 1)
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitTexVerified(struct drm_device *dev, unsigned int *code)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
int i, j = 0;
|
|
|
|
unsigned int tmp;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
|
|
|
if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
|
2005-09-24 22:28:13 -06:00
|
|
|
(code[I830_TEXREG_MI0] & ~(0xf * LOAD_TEXTURE_MAP0)) ==
|
|
|
|
(STATE3D_LOAD_STATE_IMMEDIATE_2 | 4)) {
|
|
|
|
|
|
|
|
BEGIN_LP_RING(I830_TEX_SETUP_SIZE);
|
|
|
|
|
|
|
|
OUT_RING(code[I830_TEXREG_MI0]); /* TM0LI */
|
|
|
|
OUT_RING(code[I830_TEXREG_MI1]); /* TM0S0 */
|
|
|
|
OUT_RING(code[I830_TEXREG_MI2]); /* TM0S1 */
|
|
|
|
OUT_RING(code[I830_TEXREG_MI3]); /* TM0S2 */
|
|
|
|
OUT_RING(code[I830_TEXREG_MI4]); /* TM0S3 */
|
|
|
|
OUT_RING(code[I830_TEXREG_MI5]); /* TM0S4 */
|
|
|
|
|
|
|
|
for (i = 6; i < I830_TEX_SETUP_SIZE; i++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
tmp = code[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(tmp);
|
2005-04-16 16:20:36 -06:00
|
|
|
j++;
|
2005-09-24 22:28:13 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (j & 1)
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
2005-09-24 22:28:13 -06:00
|
|
|
} else
|
2005-04-16 16:20:36 -06:00
|
|
|
printk("rejected packet %x\n", code[0]);
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitTexBlendVerified(struct drm_device *dev,
|
2005-09-24 22:28:13 -06:00
|
|
|
unsigned int *code, unsigned int num)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
int i, j = 0;
|
|
|
|
unsigned int tmp;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
|
|
|
if (!num)
|
|
|
|
return;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(num + 1);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = 0; i < num; i++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
tmp = code[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(tmp);
|
2005-04-16 16:20:36 -06:00
|
|
|
j++;
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (j & 1)
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitTexPalette(struct drm_device *dev,
|
2005-09-24 22:28:13 -06:00
|
|
|
unsigned int *palette, int number, int is_shared)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
int i;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(258);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (is_shared == 1) {
|
2005-04-16 16:20:36 -06:00
|
|
|
OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
|
2005-09-24 22:28:13 -06:00
|
|
|
MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH);
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
|
|
|
OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
|
|
|
|
}
|
2010-07-14 16:14:43 -06:00
|
|
|
for (i = 0; i < 256; i++)
|
2005-04-16 16:20:36 -06:00
|
|
|
OUT_RING(palette[i]);
|
|
|
|
OUT_RING(0);
|
2005-09-24 22:28:13 -06:00
|
|
|
/* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Need to do some additional checking when setting the dest buffer.
|
|
|
|
*/
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitDestVerified(struct drm_device *dev, unsigned int *code)
|
2005-09-24 22:28:13 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int tmp;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(I830_DEST_SETUP_SIZE + 10);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
tmp = code[I830_DESTREG_CBUFADDR];
|
|
|
|
if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
|
|
|
|
if (((int)outring) & 8) {
|
|
|
|
OUT_RING(0);
|
|
|
|
OUT_RING(0);
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(CMD_OP_DESTBUFFER_INFO);
|
|
|
|
OUT_RING(BUF_3D_ID_COLOR_BACK |
|
|
|
|
BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
|
|
|
|
BUF_3D_USE_FENCE);
|
|
|
|
OUT_RING(tmp);
|
|
|
|
OUT_RING(0);
|
|
|
|
|
|
|
|
OUT_RING(CMD_OP_DESTBUFFER_INFO);
|
|
|
|
OUT_RING(BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
|
|
|
|
BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
|
|
|
|
OUT_RING(dev_priv->zi1);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
|
|
|
DRM_ERROR("bad di1 %x (allow %x or %x)\n",
|
|
|
|
tmp, dev_priv->front_di1, dev_priv->back_di1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* invarient:
|
|
|
|
*/
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(GFX_OP_DESTBUFFER_VARS);
|
|
|
|
OUT_RING(code[I830_DESTREG_DV1]);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(GFX_OP_DRAWRECT_INFO);
|
|
|
|
OUT_RING(code[I830_DESTREG_DR1]);
|
|
|
|
OUT_RING(code[I830_DESTREG_DR2]);
|
|
|
|
OUT_RING(code[I830_DESTREG_DR3]);
|
|
|
|
OUT_RING(code[I830_DESTREG_DR4]);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Need to verify this */
|
|
|
|
tmp = code[I830_DESTREG_SENABLE];
|
2005-09-24 22:28:13 -06:00
|
|
|
if ((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
|
|
|
|
OUT_RING(tmp);
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
|
|
|
DRM_ERROR("bad scissor enable\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(GFX_OP_SCISSOR_RECT);
|
|
|
|
OUT_RING(code[I830_DESTREG_SR1]);
|
|
|
|
OUT_RING(code[I830_DESTREG_SR2]);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitStippleVerified(struct drm_device *dev, unsigned int *code)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(2);
|
|
|
|
OUT_RING(GFX_OP_STIPPLE);
|
|
|
|
OUT_RING(code[1]);
|
|
|
|
ADVANCE_LP_RING();
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830EmitState(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int dirty = sarea_priv->dirty;
|
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_DEBUG("%s %x\n", __func__, dirty);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_BUFFERS) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitDestVerified(dev, sarea_priv->BufferState);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_CTX) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitContextVerified(dev, sarea_priv->ContextState);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_CTX;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEX0) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexVerified(dev, sarea_priv->TexState[0]);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEX1) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexVerified(dev, sarea_priv->TexState[1]);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEXBLEND0) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[0],
|
|
|
|
sarea_priv->TexBlendStateWordsUsed[0]);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEXBLEND1) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexBlendVerified(dev, sarea_priv->TexBlendState[1],
|
|
|
|
sarea_priv->TexBlendStateWordsUsed[1]);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
|
|
|
|
i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
|
|
|
|
} else {
|
|
|
|
if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
|
|
|
|
i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
|
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
|
|
|
|
}
|
|
|
|
if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
|
|
|
|
i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
|
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* 1.3:
|
|
|
|
*/
|
|
|
|
#if 0
|
|
|
|
if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
|
|
|
|
i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
|
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
|
|
|
|
}
|
|
|
|
if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
|
|
|
|
i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
|
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* 1.3:
|
|
|
|
*/
|
|
|
|
if (dirty & I830_UPLOAD_STIPPLE) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitStippleVerified(dev, sarea_priv->StippleState);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEX2) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexVerified(dev, sarea_priv->TexState2);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEX3) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexVerified(dev, sarea_priv->TexState3);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEXBLEND2) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexBlendVerified(dev,
|
|
|
|
sarea_priv->TexBlendState2,
|
|
|
|
sarea_priv->TexBlendStateWordsUsed2);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dirty & I830_UPLOAD_TEXBLEND3) {
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitTexBlendVerified(dev,
|
|
|
|
sarea_priv->TexBlendState3,
|
|
|
|
sarea_priv->TexBlendStateWordsUsed3);
|
2005-04-16 16:20:36 -06:00
|
|
|
sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ================================================================
|
|
|
|
* Performance monitoring functions
|
|
|
|
*/
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_fill_box(struct drm_device *dev,
|
2005-09-24 22:28:13 -06:00
|
|
|
int x, int y, int w, int h, int r, int g, int b)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
u32 color;
|
|
|
|
unsigned int BR13, CMD;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1 << 24);
|
2005-04-16 16:20:36 -06:00
|
|
|
CMD = XY_COLOR_BLT_CMD;
|
|
|
|
x += dev_priv->sarea_priv->boxes[0].x1;
|
|
|
|
y += dev_priv->sarea_priv->boxes[0].y1;
|
|
|
|
|
|
|
|
if (dev_priv->cpp == 4) {
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 |= (1 << 25);
|
2005-04-16 16:20:36 -06:00
|
|
|
CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
|
2005-09-24 22:28:13 -06:00
|
|
|
color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
|
|
|
color = (((r & 0xf8) << 8) |
|
2005-09-24 22:28:13 -06:00
|
|
|
((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(6);
|
|
|
|
OUT_RING(CMD);
|
|
|
|
OUT_RING(BR13);
|
|
|
|
OUT_RING((y << 16) | x);
|
|
|
|
OUT_RING(((y + h) << 16) | (x + w));
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
if (dev_priv->current_page == 1)
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(dev_priv->front_offset);
|
2010-07-14 16:14:43 -06:00
|
|
|
else
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(dev_priv->back_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(color);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_cp_performance_boxes(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Purple box for page flipping
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP)
|
|
|
|
i830_fill_box(dev, 4, 4, 8, 8, 255, 0, 255);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Red box if we have to wait for idle at any point
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT)
|
|
|
|
i830_fill_box(dev, 16, 4, 8, 8, 255, 0, 0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Blue box: lost context?
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT)
|
|
|
|
i830_fill_box(dev, 28, 4, 8, 8, 0, 0, 255);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Yellow box for texture swaps
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD)
|
|
|
|
i830_fill_box(dev, 40, 4, 8, 8, 255, 255, 0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Green box if hardware never idles (as far as we can tell)
|
|
|
|
*/
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY))
|
|
|
|
i830_fill_box(dev, 64, 4, 8, 8, 0, 255, 0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
/* Draw bars indicating number of buffers allocated
|
2005-04-16 16:20:36 -06:00
|
|
|
* (not a great measure, easily confused)
|
|
|
|
*/
|
|
|
|
if (dev_priv->dma_used) {
|
|
|
|
int bar = dev_priv->dma_used / 10240;
|
2005-09-24 22:28:13 -06:00
|
|
|
if (bar > 100)
|
|
|
|
bar = 100;
|
|
|
|
if (bar < 1)
|
|
|
|
bar = 1;
|
|
|
|
i830_fill_box(dev, 4, 16, bar, 4, 196, 128, 128);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->dma_used = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_priv->sarea_priv->perf_boxes = 0;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_dma_dispatch_clear(struct drm_device *dev, int flags,
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int clear_color,
|
|
|
|
unsigned int clear_zval,
|
|
|
|
unsigned int clear_depthmask)
|
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
int nbox = sarea_priv->nbox;
|
2007-07-11 00:09:54 -06:00
|
|
|
struct drm_clip_rect *pbox = sarea_priv->boxes;
|
2005-04-16 16:20:36 -06:00
|
|
|
int pitch = dev_priv->pitch;
|
|
|
|
int cpp = dev_priv->cpp;
|
|
|
|
int i;
|
|
|
|
unsigned int BR13, CMD, D_CMD;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->current_page == 1) {
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned int tmp = flags;
|
|
|
|
|
|
|
|
flags &= ~(I830_FRONT | I830_BACK);
|
2005-09-24 22:28:13 -06:00
|
|
|
if (tmp & I830_FRONT)
|
|
|
|
flags |= I830_BACK;
|
|
|
|
if (tmp & I830_BACK)
|
|
|
|
flags |= I830_FRONT;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_kernel_lost_context(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
switch (cpp) {
|
|
|
|
case 2:
|
|
|
|
BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
|
2005-04-16 16:20:36 -06:00
|
|
|
D_CMD = CMD = XY_COLOR_BLT_CMD;
|
|
|
|
break;
|
|
|
|
case 4:
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
|
|
|
|
CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
|
2005-04-16 16:20:36 -06:00
|
|
|
XY_COLOR_BLT_WRITE_RGB);
|
|
|
|
D_CMD = XY_COLOR_BLT_CMD;
|
2005-09-24 22:28:13 -06:00
|
|
|
if (clear_depthmask & 0x00ffffff)
|
2005-04-16 16:20:36 -06:00
|
|
|
D_CMD |= XY_COLOR_BLT_WRITE_RGB;
|
2005-09-24 22:28:13 -06:00
|
|
|
if (clear_depthmask & 0xff000000)
|
2005-04-16 16:20:36 -06:00
|
|
|
D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
|
|
|
|
break;
|
|
|
|
default:
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
|
2005-04-16 16:20:36 -06:00
|
|
|
D_CMD = CMD = XY_COLOR_BLT_CMD;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (nbox > I830_NR_SAREA_CLIPRECTS)
|
|
|
|
nbox = I830_NR_SAREA_CLIPRECTS;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = 0; i < nbox; i++, pbox++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
if (pbox->x1 > pbox->x2 ||
|
|
|
|
pbox->y1 > pbox->y2 ||
|
2005-09-24 22:28:13 -06:00
|
|
|
pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
|
2005-04-16 16:20:36 -06:00
|
|
|
continue;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (flags & I830_FRONT) {
|
|
|
|
DRM_DEBUG("clear front\n");
|
|
|
|
BEGIN_LP_RING(6);
|
|
|
|
OUT_RING(CMD);
|
|
|
|
OUT_RING(BR13);
|
|
|
|
OUT_RING((pbox->y1 << 16) | pbox->x1);
|
|
|
|
OUT_RING((pbox->y2 << 16) | pbox->x2);
|
|
|
|
OUT_RING(dev_priv->front_offset);
|
|
|
|
OUT_RING(clear_color);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (flags & I830_BACK) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("clear back\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(6);
|
|
|
|
OUT_RING(CMD);
|
|
|
|
OUT_RING(BR13);
|
|
|
|
OUT_RING((pbox->y1 << 16) | pbox->x1);
|
|
|
|
OUT_RING((pbox->y2 << 16) | pbox->x2);
|
|
|
|
OUT_RING(dev_priv->back_offset);
|
|
|
|
OUT_RING(clear_color);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (flags & I830_DEPTH) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("clear depth\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(6);
|
|
|
|
OUT_RING(D_CMD);
|
|
|
|
OUT_RING(BR13);
|
|
|
|
OUT_RING((pbox->y1 << 16) | pbox->x1);
|
|
|
|
OUT_RING((pbox->y2 << 16) | pbox->x2);
|
|
|
|
OUT_RING(dev_priv->depth_offset);
|
|
|
|
OUT_RING(clear_zval);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_dma_dispatch_swap(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
int nbox = sarea_priv->nbox;
|
2007-07-11 00:09:54 -06:00
|
|
|
struct drm_clip_rect *pbox = sarea_priv->boxes;
|
2005-04-16 16:20:36 -06:00
|
|
|
int pitch = dev_priv->pitch;
|
|
|
|
int cpp = dev_priv->cpp;
|
|
|
|
int i;
|
|
|
|
unsigned int CMD, BR13;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
|
|
|
DRM_DEBUG("swapbuffers\n");
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_kernel_lost_context(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (dev_priv->do_boxes)
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_cp_performance_boxes(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
switch (cpp) {
|
|
|
|
case 2:
|
|
|
|
BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
|
2005-04-16 16:20:36 -06:00
|
|
|
CMD = XY_SRC_COPY_BLT_CMD;
|
|
|
|
break;
|
|
|
|
case 4:
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
|
2005-04-16 16:20:36 -06:00
|
|
|
CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
|
|
|
|
XY_SRC_COPY_BLT_WRITE_RGB);
|
|
|
|
break;
|
|
|
|
default:
|
2005-09-24 22:28:13 -06:00
|
|
|
BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24);
|
2005-04-16 16:20:36 -06:00
|
|
|
CMD = XY_SRC_COPY_BLT_CMD;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (nbox > I830_NR_SAREA_CLIPRECTS)
|
|
|
|
nbox = I830_NR_SAREA_CLIPRECTS;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
for (i = 0; i < nbox; i++, pbox++) {
|
2005-04-16 16:20:36 -06:00
|
|
|
if (pbox->x1 > pbox->x2 ||
|
|
|
|
pbox->y1 > pbox->y2 ||
|
2005-09-24 22:28:13 -06:00
|
|
|
pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
|
2005-04-16 16:20:36 -06:00
|
|
|
continue;
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
|
2005-09-24 22:28:13 -06:00
|
|
|
pbox->x1, pbox->y1, pbox->x2, pbox->y2);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(8);
|
|
|
|
OUT_RING(CMD);
|
|
|
|
OUT_RING(BR13);
|
|
|
|
OUT_RING((pbox->y1 << 16) | pbox->x1);
|
|
|
|
OUT_RING((pbox->y2 << 16) | pbox->x2);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->current_page == 0)
|
|
|
|
OUT_RING(dev_priv->front_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
else
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(dev_priv->back_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING((pbox->y1 << 16) | pbox->x1);
|
|
|
|
OUT_RING(BR13 & 0xffff);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (dev_priv->current_page == 0)
|
|
|
|
OUT_RING(dev_priv->back_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
else
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(dev_priv->front_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_dma_dispatch_flip(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
RING_LOCALS;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
|
2008-04-30 01:55:10 -06:00
|
|
|
__func__,
|
2005-09-24 22:28:13 -06:00
|
|
|
dev_priv->current_page,
|
|
|
|
dev_priv->sarea_priv->pf_current_page);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_kernel_lost_context(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (dev_priv->do_boxes) {
|
|
|
|
dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_cp_performance_boxes(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(2);
|
|
|
|
OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(6);
|
|
|
|
OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
|
|
|
|
OUT_RING(0);
|
|
|
|
if (dev_priv->current_page == 0) {
|
|
|
|
OUT_RING(dev_priv->back_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->current_page = 1;
|
|
|
|
} else {
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(dev_priv->front_offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->current_page = 0;
|
|
|
|
}
|
|
|
|
OUT_RING(0);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(2);
|
|
|
|
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
|
|
|
|
dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_dma_dispatch_vertex(struct drm_device *dev,
|
|
|
|
struct drm_buf *buf, int discard, int used)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
2007-07-11 00:09:54 -06:00
|
|
|
struct drm_clip_rect *box = sarea_priv->boxes;
|
2005-09-24 22:28:13 -06:00
|
|
|
int nbox = sarea_priv->nbox;
|
2005-04-16 16:20:36 -06:00
|
|
|
unsigned long address = (unsigned long)buf->bus_address;
|
2005-09-24 22:28:13 -06:00
|
|
|
unsigned long start = address - dev->agp->base;
|
2005-04-16 16:20:36 -06:00
|
|
|
int i = 0, u;
|
2005-09-24 22:28:13 -06:00
|
|
|
RING_LOCALS;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_kernel_lost_context(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (nbox > I830_NR_SAREA_CLIPRECTS)
|
2005-04-16 16:20:36 -06:00
|
|
|
nbox = I830_NR_SAREA_CLIPRECTS;
|
|
|
|
|
|
|
|
if (discard) {
|
2005-09-24 22:28:13 -06:00
|
|
|
u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
|
2005-04-16 16:20:36 -06:00
|
|
|
I830_BUF_HARDWARE);
|
2010-07-14 16:14:43 -06:00
|
|
|
if (u != I830_BUF_CLIENT)
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_DEBUG("xxxx 2\n");
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (used > 4 * 1023)
|
2005-04-16 16:20:36 -06:00
|
|
|
used = 0;
|
|
|
|
|
|
|
|
if (sarea_priv->dirty)
|
2005-09-24 22:28:13 -06:00
|
|
|
i830EmitState(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
|
2005-04-16 16:20:36 -06:00
|
|
|
address, used, nbox);
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
dev_priv->counter++;
|
|
|
|
DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
|
|
|
|
DRM_DEBUG("i830_dma_dispatch\n");
|
|
|
|
DRM_DEBUG("start : %lx\n", start);
|
|
|
|
DRM_DEBUG("used : %d\n", used);
|
|
|
|
DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
|
|
|
|
u32 *vp = buf_priv->kernel_virtual;
|
|
|
|
|
|
|
|
vp[0] = (GFX_OP_PRIMITIVE |
|
2005-09-24 22:28:13 -06:00
|
|
|
sarea_priv->vertex_prim | ((used / 4) - 2));
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (dev_priv->use_mi_batchbuffer_start) {
|
2005-09-24 22:28:13 -06:00
|
|
|
vp[used / 4] = MI_BATCH_BUFFER_END;
|
|
|
|
used += 4;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (used & 4) {
|
2005-09-24 22:28:13 -06:00
|
|
|
vp[used / 4] = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
used += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
i830_unmap_buffer(buf);
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
if (used) {
|
|
|
|
do {
|
|
|
|
if (i < nbox) {
|
|
|
|
BEGIN_LP_RING(6);
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(GFX_OP_DRAWRECT_INFO);
|
|
|
|
OUT_RING(sarea_priv->
|
|
|
|
BufferState[I830_DESTREG_DR1]);
|
|
|
|
OUT_RING(box[i].x1 | (box[i].y1 << 16));
|
|
|
|
OUT_RING(box[i].x2 | (box[i].y2 << 16));
|
|
|
|
OUT_RING(sarea_priv->
|
|
|
|
BufferState[I830_DESTREG_DR4]);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dev_priv->use_mi_batchbuffer_start) {
|
|
|
|
BEGIN_LP_RING(2);
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
|
|
|
|
OUT_RING(start | MI_BATCH_NON_SECURE);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
2005-09-24 22:28:13 -06:00
|
|
|
} else {
|
2005-04-16 16:20:36 -06:00
|
|
|
BEGIN_LP_RING(4);
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(MI_BATCH_BUFFER);
|
|
|
|
OUT_RING(start | MI_BATCH_NON_SECURE);
|
|
|
|
OUT_RING(start + used - 4);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
|
|
|
} while (++i < nbox);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (discard) {
|
|
|
|
dev_priv->counter++;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
(void)cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
|
|
|
|
I830_BUF_HARDWARE);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
BEGIN_LP_RING(8);
|
2005-09-24 22:28:13 -06:00
|
|
|
OUT_RING(CMD_STORE_DWORD_IDX);
|
|
|
|
OUT_RING(20);
|
|
|
|
OUT_RING(dev_priv->counter);
|
|
|
|
OUT_RING(CMD_STORE_DWORD_IDX);
|
|
|
|
OUT_RING(buf_priv->my_use_idx);
|
|
|
|
OUT_RING(I830_BUF_FREE);
|
|
|
|
OUT_RING(CMD_REPORT_HEAD);
|
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_dma_quiescent(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
RING_LOCALS;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_kernel_lost_context(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
BEGIN_LP_RING(4);
|
|
|
|
OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
|
|
|
|
OUT_RING(CMD_REPORT_HEAD);
|
|
|
|
OUT_RING(0);
|
|
|
|
OUT_RING(0);
|
|
|
|
ADVANCE_LP_RING();
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_flush_queue(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2007-07-11 00:32:08 -06:00
|
|
|
struct drm_device_dma *dma = dev->dma;
|
2005-09-24 22:28:13 -06:00
|
|
|
int i, ret = 0;
|
|
|
|
RING_LOCALS;
|
|
|
|
|
|
|
|
i830_kernel_lost_context(dev);
|
|
|
|
|
|
|
|
BEGIN_LP_RING(2);
|
|
|
|
OUT_RING(CMD_REPORT_HEAD);
|
|
|
|
OUT_RING(0);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
2007-07-11 00:17:42 -06:00
|
|
|
struct drm_buf *buf = dma->buflist[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
|
|
|
|
int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
|
2005-04-16 16:20:36 -06:00
|
|
|
I830_BUF_FREE);
|
|
|
|
|
|
|
|
if (used == I830_BUF_HARDWARE)
|
|
|
|
DRM_DEBUG("reclaimed from HARDWARE\n");
|
|
|
|
if (used == I830_BUF_CLIENT)
|
|
|
|
DRM_DEBUG("still on client\n");
|
|
|
|
}
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Must be called with the lock held */
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:32:08 -06:00
|
|
|
struct drm_device_dma *dma = dev->dma;
|
2005-09-24 22:28:13 -06:00
|
|
|
int i;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dma)
|
|
|
|
return;
|
|
|
|
if (!dev->dev_private)
|
|
|
|
return;
|
|
|
|
if (!dma->buflist)
|
|
|
|
return;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_flush_queue(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
2007-07-11 00:17:42 -06:00
|
|
|
struct drm_buf *buf = dma->buflist[i];
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
if (buf->file_priv == file_priv && buf_priv) {
|
2005-09-24 22:28:13 -06:00
|
|
|
int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
|
2005-04-16 16:20:36 -06:00
|
|
|
I830_BUF_FREE);
|
|
|
|
|
|
|
|
if (used == I830_BUF_CLIENT)
|
|
|
|
DRM_DEBUG("reclaimed from client\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
if (buf_priv->currently_mapped == I830_BUF_MAPPED)
|
|
|
|
buf_priv->currently_mapped = I830_BUF_UNMAPPED;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_flush_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_flush_queue(dev);
|
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_dma_vertex(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-07-11 00:32:08 -06:00
|
|
|
struct drm_device_dma *dma = dev->dma;
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
|
|
|
|
u32 *hw_status = dev_priv->hw_status_page;
|
|
|
|
drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
|
|
|
|
dev_priv->sarea_priv;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_vertex_t *vertex = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
|
2007-09-02 20:06:45 -06:00
|
|
|
vertex->idx, vertex->used, vertex->discard);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
if (vertex->idx < 0 || vertex->idx > dma->buf_count)
|
2005-09-24 22:28:13 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_dispatch_vertex(dev,
|
2007-09-02 20:06:45 -06:00
|
|
|
dma->buflist[vertex->idx],
|
|
|
|
vertex->discard, vertex->used);
|
2005-09-24 22:28:13 -06:00
|
|
|
|
|
|
|
sarea_priv->last_enqueue = dev_priv->counter - 1;
|
|
|
|
sarea_priv->last_dispatch = (int)hw_status[5];
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_clear_bufs(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_clear_t *clear = data;
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* GH: Someone's doing nasty things... */
|
2010-07-14 16:14:43 -06:00
|
|
|
if (!dev->dev_private)
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
i830_dma_dispatch_clear(dev, clear->flags,
|
|
|
|
clear->clear_color,
|
|
|
|
clear->clear_depth, clear->clear_depthmask);
|
2005-09-24 22:28:13 -06:00
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_swap_bufs(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
DRM_DEBUG("i830_swap_bufs\n");
|
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_dispatch_swap(dev);
|
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Not sure why this isn't set all the time:
|
2005-09-24 22:28:13 -06:00
|
|
|
*/
|
2010-07-14 16:14:43 -06:00
|
|
|
static void i830_do_init_pageflip(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_DEBUG("%s\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev_priv->page_flipping = 1;
|
|
|
|
dev_priv->current_page = 0;
|
|
|
|
dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
static int i830_do_cleanup_pageflip(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_DEBUG("%s\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (dev_priv->current_page != 0)
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_dispatch_flip(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
dev_priv->page_flipping = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_flip_bufs(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
|
|
|
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_DEBUG("%s\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev_priv->page_flipping)
|
|
|
|
i830_do_init_pageflip(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_dispatch_flip(dev);
|
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_getage(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
|
|
|
|
u32 *hw_status = dev_priv->hw_status_page;
|
|
|
|
drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
|
|
|
|
dev_priv->sarea_priv;
|
|
|
|
|
|
|
|
sarea_priv->last_dispatch = (int)hw_status[5];
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_getbuf(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
int retcode = 0;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_dma_t *d = data;
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
|
|
|
|
u32 *hw_status = dev_priv->hw_status_page;
|
|
|
|
drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
|
|
|
|
dev_priv->sarea_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
DRM_DEBUG("getbuf\n");
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
d->granted = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
retcode = i830_dma_get_buffer(dev, d, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
|
2007-10-19 00:40:40 -06:00
|
|
|
task_pid_nr(current), retcode, d->granted);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
sarea_priv->last_dispatch = (int)hw_status[5];
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return retcode;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_copybuf(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
/* Never copy - 2.4.x doesn't need it */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_docopy(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_getparam(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_getparam_t *param = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
int value;
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev_priv) {
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_ERROR("%s called with no initialization\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (param->param) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case I830_PARAM_IRQ_ACTIVE:
|
|
|
|
value = dev->irq_enabled;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
if (copy_to_user(param->value, &value, sizeof(int))) {
|
2005-09-24 22:28:13 -06:00
|
|
|
DRM_ERROR("copy_to_user\n");
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EFAULT;
|
|
|
|
}
|
2005-09-24 22:28:13 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i830_setparam(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i830_setparam_t *param = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
if (!dev_priv) {
|
2008-04-30 01:55:10 -06:00
|
|
|
DRM_ERROR("%s called with no initialization\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (param->param) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
|
2007-09-02 20:06:45 -06:00
|
|
|
dev_priv->use_mi_batchbuffer_start = param->value;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-07-11 00:09:54 -06:00
|
|
|
int i830_driver_load(struct drm_device *dev, unsigned long flags)
|
2005-11-10 04:16:34 -07:00
|
|
|
{
|
|
|
|
/* i830 has 4 more counters */
|
|
|
|
dev->counters += 4;
|
|
|
|
dev->types[6] = _DRM_STAT_IRQ;
|
|
|
|
dev->types[7] = _DRM_STAT_PRIMARY;
|
|
|
|
dev->types[8] = _DRM_STAT_SECONDARY;
|
|
|
|
dev->types[9] = _DRM_STAT_DMA;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
void i830_driver_lastclose(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_cleanup(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
void i830_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
if (dev->dev_private) {
|
|
|
|
drm_i830_private_t *dev_priv = dev->dev_private;
|
2010-07-14 16:14:43 -06:00
|
|
|
if (dev_priv->page_flipping)
|
2005-04-16 16:20:36 -06:00
|
|
|
i830_do_cleanup_pageflip(dev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
void i830_driver_reclaim_buffers_locked(struct drm_device *dev, struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-08-25 04:23:09 -06:00
|
|
|
i830_reclaim_buffers(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-07-14 16:14:43 -06:00
|
|
|
int i830_driver_dma_quiescent(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2005-09-24 22:28:13 -06:00
|
|
|
i830_dma_quiescent(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-07-10 15:51:39 -06:00
|
|
|
/*
|
|
|
|
* call the drm_ioctl under the big kernel lock because
|
|
|
|
* to lock against the i830_mmap_buffers function.
|
|
|
|
*/
|
|
|
|
long i830_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
lock_kernel();
|
|
|
|
ret = drm_ioctl(file, cmd, arg);
|
|
|
|
unlock_kernel();
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
struct drm_ioctl_desc i830_ioctls[] = {
|
2010-08-14 04:20:34 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_VERTEX, i830_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_CLEAR, i830_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_FLUSH, i830_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_GETAGE, i830_getage, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_GETBUF, i830_getbuf, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_SWAP, i830_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_COPY, i830_copybuf, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_DOCOPY, i830_docopy, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_FLIP, i830_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_GETPARAM, i830_getparam, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I830_SETPARAM, i830_setparam, DRM_AUTH|DRM_UNLOCKED),
|
2005-04-16 16:20:36 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
|
2005-07-10 01:31:26 -06:00
|
|
|
|
|
|
|
/**
|
|
|
|
* Determine if the device really is AGP or not.
|
|
|
|
*
|
|
|
|
* All Intel graphics chipsets are treated as AGP, even if they are really
|
|
|
|
* PCI-e.
|
|
|
|
*
|
|
|
|
* \param dev The device to be tested.
|
|
|
|
*
|
|
|
|
* \returns
|
|
|
|
* A value of 1 is always retured to indictate every i8xx is AGP.
|
|
|
|
*/
|
2010-07-14 16:14:43 -06:00
|
|
|
int i830_driver_device_is_agp(struct drm_device *dev)
|
2005-07-10 01:31:26 -06:00
|
|
|
{
|
|
|
|
return 1;
|
|
|
|
}
|