2005-04-16 16:20:36 -06:00
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/*
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* File: msi.c
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* Purpose: PCI Message Signaled Interrupt (MSI)
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*
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* Copyright (C) 2003-2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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2006-10-04 03:16:41 -06:00
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#include <linux/err.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/mm.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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2011-05-27 07:37:25 -06:00
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#include <linux/export.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/proc_fs.h>
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2006-10-04 03:16:59 -06:00
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#include <linux/msi.h>
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2007-04-26 19:21:38 -06:00
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#include <linux/smp.h>
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2009-08-09 19:14:15 -06:00
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#include <linux/errno.h>
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#include <linux/io.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2005-04-16 16:20:36 -06:00
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#include "pci.h"
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static int pci_msi_enable = 1;
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2013-04-17 17:44:48 -06:00
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#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
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2007-12-11 15:19:41 -07:00
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/* Arch hooks */
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2013-08-09 14:27:06 -06:00
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int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
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{
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2013-08-09 14:27:08 -06:00
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struct msi_chip *chip = dev->bus->msi;
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int err;
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if (!chip || !chip->setup_irq)
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return -EINVAL;
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err = chip->setup_irq(chip, dev, desc);
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if (err < 0)
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return err;
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irq_set_chip_data(desc->irq, chip);
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return 0;
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2013-08-09 14:27:06 -06:00
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}
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void __weak arch_teardown_msi_irq(unsigned int irq)
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2007-12-11 15:19:41 -07:00
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{
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2013-08-09 14:27:08 -06:00
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struct msi_chip *chip = irq_get_chip_data(irq);
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if (!chip || !chip->teardown_irq)
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return;
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chip->teardown_irq(chip, irq);
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2007-12-11 15:19:41 -07:00
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}
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2013-08-09 14:27:06 -06:00
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int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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{
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2013-08-09 14:27:08 -06:00
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struct msi_chip *chip = dev->bus->msi;
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if (!chip || !chip->check_device)
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return 0;
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return chip->check_device(chip, dev, nvec, type);
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2013-08-09 14:27:06 -06:00
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}
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2010-10-06 14:05:35 -06:00
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2013-08-09 14:27:06 -06:00
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int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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2007-12-11 15:19:41 -07:00
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{
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struct msi_desc *entry;
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int ret;
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2009-03-17 06:54:10 -06:00
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/*
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* If an architecture wants to support multiple MSI, it needs to
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* override arch_setup_msi_irqs()
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*/
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if (type == PCI_CAP_ID_MSI && nvec > 1)
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return 1;
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2007-12-11 15:19:41 -07:00
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list_for_each_entry(entry, &dev->msi_list, list) {
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ret = arch_setup_msi_irq(dev, entry);
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2009-02-11 04:27:02 -07:00
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if (ret < 0)
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2007-12-11 15:19:41 -07:00
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return ret;
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2009-02-11 04:27:02 -07:00
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if (ret > 0)
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return -ENOSPC;
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2007-12-11 15:19:41 -07:00
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}
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return 0;
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}
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2010-10-06 14:05:35 -06:00
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2013-08-09 14:27:06 -06:00
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/*
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* We have a default implementation available as a separate non-weak
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* function, as it is used by the Xen x86 PCI code
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*/
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2010-10-06 14:05:35 -06:00
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void default_teardown_msi_irqs(struct pci_dev *dev)
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2007-12-11 15:19:41 -07:00
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{
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struct msi_desc *entry;
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list_for_each_entry(entry, &dev->msi_list, list) {
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2009-03-17 06:54:10 -06:00
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int i, nvec;
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if (entry->irq == 0)
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continue;
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PCI: Allocate only as many MSI vectors as requested by driver
Because of the encoding of the "Multiple Message Capable" and "Multiple
Message Enable" fields, a device can only advertise that it's capable of a
power-of-two number of vectors, and the OS can only enable a power-of-two
number.
For example, a device that's limited internally to using 18 vectors would
have to advertise that it's capable of 32. The 14 extra vectors consume
vector numbers and IRQ descriptors even though the device can't actually
use them.
This fix introduces a 'msi_desc::nvec_used' field to address this issue.
When non-zero, it is the actual number of MSIs the device will send, as
requested by the device driver. This value should be used by architectures
to set up and tear down only as many interrupt resources as the device will
actually use.
Note, although the existing 'msi_desc::multiple' field might seem
redundant, in fact it is not. The number of MSIs advertised need not be
the smallest power-of-two larger than the number of MSIs the device will
send. Thus, it is not always possible to derive the former from the
latter, so we need to keep them both to handle this case.
[bhelgaas: changelog, rename to "nvec_used"]
Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-05-13 03:05:48 -06:00
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if (entry->nvec_used)
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nvec = entry->nvec_used;
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else
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nvec = 1 << entry->msi_attrib.multiple;
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2009-03-17 06:54:10 -06:00
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for (i = 0; i < nvec; i++)
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arch_teardown_msi_irq(entry->irq + i);
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2007-12-11 15:19:41 -07:00
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}
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}
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2013-08-09 14:27:06 -06:00
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void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
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{
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return default_teardown_msi_irqs(dev);
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}
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2011-12-16 15:38:18 -07:00
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void default_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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struct msi_desc *entry;
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entry = NULL;
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if (dev->msix_enabled) {
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list_for_each_entry(entry, &dev->msi_list, list) {
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if (irq == entry->irq)
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break;
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}
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} else if (dev->msi_enabled) {
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entry = irq_get_msi_desc(irq);
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}
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if (entry)
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write_msi_msg(irq, &entry->msg);
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}
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2013-08-09 14:27:06 -06:00
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void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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return default_restore_msi_irqs(dev, irq);
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}
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2011-12-16 15:38:18 -07:00
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2013-04-04 10:54:30 -06:00
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static void msi_set_enable(struct pci_dev *dev, int enable)
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2007-03-05 01:30:10 -07:00
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{
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u16 control;
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2013-04-04 10:54:30 -06:00
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pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
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2009-06-16 06:31:45 -06:00
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control &= ~PCI_MSI_FLAGS_ENABLE;
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if (enable)
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control |= PCI_MSI_FLAGS_ENABLE;
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2013-04-04 10:54:30 -06:00
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pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
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2008-05-18 22:48:17 -06:00
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}
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2007-03-05 01:30:10 -07:00
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static void msix_set_enable(struct pci_dev *dev, int enable)
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{
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u16 control;
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2013-04-04 10:54:30 -06:00
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pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
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control &= ~PCI_MSIX_FLAGS_ENABLE;
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if (enable)
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control |= PCI_MSIX_FLAGS_ENABLE;
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pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
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2007-03-05 01:30:10 -07:00
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}
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2009-01-21 17:19:19 -07:00
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static inline __attribute_const__ u32 msi_mask(unsigned x)
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{
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2009-02-08 20:27:47 -07:00
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/* Don't shift by >= width of type */
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if (x >= 5)
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return 0xffffffff;
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return (1 << (1 << x)) - 1;
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2009-01-21 17:19:19 -07:00
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}
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2009-03-17 06:54:09 -06:00
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static inline __attribute_const__ u32 msi_capable_mask(u16 control)
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2007-03-30 12:54:08 -06:00
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{
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2009-03-17 06:54:09 -06:00
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return msi_mask((control >> 1) & 7);
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}
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2007-03-30 12:54:08 -06:00
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2009-03-17 06:54:09 -06:00
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static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
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{
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return msi_mask((control >> 4) & 7);
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2007-03-30 12:54:08 -06:00
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}
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2008-07-25 15:42:58 -06:00
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/*
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* PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
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* mask all MSI interrupts by clearing the MSI enable bit does not work
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* reliably as devices without an INTx disable bit will then generate a
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* level IRQ which will never be cleared.
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*/
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PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
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static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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2005-04-16 16:20:36 -06:00
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{
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2009-03-17 06:54:09 -06:00
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u32 mask_bits = desc->masked;
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2005-04-16 16:20:36 -06:00
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2009-03-17 06:54:09 -06:00
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if (!desc->msi_attrib.maskbit)
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
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|
return 0;
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2009-03-17 06:54:09 -06:00
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mask_bits &= ~mask;
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mask_bits |= flag;
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pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
|
|
|
|
return mask_bits;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
|
|
|
|
{
|
|
|
|
desc->masked = __msi_mask_irq(desc, mask, flag);
|
2009-03-17 06:54:09 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This internal function does not flush PCI writes to the device.
|
|
|
|
* All users must ensure that they read from the device before either
|
|
|
|
* assuming that the device state is up to date, or returning out of this
|
|
|
|
* file. This saves a few milliseconds when initialising devices with lots
|
|
|
|
* of MSI-X interrupts.
|
|
|
|
*/
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
|
2009-03-17 06:54:09 -06:00
|
|
|
{
|
|
|
|
u32 mask_bits = desc->masked;
|
|
|
|
unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
|
2009-06-23 02:40:04 -06:00
|
|
|
PCI_MSIX_ENTRY_VECTOR_CTRL;
|
2010-11-11 00:46:55 -07:00
|
|
|
mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
|
|
|
|
if (flag)
|
|
|
|
mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
|
2009-03-17 06:54:09 -06:00
|
|
|
writel(mask_bits, desc->mask_base + offset);
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
|
|
|
|
return mask_bits;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void msix_mask_irq(struct msi_desc *desc, u32 flag)
|
|
|
|
{
|
|
|
|
desc->masked = __msix_mask_irq(desc, flag);
|
2009-03-17 06:54:09 -06:00
|
|
|
}
|
2009-03-17 06:54:06 -06:00
|
|
|
|
2010-09-28 08:46:51 -06:00
|
|
|
static void msi_set_mask_bit(struct irq_data *data, u32 flag)
|
2009-03-17 06:54:09 -06:00
|
|
|
{
|
2010-09-28 08:46:51 -06:00
|
|
|
struct msi_desc *desc = irq_data_get_msi(data);
|
2009-03-17 06:54:06 -06:00
|
|
|
|
2009-03-17 06:54:09 -06:00
|
|
|
if (desc->msi_attrib.is_msix) {
|
|
|
|
msix_mask_irq(desc, flag);
|
|
|
|
readl(desc->mask_base); /* Flush write to device */
|
|
|
|
} else {
|
2010-09-28 08:46:51 -06:00
|
|
|
unsigned offset = data->irq - desc->dev->irq;
|
2009-03-17 06:54:10 -06:00
|
|
|
msi_mask_irq(desc, 1 << offset, flag << offset);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-03-17 06:54:09 -06:00
|
|
|
}
|
|
|
|
|
2010-09-28 08:46:51 -06:00
|
|
|
void mask_msi_irq(struct irq_data *data)
|
2009-03-17 06:54:09 -06:00
|
|
|
{
|
2010-09-28 08:46:51 -06:00
|
|
|
msi_set_mask_bit(data, 1);
|
2009-03-17 06:54:09 -06:00
|
|
|
}
|
|
|
|
|
2010-09-28 08:46:51 -06:00
|
|
|
void unmask_msi_irq(struct irq_data *data)
|
2009-03-17 06:54:09 -06:00
|
|
|
{
|
2010-09-28 08:46:51 -06:00
|
|
|
msi_set_mask_bit(data, 0);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2010-07-23 07:56:28 -06:00
|
|
|
BUG_ON(entry->dev->current_state != PCI_D0);
|
|
|
|
|
|
|
|
if (entry->msi_attrib.is_msix) {
|
|
|
|
void __iomem *base = entry->mask_base +
|
|
|
|
entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
|
|
|
|
|
|
|
|
msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
|
|
|
|
msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
|
|
|
|
msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
|
|
|
|
} else {
|
|
|
|
struct pci_dev *dev = entry->dev;
|
2013-04-17 17:34:36 -06:00
|
|
|
int pos = dev->msi_cap;
|
2010-07-23 07:56:28 -06:00
|
|
|
u16 data;
|
|
|
|
|
2013-04-17 17:39:57 -06:00
|
|
|
pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
|
|
|
|
&msg->address_lo);
|
2010-07-23 07:56:28 -06:00
|
|
|
if (entry->msi_attrib.is_64) {
|
2013-04-17 17:39:57 -06:00
|
|
|
pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
|
|
|
|
&msg->address_hi);
|
2013-04-17 17:41:13 -06:00
|
|
|
pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
|
2010-07-23 07:56:28 -06:00
|
|
|
} else {
|
|
|
|
msg->address_hi = 0;
|
2013-04-17 17:41:13 -06:00
|
|
|
pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
|
2010-07-23 07:56:28 -06:00
|
|
|
}
|
|
|
|
msg->data = data;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void read_msi_msg(unsigned int irq, struct msi_msg *msg)
|
|
|
|
{
|
2011-03-28 09:49:12 -06:00
|
|
|
struct msi_desc *entry = irq_get_msi_desc(irq);
|
2010-07-23 07:56:28 -06:00
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
__read_msi_msg(entry, msg);
|
2010-07-23 07:56:28 -06:00
|
|
|
}
|
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
|
2010-07-23 07:56:28 -06:00
|
|
|
{
|
|
|
|
/* Assert that the cache is valid, assuming that
|
2010-06-17 13:16:36 -06:00
|
|
|
* valid messages are not all-zeroes. */
|
|
|
|
BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
|
|
|
|
entry->msg.data));
|
2006-10-04 03:16:33 -06:00
|
|
|
|
2010-06-17 13:16:36 -06:00
|
|
|
*msg = entry->msg;
|
2006-10-04 03:16:33 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-07-23 07:56:28 -06:00
|
|
|
void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
|
2006-10-04 03:16:33 -06:00
|
|
|
{
|
2011-03-28 09:49:12 -06:00
|
|
|
struct msi_desc *entry = irq_get_msi_desc(irq);
|
2008-12-05 19:58:34 -07:00
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
__get_cached_msi_msg(entry, msg);
|
2008-12-05 19:58:34 -07:00
|
|
|
}
|
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
|
2008-12-05 19:58:34 -07:00
|
|
|
{
|
2010-06-17 13:16:36 -06:00
|
|
|
if (entry->dev->current_state != PCI_D0) {
|
|
|
|
/* Don't touch the hardware now */
|
|
|
|
} else if (entry->msi_attrib.is_msix) {
|
2009-03-17 06:54:06 -06:00
|
|
|
void __iomem *base;
|
|
|
|
base = entry->mask_base +
|
|
|
|
entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
|
|
|
|
|
2009-06-23 02:40:04 -06:00
|
|
|
writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
|
|
|
|
writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
|
|
|
|
writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
|
2009-03-17 06:54:06 -06:00
|
|
|
} else {
|
2006-10-04 03:16:33 -06:00
|
|
|
struct pci_dev *dev = entry->dev;
|
2013-04-17 17:34:36 -06:00
|
|
|
int pos = dev->msi_cap;
|
2009-03-17 06:54:10 -06:00
|
|
|
u16 msgctl;
|
|
|
|
|
2013-04-17 17:38:32 -06:00
|
|
|
pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
|
2009-03-17 06:54:10 -06:00
|
|
|
msgctl &= ~PCI_MSI_FLAGS_QSIZE;
|
|
|
|
msgctl |= entry->msi_attrib.multiple << 4;
|
2013-04-17 17:38:32 -06:00
|
|
|
pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
|
2006-10-04 03:16:33 -06:00
|
|
|
|
2013-04-17 17:39:57 -06:00
|
|
|
pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
|
|
|
|
msg->address_lo);
|
2006-10-04 03:16:33 -06:00
|
|
|
if (entry->msi_attrib.is_64) {
|
2013-04-17 17:39:57 -06:00
|
|
|
pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
|
|
|
|
msg->address_hi);
|
2013-04-17 17:41:13 -06:00
|
|
|
pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
|
|
|
|
msg->data);
|
2006-10-04 03:16:33 -06:00
|
|
|
} else {
|
2013-04-17 17:41:13 -06:00
|
|
|
pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
|
|
|
|
msg->data);
|
2006-10-04 03:16:33 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2007-03-08 13:04:57 -07:00
|
|
|
entry->msg = *msg;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2006-10-04 03:16:33 -06:00
|
|
|
|
2008-12-05 19:58:34 -07:00
|
|
|
void write_msi_msg(unsigned int irq, struct msi_msg *msg)
|
|
|
|
{
|
2011-03-28 09:49:12 -06:00
|
|
|
struct msi_desc *entry = irq_get_msi_desc(irq);
|
2008-12-05 19:58:34 -07:00
|
|
|
|
2010-09-28 11:09:51 -06:00
|
|
|
__write_msi_msg(entry, msg);
|
2008-12-05 19:58:34 -07:00
|
|
|
}
|
|
|
|
|
2009-08-05 20:32:51 -06:00
|
|
|
static void free_msi_irqs(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
struct msi_desc *entry, *tmp;
|
|
|
|
|
|
|
|
list_for_each_entry(entry, &dev->msi_list, list) {
|
|
|
|
int i, nvec;
|
|
|
|
if (!entry->irq)
|
|
|
|
continue;
|
PCI: Allocate only as many MSI vectors as requested by driver
Because of the encoding of the "Multiple Message Capable" and "Multiple
Message Enable" fields, a device can only advertise that it's capable of a
power-of-two number of vectors, and the OS can only enable a power-of-two
number.
For example, a device that's limited internally to using 18 vectors would
have to advertise that it's capable of 32. The 14 extra vectors consume
vector numbers and IRQ descriptors even though the device can't actually
use them.
This fix introduces a 'msi_desc::nvec_used' field to address this issue.
When non-zero, it is the actual number of MSIs the device will send, as
requested by the device driver. This value should be used by architectures
to set up and tear down only as many interrupt resources as the device will
actually use.
Note, although the existing 'msi_desc::multiple' field might seem
redundant, in fact it is not. The number of MSIs advertised need not be
the smallest power-of-two larger than the number of MSIs the device will
send. Thus, it is not always possible to derive the former from the
latter, so we need to keep them both to handle this case.
[bhelgaas: changelog, rename to "nvec_used"]
Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-05-13 03:05:48 -06:00
|
|
|
if (entry->nvec_used)
|
|
|
|
nvec = entry->nvec_used;
|
|
|
|
else
|
|
|
|
nvec = 1 << entry->msi_attrib.multiple;
|
2009-08-05 20:32:51 -06:00
|
|
|
for (i = 0; i < nvec; i++)
|
|
|
|
BUG_ON(irq_has_action(entry->irq + i));
|
|
|
|
}
|
|
|
|
|
|
|
|
arch_teardown_msi_irqs(dev);
|
|
|
|
|
|
|
|
list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
|
|
|
|
if (entry->msi_attrib.is_msix) {
|
|
|
|
if (list_is_last(&entry->list, &dev->msi_list))
|
|
|
|
iounmap(entry->mask_base);
|
|
|
|
}
|
2012-01-03 08:29:54 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Its possible that we get into this path
|
|
|
|
* When populate_msi_sysfs fails, which means the entries
|
|
|
|
* were not registered with sysfs. In that case don't
|
|
|
|
* unregister them.
|
|
|
|
*/
|
|
|
|
if (entry->kobj.parent) {
|
|
|
|
kobject_del(&entry->kobj);
|
|
|
|
kobject_put(&entry->kobj);
|
|
|
|
}
|
|
|
|
|
2009-08-05 20:32:51 -06:00
|
|
|
list_del(&entry->list);
|
|
|
|
kfree(entry);
|
|
|
|
}
|
|
|
|
}
|
2007-01-17 21:50:05 -07:00
|
|
|
|
2009-03-17 06:54:07 -06:00
|
|
|
static struct msi_desc *alloc_msi_entry(struct pci_dev *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-03-17 06:54:07 -06:00
|
|
|
struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
|
|
|
|
if (!desc)
|
2005-04-16 16:20:36 -06:00
|
|
|
return NULL;
|
|
|
|
|
2009-03-17 06:54:07 -06:00
|
|
|
INIT_LIST_HEAD(&desc->list);
|
|
|
|
desc->dev = dev;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-17 06:54:07 -06:00
|
|
|
return desc;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-10-25 02:16:30 -06:00
|
|
|
static void pci_intx_for_msi(struct pci_dev *dev, int enable)
|
|
|
|
{
|
|
|
|
if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
|
|
|
|
pci_intx(dev, enable);
|
|
|
|
}
|
|
|
|
|
2007-01-25 01:34:08 -07:00
|
|
|
static void __pci_restore_msi_state(struct pci_dev *dev)
|
2006-02-08 02:11:38 -07:00
|
|
|
{
|
|
|
|
u16 control;
|
2007-03-08 13:04:57 -07:00
|
|
|
struct msi_desc *entry;
|
2006-02-08 02:11:38 -07:00
|
|
|
|
2007-03-05 01:30:10 -07:00
|
|
|
if (!dev->msi_enabled)
|
|
|
|
return;
|
|
|
|
|
2011-03-28 09:49:12 -06:00
|
|
|
entry = irq_get_msi_desc(dev->irq);
|
2006-02-08 02:11:38 -07:00
|
|
|
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 0);
|
2013-04-04 10:54:30 -06:00
|
|
|
msi_set_enable(dev, 0);
|
2011-12-16 15:38:18 -07:00
|
|
|
arch_restore_msi_irqs(dev, dev->irq);
|
2007-03-08 13:04:57 -07:00
|
|
|
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
|
2009-03-17 06:54:09 -06:00
|
|
|
msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
|
2008-08-07 09:52:37 -06:00
|
|
|
control &= ~PCI_MSI_FLAGS_QSIZE;
|
2009-03-17 06:54:10 -06:00
|
|
|
control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
|
2007-01-25 01:34:08 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __pci_restore_msix_state(struct pci_dev *dev)
|
2006-02-08 02:11:38 -07:00
|
|
|
{
|
|
|
|
struct msi_desc *entry;
|
2007-03-08 13:04:57 -07:00
|
|
|
u16 control;
|
2006-02-08 02:11:38 -07:00
|
|
|
|
2007-01-28 12:42:52 -07:00
|
|
|
if (!dev->msix_enabled)
|
|
|
|
return;
|
2009-06-18 20:15:59 -06:00
|
|
|
BUG_ON(list_empty(&dev->msi_list));
|
2009-08-05 20:32:04 -06:00
|
|
|
entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
|
2007-01-28 12:42:52 -07:00
|
|
|
|
2006-02-08 02:11:38 -07:00
|
|
|
/* route the table */
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 0);
|
2009-06-18 20:15:59 -06:00
|
|
|
control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL;
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
|
2006-02-08 02:11:38 -07:00
|
|
|
|
2007-04-05 01:19:10 -06:00
|
|
|
list_for_each_entry(entry, &dev->msi_list, list) {
|
2011-12-16 15:38:18 -07:00
|
|
|
arch_restore_msi_irqs(dev, entry->irq);
|
2009-03-17 06:54:09 -06:00
|
|
|
msix_mask_irq(entry, entry->masked);
|
2006-02-08 02:11:38 -07:00
|
|
|
}
|
|
|
|
|
2007-03-08 13:04:57 -07:00
|
|
|
control &= ~PCI_MSIX_FLAGS_MASKALL;
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
|
2006-02-08 02:11:38 -07:00
|
|
|
}
|
2007-01-25 01:34:08 -07:00
|
|
|
|
|
|
|
void pci_restore_msi_state(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
__pci_restore_msi_state(dev);
|
|
|
|
__pci_restore_msix_state(dev);
|
|
|
|
}
|
2007-11-07 14:43:59 -07:00
|
|
|
EXPORT_SYMBOL_GPL(pci_restore_msi_state);
|
2006-02-08 02:11:38 -07:00
|
|
|
|
2011-10-06 12:08:18 -06:00
|
|
|
|
|
|
|
#define to_msi_attr(obj) container_of(obj, struct msi_attribute, attr)
|
|
|
|
#define to_msi_desc(obj) container_of(obj, struct msi_desc, kobj)
|
|
|
|
|
|
|
|
struct msi_attribute {
|
|
|
|
struct attribute attr;
|
|
|
|
ssize_t (*show)(struct msi_desc *entry, struct msi_attribute *attr,
|
|
|
|
char *buf);
|
|
|
|
ssize_t (*store)(struct msi_desc *entry, struct msi_attribute *attr,
|
|
|
|
const char *buf, size_t count);
|
|
|
|
};
|
|
|
|
|
|
|
|
static ssize_t show_msi_mode(struct msi_desc *entry, struct msi_attribute *atr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
return sprintf(buf, "%s\n", entry->msi_attrib.is_msix ? "msix" : "msi");
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t msi_irq_attr_show(struct kobject *kobj,
|
|
|
|
struct attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
struct msi_attribute *attribute = to_msi_attr(attr);
|
|
|
|
struct msi_desc *entry = to_msi_desc(kobj);
|
|
|
|
|
|
|
|
if (!attribute->show)
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
return attribute->show(entry, attribute, buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct sysfs_ops msi_irq_sysfs_ops = {
|
|
|
|
.show = msi_irq_attr_show,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct msi_attribute mode_attribute =
|
|
|
|
__ATTR(mode, S_IRUGO, show_msi_mode, NULL);
|
|
|
|
|
|
|
|
|
2013-04-12 11:20:03 -06:00
|
|
|
static struct attribute *msi_irq_default_attrs[] = {
|
2011-10-06 12:08:18 -06:00
|
|
|
&mode_attribute.attr,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
2013-04-12 11:20:03 -06:00
|
|
|
static void msi_kobj_release(struct kobject *kobj)
|
2011-10-06 12:08:18 -06:00
|
|
|
{
|
|
|
|
struct msi_desc *entry = to_msi_desc(kobj);
|
|
|
|
|
|
|
|
pci_dev_put(entry->dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct kobj_type msi_irq_ktype = {
|
|
|
|
.release = msi_kobj_release,
|
|
|
|
.sysfs_ops = &msi_irq_sysfs_ops,
|
|
|
|
.default_attrs = msi_irq_default_attrs,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int populate_msi_sysfs(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct msi_desc *entry;
|
|
|
|
struct kobject *kobj;
|
|
|
|
int ret;
|
|
|
|
int count = 0;
|
|
|
|
|
|
|
|
pdev->msi_kset = kset_create_and_add("msi_irqs", NULL, &pdev->dev.kobj);
|
|
|
|
if (!pdev->msi_kset)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
list_for_each_entry(entry, &pdev->msi_list, list) {
|
|
|
|
kobj = &entry->kobj;
|
|
|
|
kobj->kset = pdev->msi_kset;
|
|
|
|
pci_dev_get(pdev);
|
|
|
|
ret = kobject_init_and_add(kobj, &msi_irq_ktype, NULL,
|
|
|
|
"%u", entry->irq);
|
|
|
|
if (ret)
|
|
|
|
goto out_unroll;
|
|
|
|
|
|
|
|
count++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_unroll:
|
|
|
|
list_for_each_entry(entry, &pdev->msi_list, list) {
|
|
|
|
if (!count)
|
|
|
|
break;
|
|
|
|
kobject_del(&entry->kobj);
|
|
|
|
kobject_put(&entry->kobj);
|
|
|
|
count--;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* msi_capability_init - configure device's MSI capability structure
|
|
|
|
* @dev: pointer to the pci_dev data structure of MSI device function
|
2009-03-17 06:54:10 -06:00
|
|
|
* @nvec: number of interrupts to allocate
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
2009-03-17 06:54:10 -06:00
|
|
|
* Setup the MSI capability structure of the device with the requested
|
|
|
|
* number of interrupts. A return value of zero indicates the successful
|
|
|
|
* setup of an entry with the new MSI irq. A negative return value indicates
|
|
|
|
* an error, and a positive return value indicates the number of interrupts
|
|
|
|
* which could have been allocated.
|
|
|
|
*/
|
|
|
|
static int msi_capability_init(struct pci_dev *dev, int nvec)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
struct msi_desc *entry;
|
2013-04-04 10:54:32 -06:00
|
|
|
int ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
u16 control;
|
2009-03-17 06:54:09 -06:00
|
|
|
unsigned mask;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2013-04-04 10:54:30 -06:00
|
|
|
msi_set_enable(dev, 0); /* Disable MSI during set up */
|
2009-06-16 06:31:45 -06:00
|
|
|
|
2013-04-17 17:38:32 -06:00
|
|
|
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
|
2005-04-16 16:20:36 -06:00
|
|
|
/* MSI Entry Initialization */
|
2009-03-17 06:54:07 -06:00
|
|
|
entry = alloc_msi_entry(dev);
|
2007-01-28 12:56:37 -07:00
|
|
|
if (!entry)
|
|
|
|
return -ENOMEM;
|
2006-10-04 03:16:41 -06:00
|
|
|
|
2009-08-09 19:14:15 -06:00
|
|
|
entry->msi_attrib.is_msix = 0;
|
2013-04-17 17:42:30 -06:00
|
|
|
entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
|
2009-08-09 19:14:15 -06:00
|
|
|
entry->msi_attrib.entry_nr = 0;
|
2013-04-17 17:42:30 -06:00
|
|
|
entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
|
2009-08-09 19:14:15 -06:00
|
|
|
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
|
2013-04-04 10:54:32 -06:00
|
|
|
entry->msi_attrib.pos = dev->msi_cap;
|
2009-03-17 06:54:09 -06:00
|
|
|
|
2013-04-30 01:44:54 -06:00
|
|
|
if (control & PCI_MSI_FLAGS_64BIT)
|
|
|
|
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
|
|
|
|
else
|
|
|
|
entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
|
2009-03-17 06:54:09 -06:00
|
|
|
/* All MSIs are unmasked by default, Mask them all */
|
|
|
|
if (entry->msi_attrib.maskbit)
|
|
|
|
pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
|
|
|
|
mask = msi_capable_mask(control);
|
|
|
|
msi_mask_irq(entry, mask, mask);
|
|
|
|
|
2007-06-01 01:46:32 -06:00
|
|
|
list_add_tail(&entry->list, &dev->msi_list);
|
MSI: Give archs the option to allocate all MSI/Xs at once.
This patch introduces an optional function, arch_setup_msi_irqs(),
(note the plural) which gives an arch the opportunity to do per-device
setup for MSI/X and then allocate all the requested MSI/Xs at once.
If that's not required by the arch, the default version simply calls
arch_setup_msi_irq() for each MSI irq required.
arch_setup_msi_irqs() is passed a pdev, attached to the pdev is a list
of msi_descs with irq == 0, it is up to the arch to connect these up to
an irq (via set_irq_msi()) or return an error. For convenience the number
of vectors and the type are passed also.
All msi_descs with irq != 0 are considered allocated, and the arch
teardown routine will be called on them when necessary.
The existing semantics of pci_enable_msix() are that if the requested
number of irqs can not be allocated, the maximum number that _could_ be
allocated is returned. To support that, we define that in case of an
error from arch_setup_msi_irqs(), the number of msi_descs with irq != 0
are considered allocated, and are counted toward the "max that could be
allocated".
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-04-18 03:39:21 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Configure MSI capability structure */
|
2009-03-17 06:54:10 -06:00
|
|
|
ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
|
2007-04-18 03:39:21 -06:00
|
|
|
if (ret) {
|
2009-06-23 02:39:27 -06:00
|
|
|
msi_mask_irq(entry, mask, ~mask);
|
2009-08-05 20:32:51 -06:00
|
|
|
free_msi_irqs(dev);
|
2007-04-18 03:39:21 -06:00
|
|
|
return ret;
|
2006-04-10 20:17:48 -06:00
|
|
|
}
|
2007-01-28 12:56:37 -07:00
|
|
|
|
2011-10-06 12:08:18 -06:00
|
|
|
ret = populate_msi_sysfs(dev);
|
|
|
|
if (ret) {
|
|
|
|
msi_mask_irq(entry, mask, ~mask);
|
|
|
|
free_msi_irqs(dev);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Set MSI enabled bits */
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 0);
|
2013-04-04 10:54:30 -06:00
|
|
|
msi_set_enable(dev, 1);
|
2007-03-05 01:30:10 -07:00
|
|
|
dev->msi_enabled = 1;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-04-18 03:39:21 -06:00
|
|
|
dev->irq = entry->irq;
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-04 10:54:33 -06:00
|
|
|
static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
|
2009-08-05 20:34:34 -06:00
|
|
|
{
|
2010-06-16 19:42:44 -06:00
|
|
|
resource_size_t phys_addr;
|
2009-08-05 20:34:34 -06:00
|
|
|
u32 table_offset;
|
|
|
|
u8 bir;
|
|
|
|
|
2013-04-17 17:43:40 -06:00
|
|
|
pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
|
|
|
|
&table_offset);
|
2013-04-17 18:10:07 -06:00
|
|
|
bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
|
|
|
|
table_offset &= PCI_MSIX_TABLE_OFFSET;
|
2009-08-05 20:34:34 -06:00
|
|
|
phys_addr = pci_resource_start(dev, bir) + table_offset;
|
|
|
|
|
|
|
|
return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
|
|
|
|
}
|
|
|
|
|
2013-04-04 10:54:33 -06:00
|
|
|
static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
|
|
|
|
struct msix_entry *entries, int nvec)
|
2009-08-05 20:35:48 -06:00
|
|
|
{
|
|
|
|
struct msi_desc *entry;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < nvec; i++) {
|
|
|
|
entry = alloc_msi_entry(dev);
|
|
|
|
if (!entry) {
|
|
|
|
if (!i)
|
|
|
|
iounmap(base);
|
|
|
|
else
|
|
|
|
free_msi_irqs(dev);
|
|
|
|
/* No enough memory. Don't try again */
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
entry->msi_attrib.is_msix = 1;
|
|
|
|
entry->msi_attrib.is_64 = 1;
|
|
|
|
entry->msi_attrib.entry_nr = entries[i].entry;
|
|
|
|
entry->msi_attrib.default_irq = dev->irq;
|
2013-04-04 10:54:33 -06:00
|
|
|
entry->msi_attrib.pos = dev->msix_cap;
|
2009-08-05 20:35:48 -06:00
|
|
|
entry->mask_base = base;
|
|
|
|
|
|
|
|
list_add_tail(&entry->list, &dev->msi_list);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-08-05 20:35:10 -06:00
|
|
|
static void msix_program_entries(struct pci_dev *dev,
|
2013-04-04 10:54:33 -06:00
|
|
|
struct msix_entry *entries)
|
2009-08-05 20:35:10 -06:00
|
|
|
{
|
|
|
|
struct msi_desc *entry;
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
list_for_each_entry(entry, &dev->msi_list, list) {
|
|
|
|
int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +
|
|
|
|
PCI_MSIX_ENTRY_VECTOR_CTRL;
|
|
|
|
|
|
|
|
entries[i].vector = entry->irq;
|
2011-03-28 09:49:12 -06:00
|
|
|
irq_set_msi_desc(entry->irq, entry);
|
2009-08-05 20:35:10 -06:00
|
|
|
entry->masked = readl(entry->mask_base + offset);
|
|
|
|
msix_mask_irq(entry, 1);
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* msix_capability_init - configure device's MSI-X capability
|
|
|
|
* @dev: pointer to the pci_dev data structure of MSI-X device function
|
2005-10-23 12:57:38 -06:00
|
|
|
* @entries: pointer to an array of struct msix_entry entries
|
|
|
|
* @nvec: number of @entries
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
2005-05-03 18:38:30 -06:00
|
|
|
* Setup the MSI-X capability structure of device function with a
|
2006-10-04 03:16:41 -06:00
|
|
|
* single MSI-X irq. A return of zero indicates the successful setup of
|
|
|
|
* requested MSI-X entries with allocated irqs or non-zero for otherwise.
|
2005-04-16 16:20:36 -06:00
|
|
|
**/
|
|
|
|
static int msix_capability_init(struct pci_dev *dev,
|
|
|
|
struct msix_entry *entries, int nvec)
|
|
|
|
{
|
2013-04-04 10:54:33 -06:00
|
|
|
int ret;
|
2009-08-05 20:34:34 -06:00
|
|
|
u16 control;
|
2005-04-16 16:20:36 -06:00
|
|
|
void __iomem *base;
|
|
|
|
|
2013-04-04 10:54:33 -06:00
|
|
|
pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
|
2009-06-18 20:15:59 -06:00
|
|
|
|
|
|
|
/* Ensure MSI-X is disabled while it is set up */
|
|
|
|
control &= ~PCI_MSIX_FLAGS_ENABLE;
|
2013-04-04 10:54:33 -06:00
|
|
|
pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
|
2009-06-18 20:15:59 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Request & Map MSI-X table region */
|
2013-04-17 17:44:48 -06:00
|
|
|
base = msix_map_region(dev, msix_table_size(control));
|
2009-08-05 20:34:34 -06:00
|
|
|
if (!base)
|
2005-04-16 16:20:36 -06:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2013-04-04 10:54:33 -06:00
|
|
|
ret = msix_setup_entries(dev, base, entries, nvec);
|
2009-08-05 20:35:48 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
MSI: Give archs the option to allocate all MSI/Xs at once.
This patch introduces an optional function, arch_setup_msi_irqs(),
(note the plural) which gives an arch the opportunity to do per-device
setup for MSI/X and then allocate all the requested MSI/Xs at once.
If that's not required by the arch, the default version simply calls
arch_setup_msi_irq() for each MSI irq required.
arch_setup_msi_irqs() is passed a pdev, attached to the pdev is a list
of msi_descs with irq == 0, it is up to the arch to connect these up to
an irq (via set_irq_msi()) or return an error. For convenience the number
of vectors and the type are passed also.
All msi_descs with irq != 0 are considered allocated, and the arch
teardown routine will be called on them when necessary.
The existing semantics of pci_enable_msix() are that if the requested
number of irqs can not be allocated, the maximum number that _could_ be
allocated is returned. To support that, we define that in case of an
error from arch_setup_msi_irqs(), the number of msi_descs with irq != 0
are considered allocated, and are counted toward the "max that could be
allocated".
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-04-18 03:39:21 -06:00
|
|
|
|
|
|
|
ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
|
2009-08-05 20:33:39 -06:00
|
|
|
if (ret)
|
|
|
|
goto error;
|
MSI: Give archs the option to allocate all MSI/Xs at once.
This patch introduces an optional function, arch_setup_msi_irqs(),
(note the plural) which gives an arch the opportunity to do per-device
setup for MSI/X and then allocate all the requested MSI/Xs at once.
If that's not required by the arch, the default version simply calls
arch_setup_msi_irq() for each MSI irq required.
arch_setup_msi_irqs() is passed a pdev, attached to the pdev is a list
of msi_descs with irq == 0, it is up to the arch to connect these up to
an irq (via set_irq_msi()) or return an error. For convenience the number
of vectors and the type are passed also.
All msi_descs with irq != 0 are considered allocated, and the arch
teardown routine will be called on them when necessary.
The existing semantics of pci_enable_msix() are that if the requested
number of irqs can not be allocated, the maximum number that _could_ be
allocated is returned. To support that, we define that in case of an
error from arch_setup_msi_irqs(), the number of msi_descs with irq != 0
are considered allocated, and are counted toward the "max that could be
allocated".
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-04-18 03:39:21 -06:00
|
|
|
|
2009-06-18 20:15:59 -06:00
|
|
|
/*
|
|
|
|
* Some devices require MSI-X to be enabled before we can touch the
|
|
|
|
* MSI-X registers. We need to mask all the vectors to prevent
|
|
|
|
* interrupts coming in before they're fully set up.
|
|
|
|
*/
|
|
|
|
control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE;
|
2013-04-04 10:54:33 -06:00
|
|
|
pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
|
2009-06-18 20:15:59 -06:00
|
|
|
|
2009-08-05 20:35:10 -06:00
|
|
|
msix_program_entries(dev, entries);
|
2009-06-18 20:15:59 -06:00
|
|
|
|
2011-10-06 12:08:18 -06:00
|
|
|
ret = populate_msi_sysfs(dev);
|
|
|
|
if (ret) {
|
|
|
|
ret = 0;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2009-06-18 20:15:59 -06:00
|
|
|
/* Set MSI-X enabled bits and unmask the function */
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 0);
|
2007-03-05 01:30:10 -07:00
|
|
|
dev->msix_enabled = 1;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-06-18 20:15:59 -06:00
|
|
|
control &= ~PCI_MSIX_FLAGS_MASKALL;
|
2013-04-04 10:54:33 -06:00
|
|
|
pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
|
2009-05-08 07:13:33 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
2009-08-05 20:33:39 -06:00
|
|
|
|
|
|
|
error:
|
|
|
|
if (ret < 0) {
|
|
|
|
/*
|
|
|
|
* If we had some success, report the number of irqs
|
|
|
|
* we succeeded in setting up.
|
|
|
|
*/
|
2009-08-05 20:35:48 -06:00
|
|
|
struct msi_desc *entry;
|
2009-08-05 20:33:39 -06:00
|
|
|
int avail = 0;
|
|
|
|
|
|
|
|
list_for_each_entry(entry, &dev->msi_list, list) {
|
|
|
|
if (entry->irq != 0)
|
|
|
|
avail++;
|
|
|
|
}
|
|
|
|
if (avail != 0)
|
|
|
|
ret = avail;
|
|
|
|
}
|
|
|
|
|
|
|
|
free_msi_irqs(dev);
|
|
|
|
|
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2006-08-30 23:55:07 -06:00
|
|
|
/**
|
2007-04-05 01:19:07 -06:00
|
|
|
* pci_msi_check_device - check whether MSI may be enabled on a device
|
2006-08-30 23:55:07 -06:00
|
|
|
* @dev: pointer to the pci_dev data structure of MSI device function
|
2007-04-05 01:19:08 -06:00
|
|
|
* @nvec: how many MSIs have been requested ?
|
2007-03-22 04:51:39 -06:00
|
|
|
* @type: are we checking for MSI or MSI-X ?
|
2006-08-30 23:55:07 -06:00
|
|
|
*
|
2006-10-05 02:24:31 -06:00
|
|
|
* Look at global flags, the device itself, and its parent busses
|
2007-04-05 01:19:07 -06:00
|
|
|
* to determine if MSI/-X are supported for the device. If MSI/-X is
|
|
|
|
* supported return 0, else return an error code.
|
2006-08-30 23:55:07 -06:00
|
|
|
**/
|
2009-08-09 19:14:15 -06:00
|
|
|
static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type)
|
2006-08-30 23:55:07 -06:00
|
|
|
{
|
|
|
|
struct pci_bus *bus;
|
2007-04-05 01:19:08 -06:00
|
|
|
int ret;
|
2006-08-30 23:55:07 -06:00
|
|
|
|
2006-10-05 02:24:31 -06:00
|
|
|
/* MSI must be globally enabled and supported by the device */
|
2006-08-30 23:55:07 -06:00
|
|
|
if (!pci_msi_enable || !dev || dev->no_msi)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2007-04-05 01:19:12 -06:00
|
|
|
/*
|
|
|
|
* You can't ask to have 0 or less MSIs configured.
|
|
|
|
* a) it's stupid ..
|
|
|
|
* b) the list manipulation code assumes nvec >= 1.
|
|
|
|
*/
|
|
|
|
if (nvec < 1)
|
|
|
|
return -ERANGE;
|
|
|
|
|
2009-08-09 19:14:15 -06:00
|
|
|
/*
|
|
|
|
* Any bridge which does NOT route MSI transactions from its
|
|
|
|
* secondary bus to its primary bus must set NO_MSI flag on
|
2006-10-05 02:24:31 -06:00
|
|
|
* the secondary pci_bus.
|
|
|
|
* We expect only arch-specific PCI host bus controller driver
|
|
|
|
* or quirks for specific PCI bridges to be setting NO_MSI.
|
|
|
|
*/
|
2006-08-30 23:55:07 -06:00
|
|
|
for (bus = dev->bus; bus; bus = bus->parent)
|
|
|
|
if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2007-04-05 01:19:08 -06:00
|
|
|
ret = arch_msi_check_device(dev, nvec, type);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2006-08-30 23:55:07 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
2009-03-17 06:54:10 -06:00
|
|
|
* pci_enable_msi_block - configure device's MSI capability structure
|
|
|
|
* @dev: device to configure
|
|
|
|
* @nvec: number of interrupts to configure
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
2009-03-17 06:54:10 -06:00
|
|
|
* Allocate IRQs for a device with the MSI capability.
|
|
|
|
* This function returns a negative errno if an error occurs. If it
|
|
|
|
* is unable to allocate the number of interrupts requested, it returns
|
|
|
|
* the number of interrupts it might be able to allocate. If it successfully
|
|
|
|
* allocates at least the number of interrupts requested, it returns 0 and
|
|
|
|
* updates the @dev's irq member to the lowest new interrupt number; the
|
|
|
|
* other interrupt numbers allocated to this device are consecutive.
|
|
|
|
*/
|
|
|
|
int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2013-04-04 10:54:32 -06:00
|
|
|
int status, maxvec;
|
2009-03-17 06:54:10 -06:00
|
|
|
u16 msgctl;
|
|
|
|
|
2013-10-10 06:58:11 -06:00
|
|
|
if (!dev->msi_cap || dev->current_state != PCI_D0)
|
2009-03-17 06:54:10 -06:00
|
|
|
return -EINVAL;
|
2013-04-04 10:54:32 -06:00
|
|
|
|
|
|
|
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
|
2009-03-17 06:54:10 -06:00
|
|
|
maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
|
|
|
|
if (nvec > maxvec)
|
|
|
|
return maxvec;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-17 06:54:10 -06:00
|
|
|
status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
|
2007-04-05 01:19:08 -06:00
|
|
|
if (status)
|
|
|
|
return status;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-01-28 12:42:52 -07:00
|
|
|
WARN_ON(!!dev->msi_enabled);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-17 06:54:10 -06:00
|
|
|
/* Check whether driver already requested MSI-X irqs */
|
2007-03-05 01:30:10 -07:00
|
|
|
if (dev->msix_enabled) {
|
2008-06-13 10:52:11 -06:00
|
|
|
dev_info(&dev->dev, "can't enable MSI "
|
|
|
|
"(MSI-X already enabled)\n");
|
2007-03-05 01:30:10 -07:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-03-17 06:54:10 -06:00
|
|
|
|
|
|
|
status = msi_capability_init(dev, nvec);
|
2005-04-16 16:20:36 -06:00
|
|
|
return status;
|
|
|
|
}
|
2009-03-17 06:54:10 -06:00
|
|
|
EXPORT_SYMBOL(pci_enable_msi_block);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-11-19 08:02:10 -07:00
|
|
|
int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
|
|
|
|
{
|
2013-04-04 10:54:32 -06:00
|
|
|
int ret, nvec;
|
2012-11-19 08:02:10 -07:00
|
|
|
u16 msgctl;
|
|
|
|
|
2013-10-10 06:58:11 -06:00
|
|
|
if (!dev->msi_cap || dev->current_state != PCI_D0)
|
2012-11-19 08:02:10 -07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2013-04-04 10:54:32 -06:00
|
|
|
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
|
2012-11-19 08:02:10 -07:00
|
|
|
ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
|
|
|
|
|
|
|
|
if (maxvec)
|
|
|
|
*maxvec = ret;
|
|
|
|
|
|
|
|
do {
|
|
|
|
nvec = ret;
|
|
|
|
ret = pci_enable_msi_block(dev, nvec);
|
|
|
|
} while (ret > 0);
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
return nvec;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(pci_enable_msi_block_auto);
|
|
|
|
|
2009-03-17 06:54:09 -06:00
|
|
|
void pci_msi_shutdown(struct pci_dev *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-03-17 06:54:09 -06:00
|
|
|
struct msi_desc *desc;
|
|
|
|
u32 mask;
|
|
|
|
u16 ctrl;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-03-22 04:51:39 -06:00
|
|
|
if (!pci_msi_enable || !dev || !dev->msi_enabled)
|
2007-01-28 12:42:52 -07:00
|
|
|
return;
|
|
|
|
|
2009-06-16 06:31:45 -06:00
|
|
|
BUG_ON(list_empty(&dev->msi_list));
|
|
|
|
desc = list_first_entry(&dev->msi_list, struct msi_desc, list);
|
|
|
|
|
2013-04-04 10:54:30 -06:00
|
|
|
msi_set_enable(dev, 0);
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 1);
|
2007-03-05 01:30:10 -07:00
|
|
|
dev->msi_enabled = 0;
|
2006-10-04 03:16:31 -06:00
|
|
|
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
/* Return the device with MSI unmasked as initial states */
|
2013-04-17 17:34:36 -06:00
|
|
|
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);
|
2009-03-17 06:54:09 -06:00
|
|
|
mask = msi_capable_mask(ctrl);
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
/* Keep cached state to be restored */
|
|
|
|
__msi_mask_irq(desc, mask, ~mask);
|
2007-03-22 04:51:27 -06:00
|
|
|
|
|
|
|
/* Restore dev->irq to its default pin-assertion irq */
|
2009-03-17 06:54:09 -06:00
|
|
|
dev->irq = desc->msi_attrib.default_irq;
|
2008-04-23 15:58:09 -06:00
|
|
|
}
|
2009-03-17 06:54:06 -06:00
|
|
|
|
2009-08-09 19:14:15 -06:00
|
|
|
void pci_disable_msi(struct pci_dev *dev)
|
2008-04-23 15:58:09 -06:00
|
|
|
{
|
|
|
|
if (!pci_msi_enable || !dev || !dev->msi_enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
pci_msi_shutdown(dev);
|
2009-08-05 20:32:51 -06:00
|
|
|
free_msi_irqs(dev);
|
2011-10-06 12:08:18 -06:00
|
|
|
kset_unregister(dev->msi_kset);
|
|
|
|
dev->msi_kset = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2007-03-22 04:51:34 -06:00
|
|
|
EXPORT_SYMBOL(pci_disable_msi);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-01-23 16:21:14 -07:00
|
|
|
/**
|
|
|
|
* pci_msix_table_size - return the number of device's MSI-X table entries
|
|
|
|
* @dev: pointer to the pci_dev data structure of MSI-X device function
|
|
|
|
*/
|
|
|
|
int pci_msix_table_size(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
u16 control;
|
|
|
|
|
2013-04-04 10:54:33 -06:00
|
|
|
if (!dev->msix_cap)
|
2009-01-23 16:21:14 -07:00
|
|
|
return 0;
|
|
|
|
|
2013-04-17 17:38:32 -06:00
|
|
|
pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
|
2013-04-17 17:44:48 -06:00
|
|
|
return msix_table_size(control);
|
2009-01-23 16:21:14 -07:00
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/**
|
|
|
|
* pci_enable_msix - configure device's MSI-X capability structure
|
|
|
|
* @dev: pointer to the pci_dev data structure of MSI-X device function
|
2005-06-07 00:07:46 -06:00
|
|
|
* @entries: pointer to an array of MSI-X entries
|
2006-10-04 03:16:41 -06:00
|
|
|
* @nvec: number of MSI-X irqs requested for allocation by device driver
|
2005-04-16 16:20:36 -06:00
|
|
|
*
|
|
|
|
* Setup the MSI-X capability structure of device function with the number
|
2006-10-04 03:16:41 -06:00
|
|
|
* of requested irqs upon its software driver call to request for
|
2005-04-16 16:20:36 -06:00
|
|
|
* MSI-X mode enabled on its hardware device function. A return of zero
|
|
|
|
* indicates the successful configuration of MSI-X capability structure
|
2006-10-04 03:16:41 -06:00
|
|
|
* with new allocated MSI-X irqs. A return of < 0 indicates a failure.
|
2005-04-16 16:20:36 -06:00
|
|
|
* Or a return of > 0 indicates that driver request is exceeding the number
|
2009-05-07 02:28:41 -06:00
|
|
|
* of irqs or MSI-X vectors available. Driver should use the returned value to
|
|
|
|
* re-send its request.
|
2005-04-16 16:20:36 -06:00
|
|
|
**/
|
2009-08-09 19:14:15 -06:00
|
|
|
int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-01-23 16:21:14 -07:00
|
|
|
int status, nr_entries;
|
2007-01-28 12:42:52 -07:00
|
|
|
int i, j;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2013-10-10 06:58:11 -06:00
|
|
|
if (!entries || !dev->msix_cap || dev->current_state != PCI_D0)
|
2009-08-09 19:14:15 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2007-04-05 01:19:08 -06:00
|
|
|
status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
|
|
|
|
if (status)
|
|
|
|
return status;
|
|
|
|
|
2009-01-23 16:21:14 -07:00
|
|
|
nr_entries = pci_msix_table_size(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (nvec > nr_entries)
|
2009-05-07 02:28:41 -06:00
|
|
|
return nr_entries;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Check for any invalid entries */
|
|
|
|
for (i = 0; i < nvec; i++) {
|
|
|
|
if (entries[i].entry >= nr_entries)
|
|
|
|
return -EINVAL; /* invalid entry */
|
|
|
|
for (j = i + 1; j < nvec; j++) {
|
|
|
|
if (entries[i].entry == entries[j].entry)
|
|
|
|
return -EINVAL; /* duplicate entry */
|
|
|
|
}
|
|
|
|
}
|
2007-01-28 12:42:52 -07:00
|
|
|
WARN_ON(!!dev->msix_enabled);
|
2006-10-04 03:16:31 -06:00
|
|
|
|
2006-10-04 03:16:41 -06:00
|
|
|
/* Check whether driver already requested for MSI irq */
|
2009-08-09 19:14:15 -06:00
|
|
|
if (dev->msi_enabled) {
|
2008-06-13 10:52:11 -06:00
|
|
|
dev_info(&dev->dev, "can't enable MSI-X "
|
|
|
|
"(MSI IRQ already assigned)\n");
|
2005-04-16 16:20:36 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
status = msix_capability_init(dev, entries, nvec);
|
|
|
|
return status;
|
|
|
|
}
|
2007-03-22 04:51:34 -06:00
|
|
|
EXPORT_SYMBOL(pci_enable_msix);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-08-09 19:14:15 -06:00
|
|
|
void pci_msix_shutdown(struct pci_dev *dev)
|
2007-03-22 04:51:33 -06:00
|
|
|
{
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
struct msi_desc *entry;
|
|
|
|
|
2007-03-22 04:51:39 -06:00
|
|
|
if (!pci_msi_enable || !dev || !dev->msix_enabled)
|
2007-01-28 12:42:52 -07:00
|
|
|
return;
|
|
|
|
|
PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume
There are 2 problems on mask states in suspend/resume.
[1]:
It is better to restore the mask states of MSI/MSI-X to initial states
(MSI is unmasked, MSI-X is masked) when we release the device.
The pci_msi_shutdown() does the restoration of mask states for MSI,
while the msi_free_irqs() does it for MSI-X. In other words, in the
"disable" path both of MSI and MSI-X are handled, but in the "shutdown"
path only MSI is handled.
MSI:
pci_disable_msi()
=> pci_msi_shutdown()
[ mask states for MSI restored ]
=> msi_set_enable(dev, pos, 0);
=> msi_free_irqs()
MSI-X:
pci_disable_msix()
=> pci_msix_shutdown()
=> msix_set_enable(dev, 0);
=> msix_free_all_irqs
=> msi_free_irqs()
[ mask states for MSI-X restored ]
This patch moves the masking for MSI-X from msi_free_irqs() to
pci_msix_shutdown().
This change has some positive side effects:
- It prevents OS from touching mask states before reading preserved
bits in the register, which can be happen if msi_free_irqs() is
called from error path in msix_capability_init().
- It also prevents touching the register after turning off MSI-X in
"disable" path, which can be a problem on some devices.
[2]:
We have cache of the mask state in msi_desc, which is automatically
updated when msi/msix_mask_irq() is called. This cached states are
used for the resume.
But since what need to be restored in the resume is the states before
the shutdown on the suspend, calling msi/msix_mask_irq() from
pci_msi/msix_shutdown() is not appropriate.
This patch introduces __msi/msix_mask_irq() that do mask as same
as msi/msix_mask_irq() but does not update cached state, for use
in pci_msi/msix_shutdown().
[updated: get rid of msi/msix_mask_irq_nocache() (proposed by Matthew Wilcox)]
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-23 21:08:09 -06:00
|
|
|
/* Return the device with MSI-X masked as initial states */
|
|
|
|
list_for_each_entry(entry, &dev->msi_list, list) {
|
|
|
|
/* Keep cached states to be restored */
|
|
|
|
__msix_mask_irq(entry, 1);
|
|
|
|
}
|
|
|
|
|
2007-03-05 01:30:10 -07:00
|
|
|
msix_set_enable(dev, 0);
|
2007-10-25 02:16:30 -06:00
|
|
|
pci_intx_for_msi(dev, 1);
|
2007-03-05 01:30:10 -07:00
|
|
|
dev->msix_enabled = 0;
|
2008-04-23 15:58:09 -06:00
|
|
|
}
|
2009-08-05 20:31:27 -06:00
|
|
|
|
2009-08-09 19:14:15 -06:00
|
|
|
void pci_disable_msix(struct pci_dev *dev)
|
2008-04-23 15:58:09 -06:00
|
|
|
{
|
|
|
|
if (!pci_msi_enable || !dev || !dev->msix_enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
pci_msix_shutdown(dev);
|
2009-08-05 20:32:51 -06:00
|
|
|
free_msi_irqs(dev);
|
2011-10-06 12:08:18 -06:00
|
|
|
kset_unregister(dev->msi_kset);
|
|
|
|
dev->msi_kset = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2007-03-22 04:51:34 -06:00
|
|
|
EXPORT_SYMBOL(pci_disable_msix);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/**
|
2006-10-04 03:16:41 -06:00
|
|
|
* msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
|
2005-04-16 16:20:36 -06:00
|
|
|
* @dev: pointer to the pci_dev data structure of MSI(X) device function
|
|
|
|
*
|
2005-05-03 18:38:30 -06:00
|
|
|
* Being called during hotplug remove, from which the device function
|
2006-10-04 03:16:41 -06:00
|
|
|
* is hot-removed. All previous assigned MSI/MSI-X irqs, if
|
2005-04-16 16:20:36 -06:00
|
|
|
* allocated for this device function, are reclaimed to unused state,
|
|
|
|
* which may be used later on.
|
|
|
|
**/
|
2009-08-09 19:14:15 -06:00
|
|
|
void msi_remove_pci_irq_vectors(struct pci_dev *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
if (!pci_msi_enable || !dev)
|
2009-08-09 19:14:15 -06:00
|
|
|
return;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-08-05 20:32:51 -06:00
|
|
|
if (dev->msi_enabled || dev->msix_enabled)
|
|
|
|
free_msi_irqs(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2006-03-05 22:33:34 -07:00
|
|
|
void pci_no_msi(void)
|
|
|
|
{
|
|
|
|
pci_msi_enable = 0;
|
|
|
|
}
|
2007-04-05 01:19:08 -06:00
|
|
|
|
2008-11-10 15:31:05 -07:00
|
|
|
/**
|
|
|
|
* pci_msi_enabled - is MSI enabled?
|
|
|
|
*
|
|
|
|
* Returns true if MSI has not been disabled by the command-line option
|
|
|
|
* pci=nomsi.
|
|
|
|
**/
|
|
|
|
int pci_msi_enabled(void)
|
2008-10-16 22:52:51 -06:00
|
|
|
{
|
2008-11-10 15:31:05 -07:00
|
|
|
return pci_msi_enable;
|
2008-10-16 22:52:51 -06:00
|
|
|
}
|
2008-11-10 15:31:05 -07:00
|
|
|
EXPORT_SYMBOL(pci_msi_enabled);
|
2008-10-16 22:52:51 -06:00
|
|
|
|
2008-11-10 15:31:05 -07:00
|
|
|
void pci_msi_init_pci_dev(struct pci_dev *dev)
|
2008-10-16 22:52:51 -06:00
|
|
|
{
|
2008-11-10 15:31:05 -07:00
|
|
|
INIT_LIST_HEAD(&dev->msi_list);
|
2011-10-17 12:46:06 -06:00
|
|
|
|
|
|
|
/* Disable the msi hardware to avoid screaming interrupts
|
|
|
|
* during boot. This is the power on reset default so
|
|
|
|
* usually this should be a noop.
|
|
|
|
*/
|
2013-04-04 10:54:30 -06:00
|
|
|
dev->msi_cap = pci_find_capability(dev, PCI_CAP_ID_MSI);
|
|
|
|
if (dev->msi_cap)
|
|
|
|
msi_set_enable(dev, 0);
|
|
|
|
|
|
|
|
dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);
|
|
|
|
if (dev->msix_cap)
|
|
|
|
msix_set_enable(dev, 0);
|
2008-10-16 22:52:51 -06:00
|
|
|
}
|