2006-01-01 20:26:20 -07:00
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/* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
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2007-11-04 19:50:58 -07:00
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*
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2006-01-01 20:26:20 -07:00
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* Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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2007-11-04 19:50:58 -07:00
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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2006-01-01 20:26:20 -07:00
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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2007-11-04 19:50:58 -07:00
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* Authors:
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2006-01-01 20:26:20 -07:00
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* Thomas Hellstrom.
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* Partially based on code obtained from Digeo Inc.
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*/
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/*
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2007-11-04 19:50:58 -07:00
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* Unmaps the DMA mappings.
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* FIXME: Is this a NoOp on x86? Also
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* FIXME: What happens if this one is called and a pending blit has previously done
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* the same DMA mappings?
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2006-01-01 20:26:20 -07:00
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*/
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2012-10-02 11:01:07 -06:00
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#include <drm/drmP.h>
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#include <drm/via_drm.h>
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2006-01-01 20:26:20 -07:00
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#include "via_drv.h"
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#include "via_dmablit.h"
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#include <linux/pagemap.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2006-01-01 20:26:20 -07:00
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2006-08-19 01:40:50 -06:00
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#define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK)
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#define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK)
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#define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT)
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2006-01-01 20:26:20 -07:00
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typedef struct _drm_via_descriptor {
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uint32_t mem_addr;
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uint32_t dev_addr;
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uint32_t size;
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uint32_t next;
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} drm_via_descriptor_t;
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/*
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* Unmap a DMA mapping.
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*/
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static void
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via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
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{
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int num_desc = vsg->num_desc;
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unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
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unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
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2007-11-04 19:50:58 -07:00
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drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
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2006-01-01 20:26:20 -07:00
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descriptor_this_page;
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dma_addr_t next = vsg->chain_start;
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2010-07-11 07:32:42 -06:00
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while (num_desc--) {
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2006-01-01 20:26:20 -07:00
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if (descriptor_this_page-- == 0) {
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cur_descriptor_page--;
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descriptor_this_page = vsg->descriptors_per_page - 1;
|
2007-11-04 19:50:58 -07:00
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desc_ptr = vsg->desc_pages[cur_descriptor_page] +
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2006-01-01 20:26:20 -07:00
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descriptor_this_page;
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}
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dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
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dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
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next = (dma_addr_t) desc_ptr->next;
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desc_ptr--;
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}
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}
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/*
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* If mode = 0, count how many descriptors are needed.
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* If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
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* Descriptors are run in reverse order by the hardware because we are not allowed to update the
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* 'next' field without syncing calls when the descriptor is already mapped.
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*/
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static void
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via_map_blit_for_device(struct pci_dev *pdev,
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const drm_via_dmablit_t *xfer,
|
2007-11-04 19:50:58 -07:00
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drm_via_sg_info_t *vsg,
|
2006-01-01 20:26:20 -07:00
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int mode)
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{
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unsigned cur_descriptor_page = 0;
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unsigned num_descriptors_this_page = 0;
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unsigned char *mem_addr = xfer->mem_addr;
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unsigned char *cur_mem;
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unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
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uint32_t fb_addr = xfer->fb_addr;
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uint32_t cur_fb;
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unsigned long line_len;
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unsigned remaining_len;
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int num_desc = 0;
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int cur_line;
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dma_addr_t next = 0 | VIA_DMA_DPR_EC;
|
2006-01-25 14:32:14 -07:00
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drm_via_descriptor_t *desc_ptr = NULL;
|
2006-01-01 20:26:20 -07:00
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|
2007-11-04 19:50:58 -07:00
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if (mode == 1)
|
2006-01-01 20:26:20 -07:00
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desc_ptr = vsg->desc_pages[cur_descriptor_page];
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for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
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line_len = xfer->line_length;
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cur_fb = fb_addr;
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cur_mem = mem_addr;
|
2007-11-04 19:50:58 -07:00
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2006-01-01 20:26:20 -07:00
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while (line_len > 0) {
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|
2006-08-19 01:40:50 -06:00
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remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
|
2006-01-01 20:26:20 -07:00
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line_len -= remaining_len;
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if (mode == 1) {
|
2007-11-04 19:50:58 -07:00
|
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desc_ptr->mem_addr =
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dma_map_page(&pdev->dev,
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vsg->pages[VIA_PFN(cur_mem) -
|
2006-01-01 20:26:20 -07:00
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VIA_PFN(first_addr)],
|
2007-11-04 19:50:58 -07:00
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VIA_PGOFF(cur_mem), remaining_len,
|
2006-01-01 20:26:20 -07:00
|
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vsg->direction);
|
2006-08-19 01:40:50 -06:00
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desc_ptr->dev_addr = cur_fb;
|
2007-11-04 19:50:58 -07:00
|
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|
2006-08-19 01:40:50 -06:00
|
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|
desc_ptr->size = remaining_len;
|
2006-01-01 20:26:20 -07:00
|
|
|
desc_ptr->next = (uint32_t) next;
|
2007-11-04 19:50:58 -07:00
|
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|
next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
|
2006-01-01 20:26:20 -07:00
|
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|
DMA_TO_DEVICE);
|
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|
desc_ptr++;
|
|
|
|
if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
|
|
|
|
num_descriptors_this_page = 0;
|
|
|
|
desc_ptr = vsg->desc_pages[++cur_descriptor_page];
|
|
|
|
}
|
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}
|
2007-11-04 19:50:58 -07:00
|
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|
2006-01-01 20:26:20 -07:00
|
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num_desc++;
|
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cur_mem += remaining_len;
|
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|
cur_fb += remaining_len;
|
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}
|
2007-11-04 19:50:58 -07:00
|
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|
2006-01-01 20:26:20 -07:00
|
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mem_addr += xfer->mem_stride;
|
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|
fb_addr += xfer->fb_stride;
|
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}
|
|
|
|
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|
if (mode == 1) {
|
|
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|
vsg->chain_start = next;
|
|
|
|
vsg->state = dr_via_device_mapped;
|
|
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|
}
|
|
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vsg->num_desc = num_desc;
|
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}
|
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/*
|
2007-11-04 19:50:58 -07:00
|
|
|
* Function that frees up all resources for a blit. It is usable even if the
|
2006-08-19 01:40:50 -06:00
|
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* blit info has only been partially built as long as the status enum is consistent
|
2006-01-01 20:26:20 -07:00
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* with the actual status of the used resources.
|
|
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*/
|
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|
2006-02-02 01:21:38 -07:00
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|
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static void
|
2007-11-04 19:50:58 -07:00
|
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via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
|
2006-01-01 20:26:20 -07:00
|
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{
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|
|
|
struct page *page;
|
|
|
|
int i;
|
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
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switch (vsg->state) {
|
2006-01-01 20:26:20 -07:00
|
|
|
case dr_via_device_mapped:
|
|
|
|
via_unmap_blit_from_device(pdev, vsg);
|
|
|
|
case dr_via_desc_pages_alloc:
|
2010-07-11 07:32:42 -06:00
|
|
|
for (i = 0; i < vsg->num_desc_pages; ++i) {
|
2006-01-01 20:26:20 -07:00
|
|
|
if (vsg->desc_pages[i] != NULL)
|
2010-07-11 07:32:42 -06:00
|
|
|
free_page((unsigned long)vsg->desc_pages[i]);
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
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kfree(vsg->desc_pages);
|
|
|
|
case dr_via_pages_locked:
|
2010-07-11 07:32:42 -06:00
|
|
|
for (i = 0; i < vsg->num_pages; ++i) {
|
|
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if (NULL != (page = vsg->pages[i])) {
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|
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|
if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
|
2006-01-01 20:26:20 -07:00
|
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|
SetPageDirty(page);
|
mm, fs: get rid of PAGE_CACHE_* and page_cache_{get,release} macros
PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} macros were introduced *long* time
ago with promise that one day it will be possible to implement page
cache with bigger chunks than PAGE_SIZE.
This promise never materialized. And unlikely will.
We have many places where PAGE_CACHE_SIZE assumed to be equal to
PAGE_SIZE. And it's constant source of confusion on whether
PAGE_CACHE_* or PAGE_* constant should be used in a particular case,
especially on the border between fs and mm.
Global switching to PAGE_CACHE_SIZE != PAGE_SIZE would cause to much
breakage to be doable.
Let's stop pretending that pages in page cache are special. They are
not.
The changes are pretty straight-forward:
- <foo> << (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>;
- <foo> >> (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>;
- PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} -> PAGE_{SIZE,SHIFT,MASK,ALIGN};
- page_cache_get() -> get_page();
- page_cache_release() -> put_page();
This patch contains automated changes generated with coccinelle using
script below. For some reason, coccinelle doesn't patch header files.
I've called spatch for them manually.
The only adjustment after coccinelle is revert of changes to
PAGE_CAHCE_ALIGN definition: we are going to drop it later.
There are few places in the code where coccinelle didn't reach. I'll
fix them manually in a separate patch. Comments and documentation also
will be addressed with the separate patch.
virtual patch
@@
expression E;
@@
- E << (PAGE_CACHE_SHIFT - PAGE_SHIFT)
+ E
@@
expression E;
@@
- E >> (PAGE_CACHE_SHIFT - PAGE_SHIFT)
+ E
@@
@@
- PAGE_CACHE_SHIFT
+ PAGE_SHIFT
@@
@@
- PAGE_CACHE_SIZE
+ PAGE_SIZE
@@
@@
- PAGE_CACHE_MASK
+ PAGE_MASK
@@
expression E;
@@
- PAGE_CACHE_ALIGN(E)
+ PAGE_ALIGN(E)
@@
expression E;
@@
- page_cache_get(E)
+ get_page(E)
@@
expression E;
@@
- page_cache_release(E)
+ put_page(E)
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-04-01 06:29:47 -06:00
|
|
|
put_page(page);
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
case dr_via_pages_alloc:
|
|
|
|
vfree(vsg->pages);
|
|
|
|
default:
|
|
|
|
vsg->state = dr_via_sg_init;
|
|
|
|
}
|
2009-06-06 04:26:26 -06:00
|
|
|
vfree(vsg->bounce_buffer);
|
|
|
|
vsg->bounce_buffer = NULL;
|
2006-01-01 20:26:20 -07:00
|
|
|
vsg->free_on_sequence = 0;
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Fire a blit engine.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void
|
2007-07-10 23:53:27 -06:00
|
|
|
via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0);
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0);
|
2007-11-04 19:50:58 -07:00
|
|
|
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
|
2006-01-01 20:26:20 -07:00
|
|
|
VIA_DMA_CSR_DE);
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
|
2013-12-11 03:34:45 -07:00
|
|
|
wmb();
|
2006-01-01 20:26:20 -07:00
|
|
|
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
|
2007-01-08 03:03:23 -07:00
|
|
|
VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
|
|
|
|
* occur here if the calling user does not have access to the submitted address.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int
|
|
|
|
via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
|
2010-07-11 07:32:42 -06:00
|
|
|
vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
|
2006-01-01 20:26:20 -07:00
|
|
|
first_pfn + 1;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2010-11-04 21:07:34 -06:00
|
|
|
vsg->pages = vzalloc(sizeof(struct page *) * vsg->num_pages);
|
|
|
|
if (NULL == vsg->pages)
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2006-01-01 20:26:20 -07:00
|
|
|
down_read(¤t->mm->mmap_sem);
|
2016-02-12 14:01:56 -07:00
|
|
|
ret = get_user_pages((unsigned long)xfer->mem_addr,
|
2006-08-19 01:40:50 -06:00
|
|
|
vsg->num_pages,
|
|
|
|
(vsg->direction == DMA_FROM_DEVICE),
|
|
|
|
0, vsg->pages, NULL);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
if (ret != vsg->num_pages) {
|
2007-11-04 19:50:58 -07:00
|
|
|
if (ret < 0)
|
2006-01-01 20:26:20 -07:00
|
|
|
return ret;
|
|
|
|
vsg->state = dr_via_pages_locked;
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
vsg->state = dr_via_pages_locked;
|
|
|
|
DRM_DEBUG("DMA pages locked\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
|
|
|
|
* pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
|
2015-07-06 19:14:59 -06:00
|
|
|
* quite large for some blits, and pages don't need to be contiguous.
|
2006-01-01 20:26:20 -07:00
|
|
|
*/
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
static int
|
2006-01-01 20:26:20 -07:00
|
|
|
via_alloc_desc_pages(drm_via_sg_info_t *vsg)
|
|
|
|
{
|
|
|
|
int i;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
|
2007-11-04 19:50:58 -07:00
|
|
|
vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
|
2006-01-01 20:26:20 -07:00
|
|
|
vsg->descriptors_per_page;
|
|
|
|
|
some kmalloc/memset ->kzalloc (tree wide)
Transform some calls to kmalloc/memset to a single kzalloc (or kcalloc).
Here is a short excerpt of the semantic patch performing
this transformation:
@@
type T2;
expression x;
identifier f,fld;
expression E;
expression E1,E2;
expression e1,e2,e3,y;
statement S;
@@
x =
- kmalloc
+ kzalloc
(E1,E2)
... when != \(x->fld=E;\|y=f(...,x,...);\|f(...,x,...);\|x=E;\|while(...) S\|for(e1;e2;e3) S\)
- memset((T2)x,0,E1);
@@
expression E1,E2,E3;
@@
- kzalloc(E1 * E2,E3)
+ kcalloc(E1,E2,E3)
[akpm@linux-foundation.org: get kcalloc args the right way around]
Signed-off-by: Yoann Padioleau <padator@wanadoo.fr>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Acked-by: Russell King <rmk@arm.linux.org.uk>
Cc: Bryan Wu <bryan.wu@analog.com>
Acked-by: Jiri Slaby <jirislaby@gmail.com>
Cc: Dave Airlie <airlied@linux.ie>
Acked-by: Roland Dreier <rolandd@cisco.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Acked-by: Dmitry Torokhov <dtor@mail.ru>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Acked-by: Pierre Ossman <drzeus-list@drzeus.cx>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: "David S. Miller" <davem@davemloft.net>
Acked-by: Greg KH <greg@kroah.com>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-19 02:49:03 -06:00
|
|
|
if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
vsg->state = dr_via_desc_pages_alloc;
|
2010-07-11 07:32:42 -06:00
|
|
|
for (i = 0; i < vsg->num_desc_pages; ++i) {
|
2007-11-04 19:50:58 -07:00
|
|
|
if (NULL == (vsg->desc_pages[i] =
|
2006-01-01 20:26:20 -07:00
|
|
|
(drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
|
|
|
|
vsg->num_desc);
|
|
|
|
return 0;
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
static void
|
2007-07-10 23:53:27 -06:00
|
|
|
via_abort_dmablit(struct drm_device *dev, int engine)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2007-07-10 23:53:27 -06:00
|
|
|
via_dmablit_engine_off(struct drm_device *dev, int engine)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
|
|
|
|
* The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
|
|
|
|
* task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
|
|
|
|
* the workqueue task takes care of processing associated with the old blit.
|
|
|
|
*/
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
void
|
2007-07-10 23:53:27 -06:00
|
|
|
via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
|
|
|
|
int cur;
|
|
|
|
int done_transfer;
|
2010-07-11 07:32:42 -06:00
|
|
|
unsigned long irqsave = 0;
|
2006-01-01 20:26:20 -07:00
|
|
|
uint32_t status = 0;
|
|
|
|
|
|
|
|
DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
|
|
|
|
engine, from_irq, (unsigned long) blitq);
|
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
if (from_irq)
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_lock(&blitq->blit_lock);
|
2010-07-11 07:32:42 -06:00
|
|
|
else
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
done_transfer = blitq->is_active &&
|
2010-07-11 07:32:42 -06:00
|
|
|
((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
|
|
|
|
done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
cur = blitq->cur;
|
|
|
|
if (done_transfer) {
|
|
|
|
|
|
|
|
blitq->blits[cur]->aborted = blitq->aborting;
|
|
|
|
blitq->done_blit_handle++;
|
2013-12-11 03:34:43 -07:00
|
|
|
wake_up(blitq->blit_queue + cur);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
cur++;
|
2007-11-04 19:50:58 -07:00
|
|
|
if (cur >= VIA_NUM_BLIT_SLOTS)
|
2006-01-01 20:26:20 -07:00
|
|
|
cur = 0;
|
|
|
|
blitq->cur = cur;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clear transfer done flag.
|
|
|
|
*/
|
|
|
|
|
|
|
|
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD);
|
|
|
|
|
|
|
|
blitq->is_active = 0;
|
|
|
|
blitq->aborting = 0;
|
2007-11-04 19:50:58 -07:00
|
|
|
schedule_work(&blitq->wq);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
} else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Abort transfer after one second.
|
|
|
|
*/
|
|
|
|
|
|
|
|
via_abort_dmablit(dev, engine);
|
|
|
|
blitq->aborting = 1;
|
2013-12-11 03:34:41 -07:00
|
|
|
blitq->end = jiffies + HZ;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
if (!blitq->is_active) {
|
|
|
|
if (blitq->num_outstanding) {
|
|
|
|
via_fire_dmablit(dev, blitq->blits[cur], engine);
|
|
|
|
blitq->is_active = 1;
|
|
|
|
blitq->cur = cur;
|
|
|
|
blitq->num_outstanding--;
|
2013-12-11 03:34:41 -07:00
|
|
|
blitq->end = jiffies + HZ;
|
2007-02-12 01:52:31 -07:00
|
|
|
if (!timer_pending(&blitq->poll_timer))
|
|
|
|
mod_timer(&blitq->poll_timer, jiffies + 1);
|
2006-01-01 20:26:20 -07:00
|
|
|
} else {
|
2010-07-11 07:32:42 -06:00
|
|
|
if (timer_pending(&blitq->poll_timer))
|
2006-01-01 20:26:20 -07:00
|
|
|
del_timer(&blitq->poll_timer);
|
|
|
|
via_dmablit_engine_off(dev, engine);
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
if (from_irq)
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_unlock(&blitq->blit_lock);
|
2010-07-11 07:32:42 -06:00
|
|
|
else
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check whether this blit is still active, performing necessary locking.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int
|
|
|
|
via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
|
|
|
|
{
|
|
|
|
unsigned long irqsave;
|
|
|
|
uint32_t slot;
|
|
|
|
int active;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allow for handle wraparounds.
|
|
|
|
*/
|
|
|
|
|
|
|
|
active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
|
|
|
|
((blitq->cur_blit_handle - handle) <= (1 << 23));
|
|
|
|
|
|
|
|
if (queue && active) {
|
2010-07-11 07:32:42 -06:00
|
|
|
slot = handle - blitq->done_blit_handle + blitq->cur - 1;
|
|
|
|
if (slot >= VIA_NUM_BLIT_SLOTS)
|
2006-01-01 20:26:20 -07:00
|
|
|
slot -= VIA_NUM_BLIT_SLOTS;
|
|
|
|
*queue = blitq->blit_queue + slot;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
|
|
|
|
|
|
|
return active;
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
/*
|
|
|
|
* Sync. Wait for at least three seconds for the blit to be performed.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int
|
2007-11-04 19:50:58 -07:00
|
|
|
via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
|
|
|
|
wait_queue_head_t *queue;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (via_dmablit_active(blitq, engine, handle, &queue)) {
|
2013-12-11 03:34:41 -07:00
|
|
|
DRM_WAIT_ON(ret, *queue, 3 * HZ,
|
2006-01-01 20:26:20 -07:00
|
|
|
!via_dmablit_active(blitq, engine, handle, NULL));
|
|
|
|
}
|
|
|
|
DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
|
|
|
|
handle, engine, ret);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A timer that regularly polls the blit engine in cases where we don't have interrupts:
|
|
|
|
* a) Broken hardware (typically those that don't have any video capture facility).
|
|
|
|
* b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
|
|
|
|
* The timer and hardware IRQ's can and do work in parallel. If the hardware has
|
|
|
|
* irqs, it will shorten the latency somewhat.
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
via_dmablit_timer(unsigned long data)
|
|
|
|
{
|
|
|
|
drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
|
2007-07-10 23:53:27 -06:00
|
|
|
struct drm_device *dev = blitq->dev;
|
2006-01-01 20:26:20 -07:00
|
|
|
int engine = (int)
|
|
|
|
(blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
|
|
|
DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
|
2006-01-01 20:26:20 -07:00
|
|
|
(unsigned long) jiffies);
|
|
|
|
|
|
|
|
via_dmablit_handler(dev, engine, 0);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
if (!timer_pending(&blitq->poll_timer)) {
|
2007-02-12 01:52:31 -07:00
|
|
|
mod_timer(&blitq->poll_timer, jiffies + 1);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
2006-08-19 01:40:50 -06:00
|
|
|
/*
|
|
|
|
* Rerun handler to delete timer if engines are off, and
|
|
|
|
* to shorten abort latency. This is a little nasty.
|
|
|
|
*/
|
|
|
|
|
|
|
|
via_dmablit_handler(dev, engine, 0);
|
|
|
|
|
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Workqueue task that frees data and mappings associated with a blit.
|
|
|
|
* Also wakes up waiting processes. Each of these tasks handles one
|
|
|
|
* blit engine only and may not be called on each interrupt.
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
static void
|
2006-11-22 07:57:56 -07:00
|
|
|
via_dmablit_workqueue(struct work_struct *work)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
2006-11-22 07:57:56 -07:00
|
|
|
drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
|
2007-07-10 23:53:27 -06:00
|
|
|
struct drm_device *dev = blitq->dev;
|
2006-01-01 20:26:20 -07:00
|
|
|
unsigned long irqsave;
|
|
|
|
drm_via_sg_info_t *cur_sg;
|
|
|
|
int cur_released;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
|
2006-01-01 20:26:20 -07:00
|
|
|
(blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
|
|
|
|
|
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
while (blitq->serviced != blitq->cur) {
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
cur_released = blitq->serviced++;
|
|
|
|
|
|
|
|
DRM_DEBUG("Releasing blit slot %d\n", cur_released);
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
|
2006-01-01 20:26:20 -07:00
|
|
|
blitq->serviced = 0;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
cur_sg = blitq->blits[cur_released];
|
|
|
|
blitq->num_free++;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2013-12-11 03:34:43 -07:00
|
|
|
wake_up(&blitq->busy_queue);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
via_free_sg_info(dev->pdev, cur_sg);
|
|
|
|
kfree(cur_sg);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Init all blit engines. Currently we use two, but some hardware have 4.
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2007-07-10 23:53:27 -06:00
|
|
|
via_init_dmablit(struct drm_device *dev)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
2010-07-11 07:32:42 -06:00
|
|
|
int i, j;
|
2006-01-01 20:26:20 -07:00
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
drm_via_blitq_t *blitq;
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
pci_set_master(dev->pdev);
|
|
|
|
|
2010-07-11 07:32:42 -06:00
|
|
|
for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
|
2006-01-01 20:26:20 -07:00
|
|
|
blitq = dev_priv->blit_queues + i;
|
|
|
|
blitq->dev = dev;
|
|
|
|
blitq->cur_blit_handle = 0;
|
|
|
|
blitq->done_blit_handle = 0;
|
|
|
|
blitq->head = 0;
|
|
|
|
blitq->cur = 0;
|
|
|
|
blitq->serviced = 0;
|
2007-07-23 02:32:01 -06:00
|
|
|
blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
|
2006-01-01 20:26:20 -07:00
|
|
|
blitq->num_outstanding = 0;
|
|
|
|
blitq->is_active = 0;
|
|
|
|
blitq->aborting = 0;
|
2006-06-27 03:53:55 -06:00
|
|
|
spin_lock_init(&blitq->blit_lock);
|
2010-07-11 07:32:42 -06:00
|
|
|
for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
|
2013-12-11 03:34:43 -07:00
|
|
|
init_waitqueue_head(blitq->blit_queue + j);
|
|
|
|
init_waitqueue_head(&blitq->busy_queue);
|
2006-11-22 07:57:56 -07:00
|
|
|
INIT_WORK(&blitq->wq, via_dmablit_workqueue);
|
2007-02-12 01:52:31 -07:00
|
|
|
setup_timer(&blitq->poll_timer, via_dmablit_timer,
|
|
|
|
(unsigned long)blitq);
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Build all info and do all mappings required for a blit.
|
|
|
|
*/
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
static int
|
2007-07-10 23:53:27 -06:00
|
|
|
via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
int draw = xfer->to_fb;
|
|
|
|
int ret = 0;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
|
2006-01-25 14:32:14 -07:00
|
|
|
vsg->bounce_buffer = NULL;
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
vsg->state = dr_via_sg_init;
|
|
|
|
|
|
|
|
if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
|
|
|
|
DRM_ERROR("Zero size bitblt.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Below check is a driver limitation, not a hardware one. We
|
|
|
|
* don't want to lock unused pages, and don't want to incoporate the
|
2007-11-04 19:50:58 -07:00
|
|
|
* extra logic of avoiding them. Make sure there are no.
|
2006-01-01 20:26:20 -07:00
|
|
|
* (Not a big limitation anyway.)
|
|
|
|
*/
|
|
|
|
|
2008-03-16 18:07:20 -06:00
|
|
|
if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
|
2006-01-01 20:26:20 -07:00
|
|
|
DRM_ERROR("Too large system memory stride. Stride: %d, "
|
|
|
|
"Length: %d\n", xfer->mem_stride, xfer->line_length);
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
2006-08-19 01:40:50 -06:00
|
|
|
if ((xfer->mem_stride == xfer->line_length) &&
|
|
|
|
(xfer->fb_stride == xfer->line_length)) {
|
|
|
|
xfer->mem_stride *= xfer->num_lines;
|
|
|
|
xfer->line_length = xfer->mem_stride;
|
|
|
|
xfer->fb_stride = xfer->mem_stride;
|
|
|
|
xfer->num_lines = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Don't lock an arbitrary large number of pages, since that causes a
|
|
|
|
* DOS security hole.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
|
|
|
|
DRM_ERROR("Too large PCI DMA bitblt.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
/*
|
2006-01-01 20:26:20 -07:00
|
|
|
* we allow a negative fb stride to allow flipping of images in
|
2007-11-04 19:50:58 -07:00
|
|
|
* transfer.
|
2006-01-01 20:26:20 -07:00
|
|
|
*/
|
|
|
|
|
|
|
|
if (xfer->mem_stride < xfer->line_length ||
|
|
|
|
abs(xfer->fb_stride) < xfer->line_length) {
|
|
|
|
DRM_ERROR("Invalid frame-buffer / memory stride.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A hardware bug seems to be worked around if system memory addresses start on
|
|
|
|
* 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
|
|
|
|
* about this. Meanwhile, impose the following restrictions:
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef VIA_BUGFREE
|
|
|
|
if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
|
2006-08-19 01:40:50 -06:00
|
|
|
((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
|
2006-01-01 20:26:20 -07:00
|
|
|
DRM_ERROR("Invalid DRM bitblt alignment.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
if ((((unsigned long)xfer->mem_addr & 15) ||
|
2006-08-19 01:40:50 -06:00
|
|
|
((unsigned long)xfer->fb_addr & 3)) ||
|
2007-11-04 19:50:58 -07:00
|
|
|
((xfer->num_lines > 1) &&
|
2006-08-19 01:40:50 -06:00
|
|
|
((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
|
2006-01-01 20:26:20 -07:00
|
|
|
DRM_ERROR("Invalid DRM bitblt alignment.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2007-11-04 19:50:58 -07:00
|
|
|
}
|
2006-01-01 20:26:20 -07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
|
|
|
|
DRM_ERROR("Could not lock DMA pages.\n");
|
|
|
|
via_free_sg_info(dev->pdev, vsg);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
|
|
|
|
if (0 != (ret = via_alloc_desc_pages(vsg))) {
|
|
|
|
DRM_ERROR("Could not allocate DMA descriptor pages.\n");
|
|
|
|
via_free_sg_info(dev->pdev, vsg);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
return 0;
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Reserve one free slot in the blit queue. Will wait for one second for one
|
|
|
|
* to become available. Otherwise -EBUSY is returned.
|
|
|
|
*/
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
static int
|
2006-01-01 20:26:20 -07:00
|
|
|
via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
|
|
|
|
{
|
2010-07-11 07:32:42 -06:00
|
|
|
int ret = 0;
|
2006-01-01 20:26:20 -07:00
|
|
|
unsigned long irqsave;
|
|
|
|
|
|
|
|
DRM_DEBUG("Num free is %d\n", blitq->num_free);
|
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
2010-07-11 07:32:42 -06:00
|
|
|
while (blitq->num_free == 0) {
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
|
|
|
|
2013-12-11 03:34:41 -07:00
|
|
|
DRM_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0);
|
2010-07-11 07:32:42 -06:00
|
|
|
if (ret)
|
2007-08-25 03:22:43 -06:00
|
|
|
return (-EINTR == ret) ? -EAGAIN : ret;
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
blitq->num_free--;
|
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Hand back a free slot if we changed our mind.
|
|
|
|
*/
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
static void
|
2006-01-01 20:26:20 -07:00
|
|
|
via_dmablit_release_slot(drm_via_blitq_t *blitq)
|
|
|
|
{
|
|
|
|
unsigned long irqsave;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
blitq->num_free++;
|
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
2013-12-11 03:34:43 -07:00
|
|
|
wake_up(&blitq->busy_queue);
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Grab a free slot. Build blit info and queue a blit.
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
static int
|
|
|
|
via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
|
|
|
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
|
|
|
|
drm_via_sg_info_t *vsg;
|
|
|
|
drm_via_blitq_t *blitq;
|
2006-08-19 01:40:50 -06:00
|
|
|
int ret;
|
2006-01-01 20:26:20 -07:00
|
|
|
int engine;
|
|
|
|
unsigned long irqsave;
|
|
|
|
|
|
|
|
if (dev_priv == NULL) {
|
|
|
|
DRM_ERROR("Called without initialization.\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
engine = (xfer->to_fb) ? 0 : 1;
|
|
|
|
blitq = dev_priv->blit_queues + engine;
|
2010-07-11 07:32:42 -06:00
|
|
|
if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
|
2006-01-01 20:26:20 -07:00
|
|
|
return ret;
|
|
|
|
if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
|
|
|
|
via_dmablit_release_slot(blitq);
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2006-01-01 20:26:20 -07:00
|
|
|
}
|
|
|
|
if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
|
|
|
|
via_dmablit_release_slot(blitq);
|
|
|
|
kfree(vsg);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
spin_lock_irqsave(&blitq->blit_lock, irqsave);
|
|
|
|
|
|
|
|
blitq->blits[blitq->head++] = vsg;
|
2007-11-04 19:50:58 -07:00
|
|
|
if (blitq->head >= VIA_NUM_BLIT_SLOTS)
|
2006-01-01 20:26:20 -07:00
|
|
|
blitq->head = 0;
|
|
|
|
blitq->num_outstanding++;
|
2007-11-04 19:50:58 -07:00
|
|
|
xfer->sync.sync_handle = ++blitq->cur_blit_handle;
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
|
|
|
|
xfer->sync.engine = engine;
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
via_dmablit_handler(dev, engine, 0);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Sync on a previously submitted blit. Note that the X server use signals extensively, and
|
2006-08-19 01:40:50 -06:00
|
|
|
* that there is a very big probability that this IOCTL will be interrupted by a signal. In that
|
2007-11-04 19:50:58 -07:00
|
|
|
* case it returns with -EAGAIN for the signal to be delivered.
|
2006-01-01 20:26:20 -07:00
|
|
|
* The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
|
|
|
|
*/
|
|
|
|
|
|
|
|
int
|
2010-07-11 07:32:42 -06:00
|
|
|
via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_via_blitsync_t *sync = data;
|
2006-01-01 20:26:20 -07:00
|
|
|
int err;
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
if (sync->engine >= VIA_NUM_BLIT_ENGINES)
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-01 20:26:20 -07:00
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
2007-08-25 03:22:43 -06:00
|
|
|
if (-EINTR == err)
|
|
|
|
err = -EAGAIN;
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
2007-11-04 19:50:58 -07:00
|
|
|
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
|
2007-11-04 19:50:58 -07:00
|
|
|
* while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
|
2006-01-01 20:26:20 -07:00
|
|
|
* be reissued. See the above IOCTL code.
|
|
|
|
*/
|
|
|
|
|
2007-11-04 19:50:58 -07:00
|
|
|
int
|
2010-07-11 07:32:42 -06:00
|
|
|
via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
|
2006-01-01 20:26:20 -07:00
|
|
|
{
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_via_dmablit_t *xfer = data;
|
2006-01-01 20:26:20 -07:00
|
|
|
int err;
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
err = via_dmablit(dev, xfer);
|
2006-01-01 20:26:20 -07:00
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|