2007-09-15 15:07:45 -06:00
|
|
|
################################################################################
|
|
|
|
|
#
|
|
|
|
|
# Intel 10 Gigabit PCI Express Linux driver
|
2012-01-05 20:24:16 -07:00
|
|
|
# Copyright(c) 1999 - 2012 Intel Corporation.
|
2007-09-15 15:07:45 -06:00
|
|
|
#
|
|
|
|
|
# This program is free software; you can redistribute it and/or modify it
|
|
|
|
|
# under the terms and conditions of the GNU General Public License,
|
|
|
|
|
# version 2, as published by the Free Software Foundation.
|
|
|
|
|
#
|
|
|
|
|
# This program is distributed in the hope it will be useful, but WITHOUT
|
|
|
|
|
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
|
|
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
|
|
|
# more details.
|
|
|
|
|
#
|
|
|
|
|
# You should have received a copy of the GNU General Public License along with
|
|
|
|
|
# this program; if not, write to the Free Software Foundation, Inc.,
|
|
|
|
|
# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
|
|
|
|
#
|
|
|
|
|
# The full GNU General Public License is included in this distribution in
|
|
|
|
|
# the file called "COPYING".
|
|
|
|
|
#
|
|
|
|
|
# Contact Information:
|
|
|
|
|
# Linux NICS <linux.nics@intel.com>
|
|
|
|
|
# e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
|
|
|
|
|
# Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
|
|
|
|
#
|
|
|
|
|
################################################################################
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# Makefile for the Intel(R) 10GbE PCI Express ethernet driver
|
|
|
|
|
#
|
|
|
|
|
|
|
|
|
|
obj-$(CONFIG_IXGBE) += ixgbe.o
|
|
|
|
|
|
|
|
|
|
ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
|
2010-01-08 19:26:07 -07:00
|
|
|
ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \
|
2012-05-16 01:06:38 -06:00
|
|
|
ixgbe_mbx.o ixgbe_x540.o ixgbe_lib.o
|
2008-11-20 21:52:10 -07:00
|
|
|
|
2009-02-27 08:45:05 -07:00
|
|
|
ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
|
|
|
|
|
ixgbe_dcb_82599.o ixgbe_dcb_nl.o
|
2009-05-13 07:11:06 -06:00
|
|
|
|
ixgbe: Hardware Timestamping + PTP Hardware Clock (PHC)
This patch enables hardware timestamping for use with PTP software by
extracting a ns counter from an arbitrary fixed point cycles counter.
The hardware generates SYSTIME registers using the DMA tick which
changes based on the current link speed. These SYSTIME registers are
converted to ns using the cyclecounter and timecounter structures
provided by the kernel. Using the SO_TIMESTAMPING api, software can
enable and access timestamps for PTP packets.
The SO_TIMESTAMPING API has space for 3 different kinds of timestamps,
SYS, RAW, and SOF. SYS hardware timestamps are hardware ns values that
are then scaled to the software clock. RAW hardware timestamps are the
direct raw value of the ns counter. SOF software timestamps are the
software timestamp calculated as close as possible to the software
transmit, but are not offloaded to the hardware. This patch only
supports the RAW hardware timestamps due to inefficiency of the SYS
design.
This patch also enables the PHC subsystem features for atomically
adjusting the cycle register, and adjusting the clock frequency in
parts per billion. This frequency adjustment works by slightly
adjusting the value added to the cycle registers each DMA tick. This
causes the hardware registers to overflow rapidly (approximately once
every 34 seconds, when at 10gig link). To solve this, the timecounter
structure is used, along with a timer set for every 25 seconds. This
allows for detecting register overflow and converting the cycle
counter registers into ns values needed for providing useful
timestamps to the network stack.
Only the basic required clock functions are supported at this time,
although the hardware supports some ancillary features and these could
easily be enabled in the future.
Note that use of this hardware timestamping requires modifying daemon
software to use the SO_TIMESTAMPING API for timestamps, and the
ptp_clock PHC framework for accessing the clock. The timestamps have
no relation to the system time at all, so software must use the posix
clock generated by the PHC framework instead.
Signed-off-by: Jacob E Keller <jacob.e.keller@intel.com>
Tested-by: Stephen Ko <stephen.s.ko@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-04-30 23:24:58 -06:00
|
|
|
ixgbe-$(CONFIG_IXGBE_PTP) += ixgbe_ptp.o
|
2012-05-16 01:06:38 -06:00
|
|
|
ixgbe-$(CONFIG_IXGBE_HWMON) += ixgbe_sysfs.o
|
2009-05-13 07:11:06 -06:00
|
|
|
ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o
|