2012-11-15 14:28:22 -07:00
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/*
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* Copyright (C) 2012 Avionic Design GmbH
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2016-12-14 04:16:11 -07:00
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* Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
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2012-11-15 14:28:22 -07:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2016-12-14 04:16:11 -07:00
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#include <linux/bitops.h>
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2013-10-14 06:43:22 -06:00
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#include <linux/host1x.h>
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2017-03-09 12:04:55 -07:00
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#include <linux/idr.h>
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2014-06-26 13:41:53 -06:00
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#include <linux/iommu.h>
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2013-10-14 06:43:22 -06:00
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2014-11-24 09:41:23 -07:00
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#include <drm/drm_atomic.h>
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2014-11-24 09:08:06 -07:00
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#include <drm/drm_atomic_helper.h>
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2012-11-15 14:28:22 -07:00
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#include "drm.h"
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2013-03-22 08:34:08 -06:00
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#include "gem.h"
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2012-11-15 14:28:22 -07:00
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#define DRIVER_NAME "tegra"
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#define DRIVER_DESC "NVIDIA Tegra graphics"
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#define DRIVER_DATE "20120330"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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2016-12-14 04:16:11 -07:00
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#define CARVEOUT_SZ SZ_64M
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2013-09-26 08:08:18 -06:00
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struct tegra_drm_file {
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2017-03-09 12:04:55 -07:00
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struct idr contexts;
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struct mutex lock;
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2013-09-26 08:08:18 -06:00
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};
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2014-11-24 09:41:23 -07:00
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static void tegra_atomic_schedule(struct tegra_drm *tegra,
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struct drm_atomic_state *state)
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{
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tegra->commit.state = state;
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schedule_work(&tegra->commit.work);
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}
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static void tegra_atomic_complete(struct tegra_drm *tegra,
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struct drm_atomic_state *state)
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{
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struct drm_device *drm = tegra->drm;
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/*
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* Everything below can be run asynchronously without the need to grab
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* any modeset locks at all under one condition: It must be guaranteed
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* that the asynchronous work has either been cancelled (if the driver
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* supports it, which at least requires that the framebuffers get
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* cleaned up with drm_atomic_helper_cleanup_planes()) or completed
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* before the new state gets committed on the software side with
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* drm_atomic_helper_swap_state().
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*
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* This scheme allows new atomic state updates to be prepared and
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* checked in parallel to the asynchronous completion of the previous
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* update. Which is important since compositors need to figure out the
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* composition of the next frame right after having submitted the
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* current layout.
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*/
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2015-02-22 04:24:19 -07:00
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drm_atomic_helper_commit_modeset_disables(drm, state);
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drm_atomic_helper_commit_modeset_enables(drm, state);
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2016-08-29 03:12:03 -06:00
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drm_atomic_helper_commit_planes(drm, state,
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DRM_PLANE_COMMIT_ACTIVE_ONLY);
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2014-11-24 09:41:23 -07:00
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drm_atomic_helper_wait_for_vblanks(drm, state);
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drm_atomic_helper_cleanup_planes(drm, state);
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2016-10-14 06:18:18 -06:00
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drm_atomic_state_put(state);
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2014-11-24 09:41:23 -07:00
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}
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static void tegra_atomic_work(struct work_struct *work)
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{
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struct tegra_drm *tegra = container_of(work, struct tegra_drm,
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commit.work);
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tegra_atomic_complete(tegra, tegra->commit.state);
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}
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static int tegra_atomic_commit(struct drm_device *drm,
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2016-04-26 08:11:42 -06:00
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struct drm_atomic_state *state, bool nonblock)
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2014-11-24 09:41:23 -07:00
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{
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struct tegra_drm *tegra = drm->dev_private;
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int err;
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err = drm_atomic_helper_prepare_planes(drm, state);
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if (err)
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return err;
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2016-04-26 08:11:42 -06:00
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/* serialize outstanding nonblocking commits */
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2014-11-24 09:41:23 -07:00
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mutex_lock(&tegra->commit.lock);
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flush_work(&tegra->commit.work);
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/*
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* This is the point of no return - everything below never fails except
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* when the hw goes bonghits. Which means we can commit the new state on
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* the software side now.
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*/
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2016-06-09 16:06:32 -06:00
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drm_atomic_helper_swap_state(state, true);
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2014-11-24 09:41:23 -07:00
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2016-10-14 06:18:18 -06:00
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drm_atomic_state_get(state);
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2016-04-26 08:11:42 -06:00
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if (nonblock)
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2014-11-24 09:41:23 -07:00
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tegra_atomic_schedule(tegra, state);
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else
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tegra_atomic_complete(tegra, state);
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mutex_unlock(&tegra->commit.lock);
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return 0;
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}
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2014-11-26 05:03:57 -07:00
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static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
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.fb_create = tegra_fb_create,
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2015-10-27 02:10:59 -06:00
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#ifdef CONFIG_DRM_FBDEV_EMULATION
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2014-11-26 05:03:57 -07:00
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.output_poll_changed = tegra_fb_output_poll_changed,
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#endif
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2014-11-24 09:08:06 -07:00
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.atomic_check = drm_atomic_helper_check,
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2014-11-24 09:41:23 -07:00
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.atomic_commit = tegra_atomic_commit,
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2014-11-26 05:03:57 -07:00
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};
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2013-10-14 06:43:22 -06:00
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static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
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2013-03-22 08:34:07 -06:00
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{
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2013-10-14 06:43:22 -06:00
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struct host1x_device *device = to_host1x_device(drm->dev);
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2013-09-24 05:22:17 -06:00
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struct tegra_drm *tegra;
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2013-03-22 08:34:07 -06:00
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int err;
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2013-10-14 06:43:22 -06:00
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tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
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2013-09-24 05:22:17 -06:00
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if (!tegra)
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2013-03-22 08:34:07 -06:00
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return -ENOMEM;
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2014-06-26 13:41:53 -06:00
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if (iommu_present(&platform_bus_type)) {
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2016-12-14 04:16:11 -07:00
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u64 carveout_start, carveout_end, gem_start, gem_end;
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2015-01-19 08:15:04 -07:00
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struct iommu_domain_geometry *geometry;
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2016-12-14 04:16:11 -07:00
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unsigned long order;
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2015-01-19 08:15:04 -07:00
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2014-06-26 13:41:53 -06:00
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tegra->domain = iommu_domain_alloc(&platform_bus_type);
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2014-12-04 04:00:35 -07:00
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if (!tegra->domain) {
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err = -ENOMEM;
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2014-06-26 13:41:53 -06:00
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goto free;
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}
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2015-01-19 08:15:04 -07:00
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geometry = &tegra->domain->geometry;
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2016-12-14 04:16:11 -07:00
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gem_start = geometry->aperture_start;
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gem_end = geometry->aperture_end - CARVEOUT_SZ;
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carveout_start = gem_end + 1;
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carveout_end = geometry->aperture_end;
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order = __ffs(tegra->domain->pgsize_bitmap);
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init_iova_domain(&tegra->carveout.domain, 1UL << order,
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carveout_start >> order,
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carveout_end >> order);
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2015-01-19 08:15:04 -07:00
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2016-12-14 04:16:11 -07:00
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tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
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tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
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drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
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2017-03-09 12:04:56 -07:00
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mutex_init(&tegra->mm_lock);
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2016-12-14 04:16:11 -07:00
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DRM_DEBUG("IOMMU apertures:\n");
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DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
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DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
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carveout_end);
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2014-06-26 13:41:53 -06:00
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}
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2013-09-24 05:22:17 -06:00
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mutex_init(&tegra->clients_lock);
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INIT_LIST_HEAD(&tegra->clients);
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2014-11-24 09:41:23 -07:00
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mutex_init(&tegra->commit.lock);
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INIT_WORK(&tegra->commit.work, tegra_atomic_work);
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2013-09-24 05:22:17 -06:00
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drm->dev_private = tegra;
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tegra->drm = drm;
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2012-11-15 14:28:22 -07:00
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drm_mode_config_init(drm);
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2014-11-26 05:03:57 -07:00
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drm->mode_config.min_width = 0;
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drm->mode_config.min_height = 0;
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drm->mode_config.max_width = 4096;
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drm->mode_config.max_height = 4096;
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2016-11-08 00:50:42 -07:00
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drm->mode_config.allow_fb_modifiers = true;
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2014-11-26 05:03:57 -07:00
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drm->mode_config.funcs = &tegra_drm_mode_funcs;
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2014-06-27 09:19:25 -06:00
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err = tegra_drm_fb_prepare(drm);
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if (err < 0)
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2014-11-06 06:12:08 -07:00
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goto config;
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2014-06-27 09:19:25 -06:00
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drm_kms_helper_poll_init(drm);
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2013-10-14 06:43:22 -06:00
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err = host1x_device_init(device);
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2012-11-15 14:28:22 -07:00
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if (err < 0)
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2014-11-06 06:12:08 -07:00
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goto fbdev;
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2012-11-15 14:28:22 -07:00
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2013-04-22 13:22:14 -06:00
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/*
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* We don't use the drm_irq_install() helpers provided by the DRM
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* core, so we need to set this manually in order to allow the
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* DRM_IOCTL_WAIT_VBLANK to operate correctly.
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*/
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2013-10-04 05:53:37 -06:00
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drm->irq_enabled = true;
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2013-04-22 13:22:14 -06:00
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2015-01-28 06:43:05 -07:00
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/* syncpoints are used for full 32-bit hardware VBLANK counters */
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drm->max_vblank_count = 0xffffffff;
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2012-11-28 03:45:47 -07:00
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err = drm_vblank_init(drm, drm->mode_config.num_crtc);
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if (err < 0)
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2014-11-06 06:12:08 -07:00
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goto device;
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2012-11-28 03:45:47 -07:00
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2015-07-02 09:04:06 -06:00
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drm_mode_config_reset(drm);
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2012-11-15 14:28:22 -07:00
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err = tegra_drm_fb_init(drm);
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if (err < 0)
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2014-11-06 06:12:08 -07:00
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goto vblank;
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2012-11-15 14:28:22 -07:00
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return 0;
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2014-11-06 06:12:08 -07:00
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vblank:
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drm_vblank_cleanup(drm);
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device:
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host1x_device_exit(device);
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fbdev:
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drm_kms_helper_poll_fini(drm);
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tegra_drm_fb_free(drm);
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config:
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drm_mode_config_cleanup(drm);
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2014-06-26 13:41:53 -06:00
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if (tegra->domain) {
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iommu_domain_free(tegra->domain);
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drm_mm_takedown(&tegra->mm);
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2017-03-09 12:04:56 -07:00
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mutex_destroy(&tegra->mm_lock);
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2016-12-14 04:16:11 -07:00
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put_iova_domain(&tegra->carveout.domain);
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2014-06-26 13:41:53 -06:00
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}
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free:
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2014-11-06 06:12:08 -07:00
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kfree(tegra);
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return err;
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2012-11-15 14:28:22 -07:00
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}
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2017-01-06 10:57:31 -07:00
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static void tegra_drm_unload(struct drm_device *drm)
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2012-11-15 14:28:22 -07:00
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{
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2013-10-14 06:43:22 -06:00
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struct host1x_device *device = to_host1x_device(drm->dev);
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2014-06-26 13:41:53 -06:00
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struct tegra_drm *tegra = drm->dev_private;
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2013-10-14 06:43:22 -06:00
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int err;
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2012-11-15 14:28:22 -07:00
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drm_kms_helper_poll_fini(drm);
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tegra_drm_fb_exit(drm);
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2013-10-14 06:06:02 -06:00
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drm_mode_config_cleanup(drm);
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2014-11-24 08:27:13 -07:00
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drm_vblank_cleanup(drm);
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2012-11-15 14:28:22 -07:00
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2013-10-14 06:43:22 -06:00
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err = host1x_device_exit(device);
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if (err < 0)
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2017-01-06 10:57:31 -07:00
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return;
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2013-10-14 06:43:22 -06:00
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2014-06-26 13:41:53 -06:00
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if (tegra->domain) {
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iommu_domain_free(tegra->domain);
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drm_mm_takedown(&tegra->mm);
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2017-03-09 12:04:56 -07:00
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mutex_destroy(&tegra->mm_lock);
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2016-12-14 04:16:11 -07:00
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put_iova_domain(&tegra->carveout.domain);
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2014-06-26 13:41:53 -06:00
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}
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2014-11-04 08:17:55 -07:00
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kfree(tegra);
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2012-11-15 14:28:22 -07:00
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}
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static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
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{
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2013-09-26 08:08:18 -06:00
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struct tegra_drm_file *fpriv;
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2013-03-22 08:34:09 -06:00
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fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
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if (!fpriv)
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return -ENOMEM;
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2017-03-09 12:04:55 -07:00
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idr_init(&fpriv->contexts);
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mutex_init(&fpriv->lock);
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2013-03-22 08:34:09 -06:00
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filp->driver_priv = fpriv;
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2012-11-15 14:28:22 -07:00
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return 0;
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}
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2013-09-26 08:08:22 -06:00
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static void tegra_drm_context_free(struct tegra_drm_context *context)
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2013-03-22 08:34:09 -06:00
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{
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context->client->ops->close_channel(context);
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kfree(context);
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}
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2012-11-15 14:28:22 -07:00
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static void tegra_drm_lastclose(struct drm_device *drm)
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{
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2015-10-27 02:10:59 -06:00
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#ifdef CONFIG_DRM_FBDEV_EMULATION
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2013-09-24 05:22:17 -06:00
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struct tegra_drm *tegra = drm->dev_private;
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2012-11-15 14:28:22 -07:00
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|
|
2013-09-24 05:22:17 -06:00
|
|
|
tegra_fbdev_restore_mode(tegra->fbdev);
|
2013-10-31 06:28:50 -06:00
|
|
|
#endif
|
2012-11-15 14:28:22 -07:00
|
|
|
}
|
|
|
|
|
2013-10-10 03:00:33 -06:00
|
|
|
static struct host1x_bo *
|
2016-05-09 04:04:54 -06:00
|
|
|
host1x_bo_lookup(struct drm_file *file, u32 handle)
|
2013-10-10 03:00:33 -06:00
|
|
|
{
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, handle);
|
2013-10-10 03:00:33 -06:00
|
|
|
if (!gem)
|
|
|
|
return NULL;
|
|
|
|
|
2015-11-23 02:32:48 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2013-10-10 03:00:33 -06:00
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
return &bo->base;
|
|
|
|
}
|
|
|
|
|
2014-06-10 02:25:00 -06:00
|
|
|
static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
|
|
|
|
struct drm_tegra_reloc __user *src,
|
|
|
|
struct drm_device *drm,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
u32 cmdbuf, target;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = get_user(cmdbuf, &src->cmdbuf.handle);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = get_user(target, &src->target.handle);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2015-01-20 19:37:35 -07:00
|
|
|
err = get_user(dest->target.offset, &src->target.offset);
|
2014-06-10 02:25:00 -06:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = get_user(dest->shift, &src->shift);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
|
2014-06-10 02:25:00 -06:00
|
|
|
if (!dest->cmdbuf.bo)
|
|
|
|
return -ENOENT;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
dest->target.bo = host1x_bo_lookup(file, target);
|
2014-06-10 02:25:00 -06:00
|
|
|
if (!dest->target.bo)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-10-10 03:00:33 -06:00
|
|
|
int tegra_drm_submit(struct tegra_drm_context *context,
|
|
|
|
struct drm_tegra_submit *args, struct drm_device *drm,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
unsigned int num_cmdbufs = args->num_cmdbufs;
|
|
|
|
unsigned int num_relocs = args->num_relocs;
|
|
|
|
unsigned int num_waitchks = args->num_waitchks;
|
|
|
|
struct drm_tegra_cmdbuf __user *cmdbufs =
|
2013-11-08 05:15:43 -07:00
|
|
|
(void __user *)(uintptr_t)args->cmdbufs;
|
2013-10-10 03:00:33 -06:00
|
|
|
struct drm_tegra_reloc __user *relocs =
|
2013-11-08 05:15:43 -07:00
|
|
|
(void __user *)(uintptr_t)args->relocs;
|
2013-10-10 03:00:33 -06:00
|
|
|
struct drm_tegra_waitchk __user *waitchks =
|
2013-11-08 05:15:43 -07:00
|
|
|
(void __user *)(uintptr_t)args->waitchks;
|
2013-10-10 03:00:33 -06:00
|
|
|
struct drm_tegra_syncpt syncpt;
|
|
|
|
struct host1x_job *job;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
/* We don't yet support other than one syncpt_incr struct per submit */
|
|
|
|
if (args->num_syncpts != 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
job = host1x_job_alloc(context->channel, args->num_cmdbufs,
|
|
|
|
args->num_relocs, args->num_waitchks);
|
|
|
|
if (!job)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
job->num_relocs = args->num_relocs;
|
|
|
|
job->num_waitchk = args->num_waitchks;
|
|
|
|
job->client = (u32)args->context;
|
|
|
|
job->class = context->client->base.class;
|
|
|
|
job->serialize = true;
|
|
|
|
|
|
|
|
while (num_cmdbufs) {
|
|
|
|
struct drm_tegra_cmdbuf cmdbuf;
|
|
|
|
struct host1x_bo *bo;
|
|
|
|
|
2013-11-08 03:07:37 -07:00
|
|
|
if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
|
|
|
|
err = -EFAULT;
|
2013-10-10 03:00:33 -06:00
|
|
|
goto fail;
|
2013-11-08 03:07:37 -07:00
|
|
|
}
|
2013-10-10 03:00:33 -06:00
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
bo = host1x_bo_lookup(file, cmdbuf.handle);
|
2013-10-10 03:00:33 -06:00
|
|
|
if (!bo) {
|
|
|
|
err = -ENOENT;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
|
|
|
|
num_cmdbufs--;
|
|
|
|
cmdbufs++;
|
|
|
|
}
|
|
|
|
|
2014-06-10 02:25:00 -06:00
|
|
|
/* copy and resolve relocations from submit */
|
2013-10-10 03:00:33 -06:00
|
|
|
while (num_relocs--) {
|
2014-06-10 02:25:00 -06:00
|
|
|
err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
|
|
|
|
&relocs[num_relocs], drm,
|
|
|
|
file);
|
|
|
|
if (err < 0)
|
2013-10-10 03:00:33 -06:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2013-11-08 03:07:37 -07:00
|
|
|
if (copy_from_user(job->waitchk, waitchks,
|
|
|
|
sizeof(*waitchks) * num_waitchks)) {
|
|
|
|
err = -EFAULT;
|
2013-10-10 03:00:33 -06:00
|
|
|
goto fail;
|
2013-11-08 03:07:37 -07:00
|
|
|
}
|
2013-10-10 03:00:33 -06:00
|
|
|
|
2013-11-08 03:07:37 -07:00
|
|
|
if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
|
|
|
|
sizeof(syncpt))) {
|
|
|
|
err = -EFAULT;
|
2013-10-10 03:00:33 -06:00
|
|
|
goto fail;
|
2013-11-08 03:07:37 -07:00
|
|
|
}
|
2013-10-10 03:00:33 -06:00
|
|
|
|
|
|
|
job->is_addr_reg = context->client->ops->is_addr_reg;
|
|
|
|
job->syncpt_incrs = syncpt.incrs;
|
|
|
|
job->syncpt_id = syncpt.id;
|
|
|
|
job->timeout = 10000;
|
|
|
|
|
|
|
|
if (args->timeout && args->timeout < 10000)
|
|
|
|
job->timeout = args->timeout;
|
|
|
|
|
|
|
|
err = host1x_job_pin(job, context->client->base.dev);
|
|
|
|
if (err)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
err = host1x_job_submit(job);
|
|
|
|
if (err)
|
|
|
|
goto fail_submit;
|
|
|
|
|
|
|
|
args->fence = job->syncpt_end;
|
|
|
|
|
|
|
|
host1x_job_put(job);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail_submit:
|
|
|
|
host1x_job_unpin(job);
|
|
|
|
fail:
|
|
|
|
host1x_job_put(job);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2013-03-22 08:34:09 -06:00
|
|
|
#ifdef CONFIG_DRM_TEGRA_STAGING
|
2017-03-09 12:04:55 -07:00
|
|
|
static struct tegra_drm_context *
|
|
|
|
tegra_drm_file_get_context(struct tegra_drm_file *file, u32 id)
|
2013-03-22 08:34:09 -06:00
|
|
|
{
|
2017-03-09 12:04:55 -07:00
|
|
|
struct tegra_drm_context *context;
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&file->lock);
|
|
|
|
context = idr_find(&file->contexts, id);
|
|
|
|
mutex_unlock(&file->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
return context;
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_gem_create(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_create *args = data;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
2013-10-04 14:34:01 -06:00
|
|
|
bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
|
2013-03-22 08:34:09 -06:00
|
|
|
&args->handle);
|
|
|
|
if (IS_ERR(bo))
|
|
|
|
return PTR_ERR(bo);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_gem_mmap(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_mmap *args = data;
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
2013-03-22 08:34:09 -06:00
|
|
|
if (!gem)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
|
2013-08-13 06:19:58 -06:00
|
|
|
args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2015-11-23 02:32:40 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_syncpt_read(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x *host = dev_get_drvdata(drm->dev->parent);
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_syncpt_read *args = data;
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x_syncpt *sp;
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
sp = host1x_syncpt_get(host, args->id);
|
2013-03-22 08:34:09 -06:00
|
|
|
if (!sp)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
args->value = host1x_syncpt_read_min(sp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_syncpt_incr(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_syncpt_incr *args = data;
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x_syncpt *sp;
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
sp = host1x_syncpt_get(host1x, args->id);
|
2013-03-22 08:34:09 -06:00
|
|
|
if (!sp)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2013-05-29 04:26:08 -06:00
|
|
|
return host1x_syncpt_incr(sp);
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_syncpt_wait(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_syncpt_wait *args = data;
|
2013-10-14 06:43:22 -06:00
|
|
|
struct host1x_syncpt *sp;
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
sp = host1x_syncpt_get(host1x, args->id);
|
2013-03-22 08:34:09 -06:00
|
|
|
if (!sp)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return host1x_syncpt_wait(sp, args->thresh, args->timeout,
|
|
|
|
&args->value);
|
|
|
|
}
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
static int tegra_client_open(struct tegra_drm_file *fpriv,
|
|
|
|
struct tegra_drm_client *client,
|
|
|
|
struct tegra_drm_context *context)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = client->ops->open_channel(client, context);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = idr_alloc(&fpriv->contexts, context, 0, 0, GFP_KERNEL);
|
|
|
|
if (err < 0) {
|
|
|
|
client->ops->close_channel(context);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
context->client = client;
|
|
|
|
context->id = err;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-03-22 08:34:09 -06:00
|
|
|
static int tegra_open_channel(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-09-26 08:08:18 -06:00
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
2013-09-24 05:22:17 -06:00
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_open_channel *args = data;
|
2013-09-26 08:08:22 -06:00
|
|
|
struct tegra_drm_context *context;
|
2013-09-24 07:35:40 -06:00
|
|
|
struct tegra_drm_client *client;
|
2013-03-22 08:34:09 -06:00
|
|
|
int err = -ENODEV;
|
|
|
|
|
|
|
|
context = kzalloc(sizeof(*context), GFP_KERNEL);
|
|
|
|
if (!context)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
list_for_each_entry(client, &tegra->clients, list)
|
2013-09-24 07:35:40 -06:00
|
|
|
if (client->base.class == args->client) {
|
2017-03-09 12:04:55 -07:00
|
|
|
err = tegra_client_open(fpriv, client, context);
|
|
|
|
if (err < 0)
|
2013-03-22 08:34:09 -06:00
|
|
|
break;
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
args->context = context->id;
|
|
|
|
break;
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
if (err < 0)
|
|
|
|
kfree(context);
|
|
|
|
|
|
|
|
mutex_unlock(&fpriv->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_close_channel(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-09-26 08:08:18 -06:00
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
2013-10-14 06:43:22 -06:00
|
|
|
struct drm_tegra_close_channel *args = data;
|
2013-09-26 08:08:22 -06:00
|
|
|
struct tegra_drm_context *context;
|
2017-03-09 12:04:55 -07:00
|
|
|
int err = 0;
|
2013-09-26 08:08:22 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
context = tegra_drm_file_get_context(fpriv, args->context);
|
|
|
|
if (!context) {
|
|
|
|
err = -EINVAL;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
idr_remove(&fpriv->contexts, context->id);
|
2013-09-26 08:08:22 -06:00
|
|
|
tegra_drm_context_free(context);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
unlock:
|
|
|
|
mutex_unlock(&fpriv->lock);
|
|
|
|
return err;
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_get_syncpt(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-09-26 08:08:18 -06:00
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_get_syncpt *args = data;
|
2013-09-26 08:08:22 -06:00
|
|
|
struct tegra_drm_context *context;
|
2013-03-22 08:34:09 -06:00
|
|
|
struct host1x_syncpt *syncpt;
|
2017-03-09 12:04:55 -07:00
|
|
|
int err = 0;
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
2013-09-26 08:08:22 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
context = tegra_drm_file_get_context(fpriv, args->context);
|
|
|
|
if (!context) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
if (args->index >= context->client->base.num_syncpts) {
|
|
|
|
err = -EINVAL;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2013-09-24 07:35:40 -06:00
|
|
|
syncpt = context->client->base.syncpts[args->index];
|
2013-03-22 08:34:09 -06:00
|
|
|
args->id = host1x_syncpt_id(syncpt);
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
unlock:
|
|
|
|
mutex_unlock(&fpriv->lock);
|
|
|
|
return err;
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_submit(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
2013-09-26 08:08:18 -06:00
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
2013-03-22 08:34:09 -06:00
|
|
|
struct drm_tegra_submit *args = data;
|
2013-09-26 08:08:22 -06:00
|
|
|
struct tegra_drm_context *context;
|
2017-03-09 12:04:55 -07:00
|
|
|
int err;
|
2013-09-26 08:08:22 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
context = tegra_drm_file_get_context(fpriv, args->context);
|
|
|
|
if (!context) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
err = context->client->ops->submit(context, args, drm, file);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
unlock:
|
|
|
|
mutex_unlock(&fpriv->lock);
|
|
|
|
return err;
|
2013-03-22 08:34:09 -06:00
|
|
|
}
|
2013-10-14 06:21:54 -06:00
|
|
|
|
|
|
|
static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
|
|
struct drm_tegra_get_syncpt_base *args = data;
|
|
|
|
struct tegra_drm_context *context;
|
|
|
|
struct host1x_syncpt_base *base;
|
|
|
|
struct host1x_syncpt *syncpt;
|
2017-03-09 12:04:55 -07:00
|
|
|
int err = 0;
|
2013-10-14 06:21:54 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
2013-10-14 06:21:54 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
context = tegra_drm_file_get_context(fpriv, args->context);
|
|
|
|
if (!context) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-10-14 06:21:54 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
if (args->syncpt >= context->client->base.num_syncpts) {
|
|
|
|
err = -EINVAL;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-10-14 06:21:54 -06:00
|
|
|
|
|
|
|
syncpt = context->client->base.syncpts[args->syncpt];
|
|
|
|
|
|
|
|
base = host1x_syncpt_get_base(syncpt);
|
2017-03-09 12:04:55 -07:00
|
|
|
if (!base) {
|
|
|
|
err = -ENXIO;
|
|
|
|
goto unlock;
|
|
|
|
}
|
2013-10-14 06:21:54 -06:00
|
|
|
|
|
|
|
args->id = host1x_syncpt_base_id(base);
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
unlock:
|
|
|
|
mutex_unlock(&fpriv->lock);
|
|
|
|
return err;
|
2013-10-14 06:21:54 -06:00
|
|
|
}
|
2014-06-03 06:56:57 -06:00
|
|
|
|
|
|
|
static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_set_tiling *args = data;
|
|
|
|
enum tegra_bo_tiling_mode mode;
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
unsigned long value = 0;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
|
|
|
switch (args->mode) {
|
|
|
|
case DRM_TEGRA_GEM_TILING_MODE_PITCH:
|
|
|
|
mode = TEGRA_BO_TILING_MODE_PITCH;
|
|
|
|
|
|
|
|
if (args->value != 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case DRM_TEGRA_GEM_TILING_MODE_TILED:
|
|
|
|
mode = TEGRA_BO_TILING_MODE_TILED;
|
|
|
|
|
|
|
|
if (args->value != 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
|
|
|
|
mode = TEGRA_BO_TILING_MODE_BLOCK;
|
|
|
|
|
|
|
|
if (args->value > 5)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
value = args->value;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
2014-06-03 06:56:57 -06:00
|
|
|
if (!gem)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
|
|
|
|
bo->tiling.mode = mode;
|
|
|
|
bo->tiling.value = value;
|
|
|
|
|
2015-11-23 02:32:40 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2014-06-03 06:56:57 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_get_tiling *args = data;
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
int err = 0;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
2014-06-03 06:56:57 -06:00
|
|
|
if (!gem)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
|
|
|
|
switch (bo->tiling.mode) {
|
|
|
|
case TEGRA_BO_TILING_MODE_PITCH:
|
|
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
|
|
|
|
args->value = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TEGRA_BO_TILING_MODE_TILED:
|
|
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
|
|
|
|
args->value = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TEGRA_BO_TILING_MODE_BLOCK:
|
|
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
|
|
|
|
args->value = bo->tiling.value;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
err = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-11-23 02:32:40 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2014-06-03 06:56:57 -06:00
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
2014-06-10 04:04:03 -06:00
|
|
|
|
|
|
|
static int tegra_gem_set_flags(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_set_flags *args = data;
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
|
|
|
if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
2014-06-10 04:04:03 -06:00
|
|
|
if (!gem)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
bo->flags = 0;
|
|
|
|
|
|
|
|
if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
|
|
|
|
bo->flags |= TEGRA_BO_BOTTOM_UP;
|
|
|
|
|
2015-11-23 02:32:40 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2014-06-10 04:04:03 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tegra_gem_get_flags(struct drm_device *drm, void *data,
|
|
|
|
struct drm_file *file)
|
|
|
|
{
|
|
|
|
struct drm_tegra_gem_get_flags *args = data;
|
|
|
|
struct drm_gem_object *gem;
|
|
|
|
struct tegra_bo *bo;
|
|
|
|
|
2016-05-09 04:04:54 -06:00
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
2014-06-10 04:04:03 -06:00
|
|
|
if (!gem)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
args->flags = 0;
|
|
|
|
|
|
|
|
if (bo->flags & TEGRA_BO_BOTTOM_UP)
|
|
|
|
args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
|
|
|
|
|
2015-11-23 02:32:40 -07:00
|
|
|
drm_gem_object_unreference_unlocked(gem);
|
2014-06-10 04:04:03 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2013-03-22 08:34:09 -06:00
|
|
|
#endif
|
|
|
|
|
2013-08-02 11:27:49 -06:00
|
|
|
static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
|
2013-03-22 08:34:09 -06:00
|
|
|
#ifdef CONFIG_DRM_TEGRA_STAGING
|
2015-09-08 05:56:30 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
|
|
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
|
2013-03-22 08:34:09 -06:00
|
|
|
#endif
|
2012-11-15 14:28:22 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct file_operations tegra_drm_fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = drm_open,
|
|
|
|
.release = drm_release,
|
|
|
|
.unlocked_ioctl = drm_ioctl,
|
2013-03-22 08:34:08 -06:00
|
|
|
.mmap = tegra_drm_mmap,
|
2012-11-15 14:28:22 -07:00
|
|
|
.poll = drm_poll,
|
|
|
|
.read = drm_read,
|
|
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
|
|
.llseek = noop_llseek,
|
|
|
|
};
|
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
static int tegra_drm_context_cleanup(int id, void *p, void *data)
|
|
|
|
{
|
|
|
|
struct tegra_drm_context *context = p;
|
|
|
|
|
|
|
|
tegra_drm_context_free(context);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-05-08 02:26:31 -06:00
|
|
|
static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
|
2012-11-28 04:00:18 -07:00
|
|
|
{
|
2013-09-26 08:08:18 -06:00
|
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
2012-11-28 04:00:18 -07:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
|
|
|
|
mutex_unlock(&fpriv->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
|
2017-03-09 12:04:55 -07:00
|
|
|
idr_destroy(&fpriv->contexts);
|
|
|
|
mutex_destroy(&fpriv->lock);
|
2013-03-22 08:34:09 -06:00
|
|
|
kfree(fpriv);
|
2012-11-28 04:00:18 -07:00
|
|
|
}
|
|
|
|
|
2013-02-13 08:13:16 -07:00
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *)s->private;
|
|
|
|
struct drm_device *drm = node->minor->dev;
|
|
|
|
struct drm_framebuffer *fb;
|
|
|
|
|
|
|
|
mutex_lock(&drm->mode_config.fb_lock);
|
|
|
|
|
|
|
|
list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
|
|
|
|
seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
|
2016-12-14 14:31:35 -07:00
|
|
|
fb->base.id, fb->width, fb->height,
|
|
|
|
fb->format->depth,
|
2016-12-14 14:32:20 -07:00
|
|
|
fb->format->cpp[0] * 8,
|
2016-04-14 23:10:35 -06:00
|
|
|
drm_framebuffer_read_refcount(fb));
|
2013-02-13 08:13:16 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&drm->mode_config.fb_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-23 01:16:03 -07:00
|
|
|
static int tegra_debugfs_iova(struct seq_file *s, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *)s->private;
|
|
|
|
struct drm_device *drm = node->minor->dev;
|
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2016-12-29 04:09:24 -07:00
|
|
|
struct drm_printer p = drm_seq_file_printer(s);
|
2015-01-23 01:16:03 -07:00
|
|
|
|
2017-03-09 12:04:56 -07:00
|
|
|
mutex_lock(&tegra->mm_lock);
|
2016-12-29 04:09:24 -07:00
|
|
|
drm_mm_print(&tegra->mm, &p);
|
2017-03-09 12:04:56 -07:00
|
|
|
mutex_unlock(&tegra->mm_lock);
|
2016-12-29 04:09:24 -07:00
|
|
|
|
|
|
|
return 0;
|
2015-01-23 01:16:03 -07:00
|
|
|
}
|
|
|
|
|
2013-02-13 08:13:16 -07:00
|
|
|
static struct drm_info_list tegra_debugfs_list[] = {
|
|
|
|
{ "framebuffers", tegra_debugfs_framebuffers, 0 },
|
2015-01-23 01:16:03 -07:00
|
|
|
{ "iova", tegra_debugfs_iova, 0 },
|
2013-02-13 08:13:16 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
static int tegra_debugfs_init(struct drm_minor *minor)
|
|
|
|
{
|
|
|
|
return drm_debugfs_create_files(tegra_debugfs_list,
|
|
|
|
ARRAY_SIZE(tegra_debugfs_list),
|
|
|
|
minor->debugfs_root, minor);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2013-11-08 05:17:14 -07:00
|
|
|
static struct drm_driver tegra_drm_driver = {
|
2015-09-24 10:38:09 -06:00
|
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
|
|
|
|
DRIVER_ATOMIC,
|
2012-11-15 14:28:22 -07:00
|
|
|
.load = tegra_drm_load,
|
|
|
|
.unload = tegra_drm_unload,
|
|
|
|
.open = tegra_drm_open,
|
2017-05-08 02:26:31 -06:00
|
|
|
.postclose = tegra_drm_postclose,
|
2012-11-15 14:28:22 -07:00
|
|
|
.lastclose = tegra_drm_lastclose,
|
|
|
|
|
2013-02-13 08:13:16 -07:00
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
.debugfs_init = tegra_debugfs_init,
|
|
|
|
#endif
|
|
|
|
|
2016-04-26 11:30:00 -06:00
|
|
|
.gem_free_object_unlocked = tegra_bo_free_object,
|
2013-03-22 08:34:08 -06:00
|
|
|
.gem_vm_ops = &tegra_bo_vm_ops,
|
2013-12-12 02:00:43 -07:00
|
|
|
|
|
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
|
|
.gem_prime_export = tegra_gem_prime_export,
|
|
|
|
.gem_prime_import = tegra_gem_prime_import,
|
|
|
|
|
2013-03-22 08:34:08 -06:00
|
|
|
.dumb_create = tegra_bo_dumb_create,
|
|
|
|
.dumb_map_offset = tegra_bo_dumb_map_offset,
|
2013-07-16 01:12:04 -06:00
|
|
|
.dumb_destroy = drm_gem_dumb_destroy,
|
2012-11-15 14:28:22 -07:00
|
|
|
|
|
|
|
.ioctls = tegra_drm_ioctls,
|
|
|
|
.num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
|
|
|
|
.fops = &tegra_drm_fops,
|
|
|
|
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.desc = DRIVER_DESC,
|
|
|
|
.date = DRIVER_DATE,
|
|
|
|
.major = DRIVER_MAJOR,
|
|
|
|
.minor = DRIVER_MINOR,
|
|
|
|
.patchlevel = DRIVER_PATCHLEVEL,
|
|
|
|
};
|
2013-10-14 06:43:22 -06:00
|
|
|
|
|
|
|
int tegra_drm_register_client(struct tegra_drm *tegra,
|
|
|
|
struct tegra_drm_client *client)
|
|
|
|
{
|
|
|
|
mutex_lock(&tegra->clients_lock);
|
|
|
|
list_add_tail(&client->list, &tegra->clients);
|
|
|
|
mutex_unlock(&tegra->clients_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int tegra_drm_unregister_client(struct tegra_drm *tegra,
|
|
|
|
struct tegra_drm_client *client)
|
|
|
|
{
|
|
|
|
mutex_lock(&tegra->clients_lock);
|
|
|
|
list_del_init(&client->list);
|
|
|
|
mutex_unlock(&tegra->clients_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-12-14 04:16:11 -07:00
|
|
|
void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size,
|
|
|
|
dma_addr_t *dma)
|
|
|
|
{
|
|
|
|
struct iova *alloc;
|
|
|
|
void *virt;
|
|
|
|
gfp_t gfp;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (tegra->domain)
|
|
|
|
size = iova_align(&tegra->carveout.domain, size);
|
|
|
|
else
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
|
|
|
|
gfp = GFP_KERNEL | __GFP_ZERO;
|
|
|
|
if (!tegra->domain) {
|
|
|
|
/*
|
|
|
|
* Many units only support 32-bit addresses, even on 64-bit
|
|
|
|
* SoCs. If there is no IOMMU to translate into a 32-bit IO
|
|
|
|
* virtual address space, force allocations to be in the
|
|
|
|
* lower 32-bit range.
|
|
|
|
*/
|
|
|
|
gfp |= GFP_DMA;
|
|
|
|
}
|
|
|
|
|
|
|
|
virt = (void *)__get_free_pages(gfp, get_order(size));
|
|
|
|
if (!virt)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
if (!tegra->domain) {
|
|
|
|
/*
|
|
|
|
* If IOMMU is disabled, devices address physical memory
|
|
|
|
* directly.
|
|
|
|
*/
|
|
|
|
*dma = virt_to_phys(virt);
|
|
|
|
return virt;
|
|
|
|
}
|
|
|
|
|
|
|
|
alloc = alloc_iova(&tegra->carveout.domain,
|
|
|
|
size >> tegra->carveout.shift,
|
|
|
|
tegra->carveout.limit, true);
|
|
|
|
if (!alloc) {
|
|
|
|
err = -EBUSY;
|
|
|
|
goto free_pages;
|
|
|
|
}
|
|
|
|
|
|
|
|
*dma = iova_dma_addr(&tegra->carveout.domain, alloc);
|
|
|
|
err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
|
|
|
|
size, IOMMU_READ | IOMMU_WRITE);
|
|
|
|
if (err < 0)
|
|
|
|
goto free_iova;
|
|
|
|
|
|
|
|
return virt;
|
|
|
|
|
|
|
|
free_iova:
|
|
|
|
__free_iova(&tegra->carveout.domain, alloc);
|
|
|
|
free_pages:
|
|
|
|
free_pages((unsigned long)virt, get_order(size));
|
|
|
|
|
|
|
|
return ERR_PTR(err);
|
|
|
|
}
|
|
|
|
|
|
|
|
void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
|
|
|
|
dma_addr_t dma)
|
|
|
|
{
|
|
|
|
if (tegra->domain)
|
|
|
|
size = iova_align(&tegra->carveout.domain, size);
|
|
|
|
else
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
|
|
|
|
if (tegra->domain) {
|
|
|
|
iommu_unmap(tegra->domain, dma, size);
|
|
|
|
free_iova(&tegra->carveout.domain,
|
|
|
|
iova_pfn(&tegra->carveout.domain, dma));
|
|
|
|
}
|
|
|
|
|
|
|
|
free_pages((unsigned long)virt, get_order(size));
|
|
|
|
}
|
|
|
|
|
2014-05-22 01:57:15 -06:00
|
|
|
static int host1x_drm_probe(struct host1x_device *dev)
|
2013-10-14 06:43:22 -06:00
|
|
|
{
|
2014-05-22 01:57:15 -06:00
|
|
|
struct drm_driver *driver = &tegra_drm_driver;
|
|
|
|
struct drm_device *drm;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
drm = drm_dev_alloc(driver, &dev->dev);
|
2016-09-21 08:59:19 -06:00
|
|
|
if (IS_ERR(drm))
|
|
|
|
return PTR_ERR(drm);
|
2014-05-22 01:57:15 -06:00
|
|
|
|
|
|
|
dev_set_drvdata(&dev->dev, drm);
|
|
|
|
|
|
|
|
err = drm_dev_register(drm, 0);
|
|
|
|
if (err < 0)
|
|
|
|
goto unref;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
unref:
|
|
|
|
drm_dev_unref(drm);
|
|
|
|
return err;
|
2013-10-14 06:43:22 -06:00
|
|
|
}
|
|
|
|
|
2014-05-22 01:57:15 -06:00
|
|
|
static int host1x_drm_remove(struct host1x_device *dev)
|
2013-10-14 06:43:22 -06:00
|
|
|
{
|
2014-05-22 01:57:15 -06:00
|
|
|
struct drm_device *drm = dev_get_drvdata(&dev->dev);
|
|
|
|
|
|
|
|
drm_dev_unregister(drm);
|
|
|
|
drm_dev_unref(drm);
|
2013-10-14 06:43:22 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-12-18 09:15:25 -07:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int host1x_drm_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
2015-08-11 05:11:49 -06:00
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2014-12-18 09:15:25 -07:00
|
|
|
|
|
|
|
drm_kms_helper_poll_disable(drm);
|
2015-08-11 05:11:49 -06:00
|
|
|
tegra_drm_fb_suspend(drm);
|
|
|
|
|
|
|
|
tegra->state = drm_atomic_helper_suspend(drm);
|
|
|
|
if (IS_ERR(tegra->state)) {
|
|
|
|
tegra_drm_fb_resume(drm);
|
|
|
|
drm_kms_helper_poll_enable(drm);
|
|
|
|
return PTR_ERR(tegra->state);
|
|
|
|
}
|
2014-12-18 09:15:25 -07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int host1x_drm_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
2015-08-11 05:11:49 -06:00
|
|
|
struct tegra_drm *tegra = drm->dev_private;
|
2014-12-18 09:15:25 -07:00
|
|
|
|
2015-08-11 05:11:49 -06:00
|
|
|
drm_atomic_helper_resume(drm, tegra->state);
|
|
|
|
tegra_drm_fb_resume(drm);
|
2014-12-18 09:15:25 -07:00
|
|
|
drm_kms_helper_poll_enable(drm);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-08-11 05:22:44 -06:00
|
|
|
static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
|
|
|
|
host1x_drm_resume);
|
2014-12-18 09:15:25 -07:00
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
static const struct of_device_id host1x_drm_subdevs[] = {
|
|
|
|
{ .compatible = "nvidia,tegra20-dc", },
|
|
|
|
{ .compatible = "nvidia,tegra20-hdmi", },
|
|
|
|
{ .compatible = "nvidia,tegra20-gr2d", },
|
2013-02-28 00:08:01 -07:00
|
|
|
{ .compatible = "nvidia,tegra20-gr3d", },
|
2013-10-14 06:43:22 -06:00
|
|
|
{ .compatible = "nvidia,tegra30-dc", },
|
|
|
|
{ .compatible = "nvidia,tegra30-hdmi", },
|
|
|
|
{ .compatible = "nvidia,tegra30-gr2d", },
|
2013-02-28 00:08:01 -07:00
|
|
|
{ .compatible = "nvidia,tegra30-gr3d", },
|
2013-09-03 00:45:46 -06:00
|
|
|
{ .compatible = "nvidia,tegra114-dsi", },
|
2013-09-30 08:54:47 -06:00
|
|
|
{ .compatible = "nvidia,tegra114-hdmi", },
|
2013-02-28 00:08:01 -07:00
|
|
|
{ .compatible = "nvidia,tegra114-gr3d", },
|
2013-12-12 03:03:59 -07:00
|
|
|
{ .compatible = "nvidia,tegra124-dc", },
|
2013-11-15 08:06:05 -07:00
|
|
|
{ .compatible = "nvidia,tegra124-sor", },
|
2013-11-15 08:07:32 -07:00
|
|
|
{ .compatible = "nvidia,tegra124-hdmi", },
|
2015-04-10 03:35:21 -06:00
|
|
|
{ .compatible = "nvidia,tegra124-dsi", },
|
2016-12-14 04:16:13 -07:00
|
|
|
{ .compatible = "nvidia,tegra124-vic", },
|
2015-04-10 03:35:21 -06:00
|
|
|
{ .compatible = "nvidia,tegra132-dsi", },
|
2015-03-27 03:31:58 -06:00
|
|
|
{ .compatible = "nvidia,tegra210-dc", },
|
2015-04-08 08:56:22 -06:00
|
|
|
{ .compatible = "nvidia,tegra210-dsi", },
|
2015-07-30 02:32:46 -06:00
|
|
|
{ .compatible = "nvidia,tegra210-sor", },
|
2015-07-30 02:34:24 -06:00
|
|
|
{ .compatible = "nvidia,tegra210-sor1", },
|
2016-12-14 04:16:13 -07:00
|
|
|
{ .compatible = "nvidia,tegra210-vic", },
|
2013-10-14 06:43:22 -06:00
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct host1x_driver host1x_drm_driver = {
|
2014-12-18 07:29:14 -07:00
|
|
|
.driver = {
|
|
|
|
.name = "drm",
|
2014-12-18 09:15:25 -07:00
|
|
|
.pm = &host1x_drm_pm_ops,
|
2014-12-18 07:29:14 -07:00
|
|
|
},
|
2013-10-14 06:43:22 -06:00
|
|
|
.probe = host1x_drm_probe,
|
|
|
|
.remove = host1x_drm_remove,
|
|
|
|
.subdevs = host1x_drm_subdevs,
|
|
|
|
};
|
|
|
|
|
2015-09-10 08:07:14 -06:00
|
|
|
static struct platform_driver * const drivers[] = {
|
|
|
|
&tegra_dc_driver,
|
|
|
|
&tegra_hdmi_driver,
|
|
|
|
&tegra_dsi_driver,
|
|
|
|
&tegra_dpaux_driver,
|
|
|
|
&tegra_sor_driver,
|
|
|
|
&tegra_gr2d_driver,
|
|
|
|
&tegra_gr3d_driver,
|
2016-12-14 04:16:13 -07:00
|
|
|
&tegra_vic_driver,
|
2015-09-10 08:07:14 -06:00
|
|
|
};
|
|
|
|
|
2013-10-14 06:43:22 -06:00
|
|
|
static int __init host1x_drm_init(void)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = host1x_driver_register(&host1x_drm_driver);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2015-09-10 08:07:14 -06:00
|
|
|
err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
|
2013-10-14 06:43:22 -06:00
|
|
|
if (err < 0)
|
|
|
|
goto unregister_host1x;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
unregister_host1x:
|
|
|
|
host1x_driver_unregister(&host1x_drm_driver);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
module_init(host1x_drm_init);
|
|
|
|
|
|
|
|
static void __exit host1x_drm_exit(void)
|
|
|
|
{
|
2015-09-10 08:07:14 -06:00
|
|
|
platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
|
2013-10-14 06:43:22 -06:00
|
|
|
host1x_driver_unregister(&host1x_drm_driver);
|
|
|
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}
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module_exit(host1x_drm_exit);
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MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
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|
MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
|
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|
|
MODULE_LICENSE("GPL v2");
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