2005-04-16 16:20:36 -06:00
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/*
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* Procfs interface for the PCI bus.
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*
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* Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/module.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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2007-07-16 00:40:39 -06:00
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#include <linux/capability.h>
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2016-12-24 12:46:01 -07:00
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#include <linux/uaccess.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/byteorder.h>
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2005-04-07 23:53:31 -06:00
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#include "pci.h"
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2005-04-16 16:20:36 -06:00
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static int proc_initialized; /* = 0 */
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2014-04-18 18:13:49 -06:00
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static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
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2005-04-16 16:20:36 -06:00
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{
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2013-06-23 02:29:00 -06:00
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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return fixed_size_llseek(file, off, whence, dev->cfg_size);
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2005-04-16 16:20:36 -06:00
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}
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2014-04-18 18:13:49 -06:00
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static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
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size_t nbytes, loff_t *ppos)
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2005-04-16 16:20:36 -06:00
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{
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2013-03-31 16:16:14 -06:00
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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2005-04-16 16:20:36 -06:00
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unsigned int pos = *ppos;
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unsigned int cnt, size;
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/*
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* Normal users can read only the standardized portion of the
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* configuration space as several chips lock up when trying to read
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* undefined locations (think of Intel PIIX4 as a typical example).
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*/
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if (capable(CAP_SYS_ADMIN))
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2013-03-31 16:16:14 -06:00
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size = dev->cfg_size;
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2005-04-16 16:20:36 -06:00
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else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
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size = 128;
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else
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size = 64;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(VERIFY_WRITE, buf, cnt))
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return -EINVAL;
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2012-10-24 19:36:03 -06:00
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pci_config_pm_runtime_get(dev);
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2005-04-16 16:20:36 -06:00
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if ((pos & 1) && cnt) {
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unsigned char val;
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2005-09-27 02:21:55 -06:00
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pci_user_read_config_byte(dev, pos, &val);
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2005-04-16 16:20:36 -06:00
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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2005-09-27 02:21:55 -06:00
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pci_user_read_config_word(dev, pos, &val);
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2008-07-22 15:40:47 -06:00
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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2005-04-16 16:20:36 -06:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
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unsigned int val;
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2005-09-27 02:21:55 -06:00
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pci_user_read_config_dword(dev, pos, &val);
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2008-07-22 15:40:47 -06:00
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__put_user(cpu_to_le32(val), (__le32 __user *) buf);
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2005-04-16 16:20:36 -06:00
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
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unsigned short val;
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2005-09-27 02:21:55 -06:00
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pci_user_read_config_word(dev, pos, &val);
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2008-07-22 15:40:47 -06:00
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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2005-04-16 16:20:36 -06:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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2005-09-27 02:21:55 -06:00
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pci_user_read_config_byte(dev, pos, &val);
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2005-04-16 16:20:36 -06:00
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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2012-10-24 19:36:03 -06:00
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pci_config_pm_runtime_put(dev);
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2005-04-16 16:20:36 -06:00
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*ppos = pos;
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return nbytes;
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}
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2014-04-18 18:13:49 -06:00
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static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
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size_t nbytes, loff_t *ppos)
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2005-04-16 16:20:36 -06:00
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{
|
2013-01-23 15:07:38 -07:00
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struct inode *ino = file_inode(file);
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2013-03-31 16:16:14 -06:00
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struct pci_dev *dev = PDE_DATA(ino);
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2005-04-16 16:20:36 -06:00
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int pos = *ppos;
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2013-03-31 16:16:14 -06:00
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int size = dev->cfg_size;
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2005-04-16 16:20:36 -06:00
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int cnt;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(VERIFY_READ, buf, cnt))
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return -EINVAL;
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2012-10-24 19:36:03 -06:00
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pci_config_pm_runtime_get(dev);
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2005-04-16 16:20:36 -06:00
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if ((pos & 1) && cnt) {
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unsigned char val;
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__get_user(val, buf);
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2005-09-27 02:21:55 -06:00
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pci_user_write_config_byte(dev, pos, val);
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2005-04-16 16:20:36 -06:00
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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2008-07-22 15:40:47 -06:00
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__le16 val;
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__get_user(val, (__le16 __user *) buf);
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2005-09-27 02:21:55 -06:00
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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2005-04-16 16:20:36 -06:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
|
2008-07-22 15:40:47 -06:00
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__le32 val;
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__get_user(val, (__le32 __user *) buf);
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2005-09-27 02:21:55 -06:00
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pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
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2005-04-16 16:20:36 -06:00
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
|
2008-07-22 15:40:47 -06:00
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__le16 val;
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__get_user(val, (__le16 __user *) buf);
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2005-09-27 02:21:55 -06:00
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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2005-04-16 16:20:36 -06:00
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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__get_user(val, buf);
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2005-09-27 02:21:55 -06:00
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pci_user_write_config_byte(dev, pos, val);
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2005-04-16 16:20:36 -06:00
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buf++;
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pos++;
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cnt--;
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}
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2012-10-24 19:36:03 -06:00
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pci_config_pm_runtime_put(dev);
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2005-04-16 16:20:36 -06:00
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*ppos = pos;
|
2013-03-31 16:16:14 -06:00
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i_size_write(ino, dev->cfg_size);
|
2005-04-16 16:20:36 -06:00
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return nbytes;
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}
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struct pci_filp_private {
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enum pci_mmap_state mmap_state;
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int write_combine;
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};
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|
2008-01-10 06:27:12 -07:00
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static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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2005-04-16 16:20:36 -06:00
|
|
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{
|
2013-03-31 16:16:14 -06:00
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struct pci_dev *dev = PDE_DATA(file_inode(file));
|
2005-04-16 16:20:36 -06:00
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#ifdef HAVE_PCI_MMAP
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struct pci_filp_private *fpriv = file->private_data;
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#endif /* HAVE_PCI_MMAP */
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int ret = 0;
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switch (cmd) {
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case PCIIOC_CONTROLLER:
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ret = pci_domain_nr(dev->bus);
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break;
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#ifdef HAVE_PCI_MMAP
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case PCIIOC_MMAP_IS_IO:
|
2017-04-12 06:25:56 -06:00
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|
|
if (!arch_can_pci_mmap_io())
|
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return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
fpriv->mmap_state = pci_mmap_io;
|
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|
|
break;
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|
|
|
|
|
|
|
case PCIIOC_MMAP_IS_MEM:
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|
|
fpriv->mmap_state = pci_mmap_mem;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PCIIOC_WRITE_COMBINE:
|
2017-04-12 06:25:54 -06:00
|
|
|
if (arch_can_pci_mmap_wc()) {
|
|
|
|
if (arg)
|
|
|
|
fpriv->write_combine = 1;
|
|
|
|
else
|
|
|
|
fpriv->write_combine = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* If arch decided it can't, fall through... */
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif /* HAVE_PCI_MMAP */
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
2013-11-14 11:28:18 -07:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef HAVE_PCI_MMAP
|
|
|
|
static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
|
|
|
|
{
|
2013-03-31 16:16:14 -06:00
|
|
|
struct pci_dev *dev = PDE_DATA(file_inode(file));
|
2005-04-16 16:20:36 -06:00
|
|
|
struct pci_filp_private *fpriv = file->private_data;
|
2017-04-12 06:25:56 -06:00
|
|
|
int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (!capable(CAP_SYS_RAWIO))
|
|
|
|
return -EPERM;
|
|
|
|
|
2017-04-12 06:25:56 -06:00
|
|
|
if (fpriv->mmap_state == pci_mmap_io) {
|
|
|
|
if (!arch_can_pci_mmap_io())
|
|
|
|
return -EINVAL;
|
2017-04-12 06:25:51 -06:00
|
|
|
res_bit = IORESOURCE_IO;
|
2017-04-12 06:25:56 -06:00
|
|
|
}
|
2017-04-12 06:25:51 -06:00
|
|
|
|
2008-10-24 11:32:33 -06:00
|
|
|
/* Make sure the caller is mapping a real resource for this device */
|
|
|
|
for (i = 0; i < PCI_ROM_RESOURCE; i++) {
|
2017-04-12 06:25:51 -06:00
|
|
|
if (dev->resource[i].flags & res_bit &&
|
|
|
|
pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
|
2008-10-24 11:32:33 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i >= PCI_ROM_RESOURCE)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2017-04-12 06:25:52 -06:00
|
|
|
if (fpriv->mmap_state == pci_mmap_mem &&
|
|
|
|
fpriv->write_combine) {
|
|
|
|
if (dev->resource[i].flags & IORESOURCE_PREFETCH)
|
|
|
|
write_combine = 1;
|
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2017-04-12 06:25:58 -06:00
|
|
|
ret = pci_mmap_page_range(dev, i, vma,
|
PCI: Ignore write combining when mapping I/O port space
PCI exposes files like /proc/bus/pci/00/00.0 in procfs. These files
support operations like this:
ioctl(fd, PCIIOC_MMAP_IS_IO); # request I/O port space
ioctl(fd, PCIIOC_WRITE_COMBINE, 1); # request write-combining
mmap(fd, ...)
Write combining is useful on PCI memory space, but I don't think it makes
sense on PCI I/O port space.
We *could* change proc_bus_pci_ioctl() to make it impossible to set
mmap_state == pci_mmap_io and write_combine at the same time, but that
would break the following sequence, which is currently legal:
mmap(fd, ...) # default is I/O, non-combining
ioctl(fd, PCIIOC_WRITE_COMBINE, 1); # request write-combining
ioctl(fd, PCIIOC_MMAP_IS_MEM); # request memory space
mmap(fd, ...) # get write-combining mapping
Ignore the write-combining flag when mapping I/O port space.
This patch should have no functional effect, based on this analysis of all
implementations of pci_mmap_page_range():
- ia64 mips parisc sh unicore32 x86 do not support mapping of I/O port
space at all.
- arm cris microblaze mn10300 sparc xtensa support mapping of I/O port
space, but ignore the write_combine argument to pci_mmap_page_range().
- powerpc supports mapping of I/O port space and uses write_combine, and
it disables write combining for I/O port space in
__pci_mmap_set_pgprot().
This patch makes it possible to remove __pci_mmap_set_pgprot() from
powerpc, which simplifies that path.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-06-08 13:46:54 -06:00
|
|
|
fpriv->mmap_state, write_combine);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int proc_bus_pci_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
|
|
|
|
|
|
|
|
if (!fpriv)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
fpriv->mmap_state = pci_mmap_io;
|
|
|
|
fpriv->write_combine = 0;
|
|
|
|
|
|
|
|
file->private_data = fpriv;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int proc_bus_pci_release(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
kfree(file->private_data);
|
|
|
|
file->private_data = NULL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif /* HAVE_PCI_MMAP */
|
|
|
|
|
2007-02-12 01:55:34 -07:00
|
|
|
static const struct file_operations proc_bus_pci_operations = {
|
2008-04-29 02:02:35 -06:00
|
|
|
.owner = THIS_MODULE,
|
2005-04-16 16:20:36 -06:00
|
|
|
.llseek = proc_bus_pci_lseek,
|
|
|
|
.read = proc_bus_pci_read,
|
|
|
|
.write = proc_bus_pci_write,
|
2008-01-10 06:27:12 -07:00
|
|
|
.unlocked_ioctl = proc_bus_pci_ioctl,
|
2010-07-03 16:02:28 -06:00
|
|
|
.compat_ioctl = proc_bus_pci_ioctl,
|
2005-04-16 16:20:36 -06:00
|
|
|
#ifdef HAVE_PCI_MMAP
|
|
|
|
.open = proc_bus_pci_open,
|
|
|
|
.release = proc_bus_pci_release,
|
|
|
|
.mmap = proc_bus_pci_mmap,
|
|
|
|
#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
|
|
|
|
.get_unmapped_area = get_pci_unmapped_area,
|
|
|
|
#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
|
|
|
|
#endif /* HAVE_PCI_MMAP */
|
|
|
|
};
|
|
|
|
|
|
|
|
/* iterator */
|
|
|
|
static void *pci_seq_start(struct seq_file *m, loff_t *pos)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev = NULL;
|
|
|
|
loff_t n = *pos;
|
|
|
|
|
|
|
|
for_each_pci_dev(dev) {
|
|
|
|
if (!n--)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return dev;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev = v;
|
|
|
|
|
|
|
|
(*pos)++;
|
|
|
|
dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
|
|
|
|
return dev;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pci_seq_stop(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
if (v) {
|
|
|
|
struct pci_dev *dev = v;
|
|
|
|
pci_dev_put(dev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int show_device(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
const struct pci_dev *dev = v;
|
|
|
|
const struct pci_driver *drv;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (dev == NULL)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
drv = pci_dev_driver(dev);
|
|
|
|
seq_printf(m, "%02x%02x\t%04x%04x\t%x",
|
|
|
|
dev->bus->number,
|
|
|
|
dev->devfn,
|
|
|
|
dev->vendor,
|
|
|
|
dev->device,
|
|
|
|
dev->irq);
|
2008-11-21 11:39:32 -07:00
|
|
|
|
|
|
|
/* only print standard and ROM resources to preserve compatibility */
|
|
|
|
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
|
2006-06-12 18:06:02 -06:00
|
|
|
resource_size_t start, end;
|
2005-05-13 01:44:10 -06:00
|
|
|
pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
|
2006-06-12 16:14:29 -06:00
|
|
|
seq_printf(m, "\t%16llx",
|
|
|
|
(unsigned long long)(start |
|
|
|
|
(dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
|
2005-05-13 01:44:10 -06:00
|
|
|
}
|
2008-11-21 11:39:32 -07:00
|
|
|
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
|
2006-06-12 18:06:02 -06:00
|
|
|
resource_size_t start, end;
|
2005-05-13 01:44:10 -06:00
|
|
|
pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
|
2006-06-12 16:14:29 -06:00
|
|
|
seq_printf(m, "\t%16llx",
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->resource[i].start < dev->resource[i].end ?
|
2006-06-12 16:14:29 -06:00
|
|
|
(unsigned long long)(end - start) + 1 : 0);
|
2005-05-13 01:44:10 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
seq_putc(m, '\t');
|
|
|
|
if (drv)
|
|
|
|
seq_printf(m, "%s", drv->name);
|
|
|
|
seq_putc(m, '\n');
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-01-22 12:53:43 -07:00
|
|
|
static const struct seq_operations proc_bus_pci_devices_op = {
|
2005-04-16 16:20:36 -06:00
|
|
|
.start = pci_seq_start,
|
|
|
|
.next = pci_seq_next,
|
|
|
|
.stop = pci_seq_stop,
|
|
|
|
.show = show_device
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct proc_dir_entry *proc_bus_pci_dir;
|
|
|
|
|
|
|
|
int pci_proc_attach_device(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
struct pci_bus *bus = dev->bus;
|
|
|
|
struct proc_dir_entry *e;
|
|
|
|
char name[16];
|
|
|
|
|
|
|
|
if (!proc_initialized)
|
|
|
|
return -EACCES;
|
|
|
|
|
|
|
|
if (!bus->procdir) {
|
|
|
|
if (pci_proc_domain(bus)) {
|
|
|
|
sprintf(name, "%04x:%02x", pci_domain_nr(bus),
|
|
|
|
bus->number);
|
|
|
|
} else {
|
|
|
|
sprintf(name, "%02x", bus->number);
|
|
|
|
}
|
|
|
|
bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
|
|
|
|
if (!bus->procdir)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
|
2008-04-29 02:02:35 -06:00
|
|
|
e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
|
|
|
|
&proc_bus_pci_operations, dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!e)
|
|
|
|
return -ENOMEM;
|
2013-04-11 17:38:51 -06:00
|
|
|
proc_set_size(e, dev->cfg_size);
|
2005-04-16 16:20:36 -06:00
|
|
|
dev->procent = e;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pci_proc_detach_device(struct pci_dev *dev)
|
|
|
|
{
|
2013-04-12 10:27:28 -06:00
|
|
|
proc_remove(dev->procent);
|
|
|
|
dev->procent = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-04-18 18:13:49 -06:00
|
|
|
int pci_proc_detach_bus(struct pci_bus *bus)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2013-04-12 10:27:28 -06:00
|
|
|
proc_remove(bus->procdir);
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
return seq_open(file, &proc_bus_pci_devices_op);
|
|
|
|
}
|
2014-04-18 18:13:49 -06:00
|
|
|
|
2007-02-12 01:55:34 -07:00
|
|
|
static const struct file_operations proc_bus_pci_dev_operations = {
|
2008-04-29 02:02:35 -06:00
|
|
|
.owner = THIS_MODULE,
|
2005-04-16 16:20:36 -06:00
|
|
|
.open = proc_bus_pci_dev_open,
|
|
|
|
.read = seq_read,
|
|
|
|
.llseek = seq_lseek,
|
|
|
|
.release = seq_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init pci_proc_init(void)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev = NULL;
|
2008-04-29 02:01:41 -06:00
|
|
|
proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
|
2008-04-29 02:02:35 -06:00
|
|
|
proc_create("devices", 0, proc_bus_pci_dir,
|
|
|
|
&proc_bus_pci_dev_operations);
|
2005-04-16 16:20:36 -06:00
|
|
|
proc_initialized = 1;
|
2010-07-03 10:04:39 -06:00
|
|
|
for_each_pci_dev(dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
pci_proc_attach_device(dev);
|
2010-07-03 10:04:39 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
2008-05-11 14:58:53 -06:00
|
|
|
device_initcall(pci_proc_init);
|