License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 08:07:57 -06:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-04-16 16:20:36 -06:00
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#include <linux/threads.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#include <asm/ppc_asm.h>
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2005-09-09 12:57:26 -06:00
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#include <asm/asm-offsets.h>
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2008-12-18 12:13:32 -07:00
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#include <asm/mmu.h>
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2018-07-05 10:25:01 -06:00
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#include <asm/feature-fixups.h>
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2005-04-16 16:20:36 -06:00
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/*
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* Structure for storing CPU registers on the save area.
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*/
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#define SL_SP 0
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#define SL_PC 4
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#define SL_MSR 8
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#define SL_SDR1 0xc
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#define SL_SPRG0 0x10 /* 4 sprg's */
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#define SL_DBAT0 0x20
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#define SL_IBAT0 0x28
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#define SL_DBAT1 0x30
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#define SL_IBAT1 0x38
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#define SL_DBAT2 0x40
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#define SL_IBAT2 0x48
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#define SL_DBAT3 0x50
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#define SL_IBAT3 0x58
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2019-06-17 15:42:14 -06:00
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#define SL_DBAT4 0x60
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#define SL_IBAT4 0x68
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#define SL_DBAT5 0x70
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#define SL_IBAT5 0x78
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#define SL_DBAT6 0x80
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#define SL_IBAT6 0x88
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#define SL_DBAT7 0x90
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#define SL_IBAT7 0x98
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#define SL_TB 0xa0
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#define SL_R2 0xa8
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#define SL_CR 0xac
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#define SL_LR 0xb0
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#define SL_R12 0xb4 /* r12 to r31 */
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2005-04-16 16:20:36 -06:00
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#define SL_SIZE (SL_R12 + 80)
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.section .data
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.align 5
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_GLOBAL(swsusp_save_area)
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.space SL_SIZE
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.section .text
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.align 5
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_GLOBAL(swsusp_arch_suspend)
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lis r11,swsusp_save_area@h
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ori r11,r11,swsusp_save_area@l
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mflr r0
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stw r0,SL_LR(r11)
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mfcr r0
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stw r0,SL_CR(r11)
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stw r1,SL_SP(r11)
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stw r2,SL_R2(r11)
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stmw r12,SL_R12(r11)
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/* Save MSR & SDR1 */
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mfmsr r4
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stw r4,SL_MSR(r11)
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mfsdr1 r4
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stw r4,SL_SDR1(r11)
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/* Get a stable timebase and save it */
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1: mftbu r4
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stw r4,SL_TB(r11)
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mftb r5
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stw r5,SL_TB+4(r11)
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mftbu r3
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cmpw r3,r4
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bne 1b
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/* Save SPRGs */
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mfsprg r4,0
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stw r4,SL_SPRG0(r11)
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mfsprg r4,1
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stw r4,SL_SPRG0+4(r11)
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mfsprg r4,2
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stw r4,SL_SPRG0+8(r11)
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mfsprg r4,3
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stw r4,SL_SPRG0+12(r11)
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/* Save BATs */
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mfdbatu r4,0
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stw r4,SL_DBAT0(r11)
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mfdbatl r4,0
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stw r4,SL_DBAT0+4(r11)
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mfdbatu r4,1
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stw r4,SL_DBAT1(r11)
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mfdbatl r4,1
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stw r4,SL_DBAT1+4(r11)
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mfdbatu r4,2
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stw r4,SL_DBAT2(r11)
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mfdbatl r4,2
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stw r4,SL_DBAT2+4(r11)
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mfdbatu r4,3
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stw r4,SL_DBAT3(r11)
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mfdbatl r4,3
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stw r4,SL_DBAT3+4(r11)
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mfibatu r4,0
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stw r4,SL_IBAT0(r11)
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mfibatl r4,0
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stw r4,SL_IBAT0+4(r11)
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mfibatu r4,1
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stw r4,SL_IBAT1(r11)
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mfibatl r4,1
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stw r4,SL_IBAT1+4(r11)
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mfibatu r4,2
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stw r4,SL_IBAT2(r11)
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mfibatl r4,2
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stw r4,SL_IBAT2+4(r11)
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mfibatu r4,3
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stw r4,SL_IBAT3(r11)
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mfibatl r4,3
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stw r4,SL_IBAT3+4(r11)
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2019-06-17 15:42:14 -06:00
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BEGIN_MMU_FTR_SECTION
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mfspr r4,SPRN_DBAT4U
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stw r4,SL_DBAT4(r11)
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mfspr r4,SPRN_DBAT4L
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stw r4,SL_DBAT4+4(r11)
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mfspr r4,SPRN_DBAT5U
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stw r4,SL_DBAT5(r11)
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mfspr r4,SPRN_DBAT5L
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stw r4,SL_DBAT5+4(r11)
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mfspr r4,SPRN_DBAT6U
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stw r4,SL_DBAT6(r11)
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mfspr r4,SPRN_DBAT6L
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stw r4,SL_DBAT6+4(r11)
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mfspr r4,SPRN_DBAT7U
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stw r4,SL_DBAT7(r11)
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mfspr r4,SPRN_DBAT7L
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stw r4,SL_DBAT7+4(r11)
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mfspr r4,SPRN_IBAT4U
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stw r4,SL_IBAT4(r11)
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mfspr r4,SPRN_IBAT4L
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stw r4,SL_IBAT4+4(r11)
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mfspr r4,SPRN_IBAT5U
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stw r4,SL_IBAT5(r11)
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mfspr r4,SPRN_IBAT5L
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stw r4,SL_IBAT5+4(r11)
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mfspr r4,SPRN_IBAT6U
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stw r4,SL_IBAT6(r11)
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mfspr r4,SPRN_IBAT6L
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stw r4,SL_IBAT6+4(r11)
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mfspr r4,SPRN_IBAT7U
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stw r4,SL_IBAT7(r11)
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mfspr r4,SPRN_IBAT7L
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stw r4,SL_IBAT7+4(r11)
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END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
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2005-04-16 16:20:36 -06:00
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#if 0
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/* Backup various CPU config stuffs */
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bl __save_cpu_setup
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#endif
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/* Call the low level suspend stuff (we should probably have made
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* a stackframe...
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*/
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bl swsusp_save
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/* Restore LR from the save area */
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lis r11,swsusp_save_area@h
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ori r11,r11,swsusp_save_area@l
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lwz r0,SL_LR(r11)
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mtlr r0
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blr
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/* Resume code */
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_GLOBAL(swsusp_arch_resume)
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2007-11-07 05:59:44 -07:00
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#ifdef CONFIG_ALTIVEC
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2005-04-16 16:20:36 -06:00
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/* Stop pending alitvec streams and memory accesses */
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BEGIN_FTR_SECTION
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DSSALL
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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2007-11-07 05:59:44 -07:00
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#endif
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2005-04-16 16:20:36 -06:00
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sync
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/* Disable MSR:DR to make sure we don't take a TLB or
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* hash miss during the copy, as our hash table will
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2011-03-30 19:57:33 -06:00
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* for a while be unusable. For .text, we assume we are
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2005-04-16 16:20:36 -06:00
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* covered by a BAT. This works only for non-G5 at this
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* point. G5 will need a better approach, possibly using
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* a small temporary hash table filled with large mappings,
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* disabling the MMU completely isn't a good option for
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* performance reasons.
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* (Note that 750's may have the same performance issue as
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* the G5 in this case, we should investigate using moving
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* BATs for these CPUs)
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*/
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mfmsr r0
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sync
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rlwinm r0,r0,0,28,26 /* clear MSR_DR */
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mtmsr r0
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sync
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isync
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/* Load ptr the list of pages to copy in r3 */
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2006-09-26 00:32:52 -06:00
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lis r11,(restore_pblist - KERNELBASE)@h
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ori r11,r11,restore_pblist@l
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2005-04-16 16:20:36 -06:00
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lwz r10,0(r11)
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/* Copy the pages. This is a very basic implementation, to
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* be replaced by something more cache efficient */
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1:
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tophys(r3,r10)
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li r0,256
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mtctr r0
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lwz r11,pbe_address(r3) /* source */
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tophys(r5,r11)
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lwz r10,pbe_orig_address(r3) /* destination */
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tophys(r6,r10)
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2:
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lwz r8,0(r5)
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lwz r9,4(r5)
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lwz r10,8(r5)
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lwz r11,12(r5)
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addi r5,r5,16
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stw r8,0(r6)
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stw r9,4(r6)
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stw r10,8(r6)
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stw r11,12(r6)
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addi r6,r6,16
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bdnz 2b
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lwz r10,pbe_next(r3)
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cmpwi 0,r10,0
|
|
|
|
|
bne 1b
|
|
|
|
|
|
|
|
|
|
/* Do a very simple cache flush/inval of the L1 to ensure
|
|
|
|
|
* coherency of the icache
|
|
|
|
|
*/
|
|
|
|
|
lis r3,0x0002
|
|
|
|
|
mtctr r3
|
|
|
|
|
li r3, 0
|
|
|
|
|
1:
|
|
|
|
|
lwz r0,0(r3)
|
|
|
|
|
addi r3,r3,0x0020
|
|
|
|
|
bdnz 1b
|
|
|
|
|
isync
|
|
|
|
|
sync
|
|
|
|
|
|
|
|
|
|
/* Now flush those cache lines */
|
|
|
|
|
lis r3,0x0002
|
|
|
|
|
mtctr r3
|
|
|
|
|
li r3, 0
|
|
|
|
|
1:
|
|
|
|
|
dcbf 0,r3
|
|
|
|
|
addi r3,r3,0x0020
|
|
|
|
|
bdnz 1b
|
|
|
|
|
sync
|
|
|
|
|
|
|
|
|
|
/* Ok, we are now running with the kernel data of the old
|
|
|
|
|
* kernel fully restored. We can get to the save area
|
|
|
|
|
* easily now. As for the rest of the code, it assumes the
|
|
|
|
|
* loader kernel and the booted one are exactly identical
|
|
|
|
|
*/
|
|
|
|
|
lis r11,swsusp_save_area@h
|
|
|
|
|
ori r11,r11,swsusp_save_area@l
|
|
|
|
|
tophys(r11,r11)
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
/* Restore various CPU config stuffs */
|
|
|
|
|
bl __restore_cpu_setup
|
|
|
|
|
#endif
|
|
|
|
|
/* Restore the BATs, and SDR1. Then we can turn on the MMU.
|
|
|
|
|
* This is a bit hairy as we are running out of those BATs,
|
|
|
|
|
* but first, our code is probably in the icache, and we are
|
|
|
|
|
* writing the same value to the BAT, so that should be fine,
|
|
|
|
|
* though a better solution will have to be found long-term
|
|
|
|
|
*/
|
|
|
|
|
lwz r4,SL_SDR1(r11)
|
|
|
|
|
mtsdr1 r4
|
|
|
|
|
lwz r4,SL_SPRG0(r11)
|
|
|
|
|
mtsprg 0,r4
|
|
|
|
|
lwz r4,SL_SPRG0+4(r11)
|
|
|
|
|
mtsprg 1,r4
|
|
|
|
|
lwz r4,SL_SPRG0+8(r11)
|
|
|
|
|
mtsprg 2,r4
|
|
|
|
|
lwz r4,SL_SPRG0+12(r11)
|
|
|
|
|
mtsprg 3,r4
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
lwz r4,SL_DBAT0(r11)
|
|
|
|
|
mtdbatu 0,r4
|
|
|
|
|
lwz r4,SL_DBAT0+4(r11)
|
|
|
|
|
mtdbatl 0,r4
|
|
|
|
|
lwz r4,SL_DBAT1(r11)
|
|
|
|
|
mtdbatu 1,r4
|
|
|
|
|
lwz r4,SL_DBAT1+4(r11)
|
|
|
|
|
mtdbatl 1,r4
|
|
|
|
|
lwz r4,SL_DBAT2(r11)
|
|
|
|
|
mtdbatu 2,r4
|
|
|
|
|
lwz r4,SL_DBAT2+4(r11)
|
|
|
|
|
mtdbatl 2,r4
|
|
|
|
|
lwz r4,SL_DBAT3(r11)
|
|
|
|
|
mtdbatu 3,r4
|
|
|
|
|
lwz r4,SL_DBAT3+4(r11)
|
|
|
|
|
mtdbatl 3,r4
|
|
|
|
|
lwz r4,SL_IBAT0(r11)
|
|
|
|
|
mtibatu 0,r4
|
|
|
|
|
lwz r4,SL_IBAT0+4(r11)
|
|
|
|
|
mtibatl 0,r4
|
|
|
|
|
lwz r4,SL_IBAT1(r11)
|
|
|
|
|
mtibatu 1,r4
|
|
|
|
|
lwz r4,SL_IBAT1+4(r11)
|
|
|
|
|
mtibatl 1,r4
|
|
|
|
|
lwz r4,SL_IBAT2(r11)
|
|
|
|
|
mtibatu 2,r4
|
|
|
|
|
lwz r4,SL_IBAT2+4(r11)
|
|
|
|
|
mtibatl 2,r4
|
|
|
|
|
lwz r4,SL_IBAT3(r11)
|
|
|
|
|
mtibatu 3,r4
|
|
|
|
|
lwz r4,SL_IBAT3+4(r11)
|
|
|
|
|
mtibatl 3,r4
|
2008-12-18 12:13:32 -07:00
|
|
|
BEGIN_MMU_FTR_SECTION
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT4U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT4+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT4L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT5(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT5U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT5+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT5L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT6(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT6U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT6+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT6L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT7(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT7U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_DBAT7+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_DBAT7L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT4U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT4+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT4L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT5(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT5U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT5+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT5L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT6(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT6U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT6+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT6L,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT7(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT7U,r4
|
2019-06-17 15:42:14 -06:00
|
|
|
lwz r4,SL_IBAT7+4(r11)
|
2005-04-16 16:20:36 -06:00
|
|
|
mtspr SPRN_IBAT7L,r4
|
2008-12-18 12:13:32 -07:00
|
|
|
END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
|
2019-06-17 15:42:14 -06:00
|
|
|
#endif
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
|
/* Flush all TLBs */
|
|
|
|
|
lis r4,0x1000
|
|
|
|
|
1: addic. r4,r4,-0x1000
|
|
|
|
|
tlbie r4
|
2009-12-30 00:40:17 -07:00
|
|
|
bgt 1b
|
2005-04-16 16:20:36 -06:00
|
|
|
sync
|
|
|
|
|
|
|
|
|
|
/* restore the MSR and turn on the MMU */
|
|
|
|
|
lwz r3,SL_MSR(r11)
|
|
|
|
|
bl turn_on_mmu
|
|
|
|
|
tovirt(r11,r11)
|
|
|
|
|
|
|
|
|
|
/* Restore TB */
|
|
|
|
|
li r3,0
|
|
|
|
|
mttbl r3
|
|
|
|
|
lwz r3,SL_TB(r11)
|
|
|
|
|
lwz r4,SL_TB+4(r11)
|
|
|
|
|
mttbu r3
|
|
|
|
|
mttbl r4
|
|
|
|
|
|
|
|
|
|
/* Kick decrementer */
|
|
|
|
|
li r0,1
|
|
|
|
|
mtdec r0
|
|
|
|
|
|
|
|
|
|
/* Restore the callee-saved registers and return */
|
|
|
|
|
lwz r0,SL_CR(r11)
|
|
|
|
|
mtcr r0
|
|
|
|
|
lwz r2,SL_R2(r11)
|
|
|
|
|
lmw r12,SL_R12(r11)
|
|
|
|
|
lwz r1,SL_SP(r11)
|
|
|
|
|
lwz r0,SL_LR(r11)
|
|
|
|
|
mtlr r0
|
|
|
|
|
|
|
|
|
|
// XXX Note: we don't really need to call swsusp_resume
|
|
|
|
|
|
|
|
|
|
li r3,0
|
|
|
|
|
blr
|
|
|
|
|
|
|
|
|
|
/* FIXME:This construct is actually not useful since we don't shut
|
|
|
|
|
* down the instruction MMU, we could just flip back MSR-DR on.
|
|
|
|
|
*/
|
|
|
|
|
turn_on_mmu:
|
|
|
|
|
mflr r4
|
|
|
|
|
mtsrr0 r4
|
|
|
|
|
mtsrr1 r3
|
|
|
|
|
sync
|
|
|
|
|
isync
|
|
|
|
|
rfi
|
|
|
|
|
|