2005-04-16 16:20:36 -06:00
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/*
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2008-09-25 08:59:19 -06:00
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* linux/arch/arm/mm/dma-mapping.c
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2005-04-16 16:20:36 -06:00
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*
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* Copyright (C) 2000-2004 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* DMA uncached mapping support.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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2006-04-01 16:07:39 -07:00
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#include <asm/memory.h>
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2009-03-12 20:52:09 -06:00
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#include <asm/highmem.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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2006-01-12 09:12:21 -07:00
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#include <asm/sizes.h>
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/* Sanity check size */
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#if (CONSISTENT_DMA_SIZE % SZ_2M)
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#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
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#endif
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2005-04-16 16:20:36 -06:00
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#define CONSISTENT_END (0xffe00000)
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2006-01-12 09:12:21 -07:00
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#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE)
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2005-04-16 16:20:36 -06:00
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#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
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2006-01-12 09:12:21 -07:00
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#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
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#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
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2009-07-24 05:35:02 -06:00
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static u64 get_coherent_dma_mask(struct device *dev)
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{
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u64 mask = ISA_DMA_THRESHOLD;
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if (dev) {
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mask = dev->coherent_dma_mask;
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/*
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* Sanity check the DMA mask - it must be non-zero, and
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* must be able to be satisfied by a DMA allocation.
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*/
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if (mask == 0) {
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dev_warn(dev, "coherent DMA mask is unset\n");
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return 0;
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}
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if ((~mask) & ISA_DMA_THRESHOLD) {
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dev_warn(dev, "coherent DMA mask %#llx is smaller "
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"than system GFP_DMA mask %#llx\n",
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mask, (unsigned long long)ISA_DMA_THRESHOLD);
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return 0;
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}
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}
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2005-04-16 16:20:36 -06:00
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2009-07-24 05:35:02 -06:00
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return mask;
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}
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2009-11-19 08:31:07 -07:00
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/*
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* Allocate a DMA buffer for 'dev' of size 'size' using the
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* specified gfp mask. Note that 'size' must be page aligned.
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*/
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static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
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{
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unsigned long order = get_order(size);
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struct page *page, *p, *e;
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void *ptr;
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u64 mask = get_coherent_dma_mask(dev);
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#ifdef CONFIG_DMA_API_DEBUG
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u64 limit = (mask + 1) & ~mask;
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if (limit && size >= limit) {
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dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
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size, mask);
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return NULL;
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}
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#endif
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if (!mask)
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return NULL;
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if (mask < 0xffffffffULL)
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gfp |= GFP_DMA;
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page = alloc_pages(gfp, order);
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if (!page)
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return NULL;
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/*
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* Now split the huge page and free the excess pages
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*/
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split_page(page, order);
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for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
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__free_page(p);
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/*
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* Ensure that the allocated pages are zeroed, and that any data
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* lurking in the kernel direct-mapped region is invalidated.
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*/
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ptr = page_address(page);
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memset(ptr, 0, size);
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dmac_flush_range(ptr, ptr + size);
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outer_flush_range(__pa(ptr), __pa(ptr) + size);
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return page;
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}
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/*
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* Free a DMA buffer. 'size' must be page aligned.
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*/
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static void __dma_free_buffer(struct page *page, size_t size)
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{
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struct page *e = page + (size >> PAGE_SHIFT);
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while (page < e) {
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__free_page(page);
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page++;
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}
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}
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2009-07-24 05:35:02 -06:00
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#ifdef CONFIG_MMU
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2005-04-16 16:20:36 -06:00
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/*
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2006-01-12 09:12:21 -07:00
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* These are the page tables (2MB each) covering uncached, DMA consistent allocations
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2005-04-16 16:20:36 -06:00
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*/
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2006-01-12 09:12:21 -07:00
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static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
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2005-04-16 16:20:36 -06:00
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2009-11-19 08:07:04 -07:00
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#include "vmregion.h"
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2005-04-16 16:20:36 -06:00
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2009-11-19 08:07:04 -07:00
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static struct arm_vmregion_head consistent_head = {
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.vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
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2005-04-16 16:20:36 -06:00
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.vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
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.vm_start = CONSISTENT_BASE,
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.vm_end = CONSISTENT_END,
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};
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#ifdef CONFIG_HUGETLB_PAGE
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#error ARM Coherent DMA allocator does not (yet) support huge TLB
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#endif
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static void *
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2005-10-21 01:20:58 -06:00
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__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
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2005-04-16 16:20:36 -06:00
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pgprot_t prot)
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{
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struct page *page;
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2009-11-19 08:07:04 -07:00
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struct arm_vmregion *c;
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2005-04-16 16:20:36 -06:00
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2006-01-12 09:12:21 -07:00
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if (!consistent_pte[0]) {
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2005-04-16 16:20:36 -06:00
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printk(KERN_ERR "%s: not initialised\n", __func__);
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dump_stack();
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return NULL;
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}
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size = PAGE_ALIGN(size);
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2009-11-19 08:31:07 -07:00
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page = __dma_alloc_buffer(dev, size, gfp);
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2005-04-16 16:20:36 -06:00
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if (!page)
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goto no_page;
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/*
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* Allocate a virtual address in the consistent mapping region.
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*/
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2009-11-19 08:07:04 -07:00
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c = arm_vmregion_alloc(&consistent_head, size,
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2005-04-16 16:20:36 -06:00
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gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
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if (c) {
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2006-01-12 09:12:21 -07:00
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pte_t *pte;
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int idx = CONSISTENT_PTE_INDEX(c->vm_start);
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u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
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2005-04-16 16:20:36 -06:00
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2006-01-12 09:12:21 -07:00
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pte = consistent_pte[idx] + off;
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2005-04-16 16:20:36 -06:00
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c->vm_pages = page;
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/*
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* Set the "dma handle"
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*/
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*handle = page_to_dma(dev, page);
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do {
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BUG_ON(!pte_none(*pte));
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/*
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* x86 does not mark the pages reserved...
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*/
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SetPageReserved(page);
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2006-12-13 07:34:43 -07:00
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set_pte_ext(pte, mk_pte(page, prot), 0);
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2005-04-16 16:20:36 -06:00
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page++;
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pte++;
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2006-01-12 09:12:21 -07:00
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off++;
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if (off >= PTRS_PER_PTE) {
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off = 0;
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pte = consistent_pte[++idx];
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}
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2005-04-16 16:20:36 -06:00
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} while (size -= PAGE_SIZE);
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return (void *)c->vm_start;
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}
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if (page)
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2009-11-19 08:31:07 -07:00
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__dma_free_buffer(page, size);
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2005-04-16 16:20:36 -06:00
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no_page:
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*handle = ~0;
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return NULL;
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}
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2009-07-24 05:35:02 -06:00
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#else /* !CONFIG_MMU */
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static void *
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__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
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pgprot_t prot)
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{
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void *virt;
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u64 mask = get_coherent_dma_mask(dev);
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if (!mask)
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goto error;
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2009-10-25 16:36:10 -06:00
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if (mask < 0xffffffffULL)
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2009-07-24 05:35:02 -06:00
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gfp |= GFP_DMA;
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virt = kmalloc(size, gfp);
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if (!virt)
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goto error;
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*handle = virt_to_dma(dev, virt);
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return virt;
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error:
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*handle = ~0;
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return NULL;
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}
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#endif /* CONFIG_MMU */
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2005-04-16 16:20:36 -06:00
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/*
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* Allocate DMA-coherent memory space and return both the kernel remapped
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* virtual and bus address for that space.
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*/
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void *
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2005-10-21 01:20:58 -06:00
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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2005-04-16 16:20:36 -06:00
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{
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2008-07-18 03:30:14 -06:00
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void *memory;
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if (dma_alloc_from_coherent(dev, size, handle, &memory))
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return memory;
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2006-04-01 16:07:39 -07:00
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if (arch_is_coherent()) {
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void *virt;
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virt = kmalloc(size, gfp);
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if (!virt)
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return NULL;
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*handle = virt_to_dma(dev, virt);
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return virt;
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}
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2005-04-16 16:20:36 -06:00
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_noncached(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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/*
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* Allocate a writecombining region, in much the same way as
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* dma_alloc_coherent above.
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*/
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void *
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2005-10-21 01:20:58 -06:00
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dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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2005-04-16 16:20:36 -06:00
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{
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_writecombine(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_writecombine);
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static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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2009-07-24 05:35:02 -06:00
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int ret = -ENXIO;
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#ifdef CONFIG_MMU
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2009-11-19 08:07:04 -07:00
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unsigned long user_size, kern_size;
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struct arm_vmregion *c;
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2005-04-16 16:20:36 -06:00
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user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
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2009-11-19 08:07:04 -07:00
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c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
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2005-04-16 16:20:36 -06:00
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if (c) {
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unsigned long off = vma->vm_pgoff;
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kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
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if (off < kern_size &&
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user_size <= (kern_size - off)) {
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ret = remap_pfn_range(vma, vma->vm_start,
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page_to_pfn(c->vm_pages) + off,
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user_size << PAGE_SHIFT,
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vma->vm_page_prot);
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}
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}
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2009-07-24 05:35:02 -06:00
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#endif /* CONFIG_MMU */
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2005-04-16 16:20:36 -06:00
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return ret;
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}
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int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_coherent);
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int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_writecombine);
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/*
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* free a page as defined by the above mapping.
|
2005-11-25 08:52:51 -07:00
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* Must not be called with IRQs disabled.
|
2005-04-16 16:20:36 -06:00
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*/
|
2009-07-24 05:35:02 -06:00
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#ifdef CONFIG_MMU
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2005-04-16 16:20:36 -06:00
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void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
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{
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2009-11-19 08:07:04 -07:00
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struct arm_vmregion *c;
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unsigned long addr;
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2005-04-16 16:20:36 -06:00
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pte_t *ptep;
|
2006-01-12 09:12:21 -07:00
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int idx;
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u32 off;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2005-11-25 08:52:51 -07:00
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
|
2008-07-18 03:30:14 -06:00
|
|
|
if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
|
|
|
|
return;
|
|
|
|
|
2006-04-01 16:07:39 -07:00
|
|
|
if (arch_is_coherent()) {
|
|
|
|
kfree(cpu_addr);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
|
2009-11-19 08:07:04 -07:00
|
|
|
c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!c)
|
|
|
|
goto no_area;
|
|
|
|
|
|
|
|
if ((c->vm_end - c->vm_start) != size) {
|
|
|
|
printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
|
|
|
|
__func__, c->vm_end - c->vm_start, size);
|
|
|
|
dump_stack();
|
|
|
|
size = c->vm_end - c->vm_start;
|
|
|
|
}
|
|
|
|
|
2006-01-12 09:12:21 -07:00
|
|
|
idx = CONSISTENT_PTE_INDEX(c->vm_start);
|
|
|
|
off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
|
|
|
|
ptep = consistent_pte[idx] + off;
|
2005-04-16 16:20:36 -06:00
|
|
|
addr = c->vm_start;
|
|
|
|
do {
|
|
|
|
pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
|
|
|
|
unsigned long pfn;
|
|
|
|
|
|
|
|
ptep++;
|
|
|
|
addr += PAGE_SIZE;
|
2006-01-12 09:12:21 -07:00
|
|
|
off++;
|
|
|
|
if (off >= PTRS_PER_PTE) {
|
|
|
|
off = 0;
|
|
|
|
ptep = consistent_pte[++idx];
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (!pte_none(pte) && pte_present(pte)) {
|
|
|
|
pfn = pte_pfn(pte);
|
|
|
|
|
|
|
|
if (pfn_valid(pfn)) {
|
|
|
|
struct page *page = pfn_to_page(pfn);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* x86 does not mark the pages reserved...
|
|
|
|
*/
|
|
|
|
ClearPageReserved(page);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
printk(KERN_CRIT "%s: bad page in kernel page table\n",
|
|
|
|
__func__);
|
|
|
|
} while (size -= PAGE_SIZE);
|
|
|
|
|
|
|
|
flush_tlb_kernel_range(c->vm_start, c->vm_end);
|
|
|
|
|
2009-11-19 08:07:04 -07:00
|
|
|
arm_vmregion_free(&consistent_head, c);
|
2009-11-19 08:31:07 -07:00
|
|
|
|
|
|
|
__dma_free_buffer(dma_to_page(dev, handle), size);
|
2005-04-16 16:20:36 -06:00
|
|
|
return;
|
|
|
|
|
|
|
|
no_area:
|
|
|
|
printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
|
|
|
|
__func__, cpu_addr);
|
|
|
|
dump_stack();
|
|
|
|
}
|
2009-07-24 05:35:02 -06:00
|
|
|
#else /* !CONFIG_MMU */
|
|
|
|
void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
|
|
|
|
{
|
|
|
|
if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
|
|
|
|
return;
|
|
|
|
kfree(cpu_addr);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_MMU */
|
2005-04-16 16:20:36 -06:00
|
|
|
EXPORT_SYMBOL(dma_free_coherent);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialise the consistent memory allocation.
|
|
|
|
*/
|
|
|
|
static int __init consistent_init(void)
|
|
|
|
{
|
2009-07-24 05:35:02 -06:00
|
|
|
int ret = 0;
|
|
|
|
#ifdef CONFIG_MMU
|
2005-04-16 16:20:36 -06:00
|
|
|
pgd_t *pgd;
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
2009-07-24 05:35:02 -06:00
|
|
|
int i = 0;
|
2006-01-12 09:12:21 -07:00
|
|
|
u32 base = CONSISTENT_BASE;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
do {
|
2006-01-12 09:12:21 -07:00
|
|
|
pgd = pgd_offset(&init_mm, base);
|
|
|
|
pmd = pmd_alloc(&init_mm, pgd, base);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!pmd) {
|
|
|
|
printk(KERN_ERR "%s: no pmd tables\n", __func__);
|
|
|
|
ret = -ENOMEM;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
WARN_ON(!pmd_none(*pmd));
|
|
|
|
|
2006-01-12 09:12:21 -07:00
|
|
|
pte = pte_alloc_kernel(pmd, base);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (!pte) {
|
|
|
|
printk(KERN_ERR "%s: no pte tables\n", __func__);
|
|
|
|
ret = -ENOMEM;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2006-01-12 09:12:21 -07:00
|
|
|
consistent_pte[i++] = pte;
|
|
|
|
base += (1 << PGDIR_SHIFT);
|
|
|
|
} while (base < CONSISTENT_END);
|
2009-07-24 05:35:02 -06:00
|
|
|
#endif /* !CONFIG_MMU */
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
core_initcall(consistent_init);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make an area consistent for devices.
|
2006-11-21 14:57:23 -07:00
|
|
|
* Note: Drivers should NOT use this function directly, as it will break
|
|
|
|
* platforms with CONFIG_DMABOUNCE.
|
|
|
|
* Use the driver DMA support - see dma-mapping.h (dma_sync_*)
|
2005-04-16 16:20:36 -06:00
|
|
|
*/
|
2007-10-09 07:17:01 -06:00
|
|
|
void dma_cache_maint(const void *start, size_t size, int direction)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2009-03-12 11:03:48 -06:00
|
|
|
void (*inner_op)(const void *, const void *);
|
|
|
|
void (*outer_op)(unsigned long, unsigned long);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-12 11:03:48 -06:00
|
|
|
BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1));
|
2007-02-05 06:48:08 -07:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
switch (direction) {
|
|
|
|
case DMA_FROM_DEVICE: /* invalidate only */
|
2009-03-12 11:03:48 -06:00
|
|
|
inner_op = dmac_inv_range;
|
|
|
|
outer_op = outer_inv_range;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
case DMA_TO_DEVICE: /* writeback only */
|
2009-03-12 11:03:48 -06:00
|
|
|
inner_op = dmac_clean_range;
|
|
|
|
outer_op = outer_clean_range;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
|
2009-03-12 11:03:48 -06:00
|
|
|
inner_op = dmac_flush_range;
|
|
|
|
outer_op = outer_flush_range;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
2009-03-12 11:03:48 -06:00
|
|
|
|
|
|
|
inner_op(start, start + size);
|
|
|
|
outer_op(__pa(start), __pa(start) + size);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2007-10-09 07:17:01 -06:00
|
|
|
EXPORT_SYMBOL(dma_cache_maint);
|
2008-09-25 09:30:57 -06:00
|
|
|
|
2009-03-12 20:52:09 -06:00
|
|
|
static void dma_cache_maint_contiguous(struct page *page, unsigned long offset,
|
|
|
|
size_t size, int direction)
|
|
|
|
{
|
|
|
|
void *vaddr;
|
|
|
|
unsigned long paddr;
|
|
|
|
void (*inner_op)(const void *, const void *);
|
|
|
|
void (*outer_op)(unsigned long, unsigned long);
|
|
|
|
|
|
|
|
switch (direction) {
|
|
|
|
case DMA_FROM_DEVICE: /* invalidate only */
|
|
|
|
inner_op = dmac_inv_range;
|
|
|
|
outer_op = outer_inv_range;
|
|
|
|
break;
|
|
|
|
case DMA_TO_DEVICE: /* writeback only */
|
|
|
|
inner_op = dmac_clean_range;
|
|
|
|
outer_op = outer_clean_range;
|
|
|
|
break;
|
|
|
|
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
|
|
|
|
inner_op = dmac_flush_range;
|
|
|
|
outer_op = outer_flush_range;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!PageHighMem(page)) {
|
|
|
|
vaddr = page_address(page) + offset;
|
|
|
|
inner_op(vaddr, vaddr + size);
|
|
|
|
} else {
|
|
|
|
vaddr = kmap_high_get(page);
|
|
|
|
if (vaddr) {
|
|
|
|
vaddr += offset;
|
|
|
|
inner_op(vaddr, vaddr + size);
|
|
|
|
kunmap_high(page);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
paddr = page_to_phys(page) + offset;
|
|
|
|
outer_op(paddr, paddr + size);
|
|
|
|
}
|
|
|
|
|
|
|
|
void dma_cache_maint_page(struct page *page, unsigned long offset,
|
|
|
|
size_t size, int dir)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* A single sg entry may refer to multiple physically contiguous
|
|
|
|
* pages. But we still need to process highmem pages individually.
|
|
|
|
* If highmem is not configured then the bulk of this loop gets
|
|
|
|
* optimized out.
|
|
|
|
*/
|
|
|
|
size_t left = size;
|
|
|
|
do {
|
|
|
|
size_t len = left;
|
|
|
|
if (PageHighMem(page) && len + offset > PAGE_SIZE) {
|
|
|
|
if (offset >= PAGE_SIZE) {
|
|
|
|
page += offset / PAGE_SIZE;
|
|
|
|
offset %= PAGE_SIZE;
|
|
|
|
}
|
|
|
|
len = PAGE_SIZE - offset;
|
|
|
|
}
|
|
|
|
dma_cache_maint_contiguous(page, offset, len, dir);
|
|
|
|
offset = 0;
|
|
|
|
page++;
|
|
|
|
left -= len;
|
|
|
|
} while (left);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_cache_maint_page);
|
|
|
|
|
2008-09-25 09:30:57 -06:00
|
|
|
/**
|
|
|
|
* dma_map_sg - map a set of SG buffers for streaming mode DMA
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map
|
|
|
|
* @dir: DMA transfer direction
|
|
|
|
*
|
|
|
|
* Map a set of buffers described by scatterlist in streaming mode for DMA.
|
|
|
|
* This is the scatter-gather version of the dma_map_single interface.
|
|
|
|
* Here the scatter gather list elements are each tagged with the
|
|
|
|
* appropriate dma address and length. They are obtained via
|
|
|
|
* sg_dma_{address,length}.
|
|
|
|
*
|
|
|
|
* Device ownership issues as mentioned for dma_map_single are the same
|
|
|
|
* here.
|
|
|
|
*/
|
|
|
|
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
struct scatterlist *s;
|
2008-09-25 14:05:02 -06:00
|
|
|
int i, j;
|
2008-09-25 09:30:57 -06:00
|
|
|
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
2008-09-25 14:05:02 -06:00
|
|
|
s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
|
|
|
|
s->length, dir);
|
|
|
|
if (dma_mapping_error(dev, s->dma_address))
|
|
|
|
goto bad_mapping;
|
2008-09-25 09:30:57 -06:00
|
|
|
}
|
|
|
|
return nents;
|
2008-09-25 14:05:02 -06:00
|
|
|
|
|
|
|
bad_mapping:
|
|
|
|
for_each_sg(sg, s, i, j)
|
|
|
|
dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
|
|
|
return 0;
|
2008-09-25 09:30:57 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_map_sg);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to unmap (returned from dma_map_sg)
|
|
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
|
|
*
|
|
|
|
* Unmap a set of streaming mode DMA translations. Again, CPU access
|
|
|
|
* rules concerning calls here are the same as for dma_unmap_single().
|
|
|
|
*/
|
|
|
|
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
{
|
2008-09-25 14:05:02 -06:00
|
|
|
struct scatterlist *s;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for_each_sg(sg, s, nents, i)
|
|
|
|
dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
2008-09-25 09:30:57 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_unmap_sg);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_sync_sg_for_cpu
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
|
|
*/
|
|
|
|
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
struct scatterlist *s;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
2008-09-29 12:50:59 -06:00
|
|
|
dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
|
|
|
|
sg_dma_len(s), dir);
|
2008-09-25 09:30:57 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_sync_sg_for_device
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @sg: list of buffers
|
|
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
|
|
*/
|
|
|
|
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
struct scatterlist *s;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
2008-09-25 14:38:41 -06:00
|
|
|
if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
|
|
|
|
sg_dma_len(s), dir))
|
|
|
|
continue;
|
|
|
|
|
2008-09-25 09:30:57 -06:00
|
|
|
if (!arch_is_coherent())
|
2009-03-12 20:52:09 -06:00
|
|
|
dma_cache_maint_page(sg_page(s), s->offset,
|
|
|
|
s->length, dir);
|
2008-09-25 09:30:57 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_sg_for_device);
|