2006-09-21 12:18:53 -06:00
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/*
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* General Purpose functions for the global management of the
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* 8260 Communication Processor Module.
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* Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
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* Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
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* 2.3.99 Updates
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*
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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* Merged to arch/powerpc from arch/ppc/syslib/cpm2_common.c
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/*
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*
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* In addition to the individual control of the communication
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* channels, there are a few functions that globally affect the
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* communication processor.
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*
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* Buffer descriptors must be allocated from the dual ported memory
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* space. The allocator for that is here. When the communication
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* process is reset, we reclaim the memory available. There is
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* currently no deallocator for this memory.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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2007-09-14 14:30:44 -06:00
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#include <linux/of.h>
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2006-09-21 12:18:53 -06:00
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mpc8260.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/cpm2.h>
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#include <asm/rheap.h>
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#include <asm/fs_pd.h>
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#include <sysdev/fsl_soc.h>
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2007-09-28 13:06:16 -06:00
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#ifndef CONFIG_PPC_CPM_NEW_BINDING
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2006-09-21 12:18:53 -06:00
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static void cpm2_dpinit(void);
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2007-09-28 13:06:16 -06:00
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#endif
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2007-09-14 14:30:44 -06:00
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cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
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2006-09-21 12:18:53 -06:00
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/* We allocate this here because it is used almost exclusively for
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* the communication processor devices.
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*/
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2007-09-14 14:30:44 -06:00
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cpm2_map_t __iomem *cpm2_immr;
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2006-09-21 12:18:53 -06:00
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#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
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of space for CPM as it is larger
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than on PQ2 */
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2007-12-12 15:54:32 -07:00
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void __init cpm2_reset(void)
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2006-09-21 12:18:53 -06:00
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{
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2007-09-14 14:30:44 -06:00
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#ifdef CONFIG_PPC_85xx
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cpm2_immr = ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
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#else
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cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE);
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#endif
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2006-09-21 12:18:53 -06:00
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/* Reclaim the DP memory for our use.
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*/
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2007-09-28 13:06:16 -06:00
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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cpm_muram_init();
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#else
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2006-09-21 12:18:53 -06:00
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cpm2_dpinit();
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2007-09-28 13:06:16 -06:00
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#endif
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2006-09-21 12:18:53 -06:00
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/* Tell everyone where the comm processor resides.
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*/
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cpmp = &cpm2_immr->im_cpm;
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}
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2007-11-26 10:03:40 -07:00
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static DEFINE_SPINLOCK(cmd_lock);
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#define MAX_CR_CMD_LOOPS 10000
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int cpm_command(u32 command, u8 opcode)
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{
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int i, ret;
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unsigned long flags;
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spin_lock_irqsave(&cmd_lock, flags);
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ret = 0;
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out_be32(&cpmp->cp_cpcr, command | opcode | CPM_CR_FLG);
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for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
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if ((in_be32(&cpmp->cp_cpcr) & CPM_CR_FLG) == 0)
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goto out;
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printk(KERN_ERR "%s(): Not able to issue CPM command\n", __FUNCTION__);
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ret = -EIO;
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out:
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spin_unlock_irqrestore(&cmd_lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(cpm_command);
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2006-09-21 12:18:53 -06:00
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/* Set a baud rate generator. This needs lots of work. There are
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* eight BRGs, which can be connected to the CPM channels or output
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* as clocks. The BRGs are in two different block of internal
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* memory mapped space.
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* The baud rate clock is the system clock divided by something.
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* It was set up long ago during the initial boot phase and is
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* is given to us.
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* Baud rate clocks are zero-based in the driver code (as that maps
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* to port numbers). Documentation uses 1-based numbering.
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*/
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#define BRG_INT_CLK (get_brgfreq())
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#define BRG_UART_CLK (BRG_INT_CLK/16)
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/* This function is used by UARTS, or anything else that uses a 16x
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* oversampled clock.
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*/
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void
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cpm_setbrg(uint brg, uint rate)
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{
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2007-09-14 14:30:44 -06:00
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u32 __iomem *bp;
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2006-09-21 12:18:53 -06:00
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/* This is good enough to get SMCs running.....
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*/
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if (brg < 4) {
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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bp = cpm2_map_size(im_brgc1, 16);
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2006-09-21 12:18:53 -06:00
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} else {
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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bp = cpm2_map_size(im_brgc5, 16);
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2006-09-21 12:18:53 -06:00
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brg -= 4;
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}
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bp += brg;
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2007-09-05 13:29:10 -06:00
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out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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cpm2_unmap(bp);
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2006-09-21 12:18:53 -06:00
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}
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/* This function is used to set high speed synchronous baud rate
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* clocks.
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*/
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void
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cpm2_fastbrg(uint brg, uint rate, int div16)
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{
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2007-09-14 14:30:44 -06:00
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u32 __iomem *bp;
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u32 val;
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2006-09-21 12:18:53 -06:00
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if (brg < 4) {
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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bp = cpm2_map_size(im_brgc1, 16);
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2008-01-25 07:31:42 -07:00
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} else {
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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bp = cpm2_map_size(im_brgc5, 16);
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2006-09-21 12:18:53 -06:00
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brg -= 4;
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}
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bp += brg;
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2007-09-14 14:30:44 -06:00
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val = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
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2006-09-21 12:18:53 -06:00
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if (div16)
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2007-09-14 14:30:44 -06:00
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val |= CPM_BRG_DIV16;
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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2007-09-14 14:30:44 -06:00
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out_be32(bp, val);
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POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
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cpm2_unmap(bp);
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2006-09-21 12:18:53 -06:00
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}
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2006-09-21 12:38:05 -06:00
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int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
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{
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int ret = 0;
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int shift;
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int i, bits = 0;
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2007-09-14 14:30:44 -06:00
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cpmux_t __iomem *im_cpmux;
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u32 __iomem *reg;
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2006-09-21 12:38:05 -06:00
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u32 mask = 7;
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2007-07-16 12:26:35 -06:00
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u8 clk_map[][3] = {
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2006-09-21 12:38:05 -06:00
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{CPM_CLK_FCC1, CPM_BRG5, 0},
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{CPM_CLK_FCC1, CPM_BRG6, 1},
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{CPM_CLK_FCC1, CPM_BRG7, 2},
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{CPM_CLK_FCC1, CPM_BRG8, 3},
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{CPM_CLK_FCC1, CPM_CLK9, 4},
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{CPM_CLK_FCC1, CPM_CLK10, 5},
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{CPM_CLK_FCC1, CPM_CLK11, 6},
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{CPM_CLK_FCC1, CPM_CLK12, 7},
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{CPM_CLK_FCC2, CPM_BRG5, 0},
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{CPM_CLK_FCC2, CPM_BRG6, 1},
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{CPM_CLK_FCC2, CPM_BRG7, 2},
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{CPM_CLK_FCC2, CPM_BRG8, 3},
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{CPM_CLK_FCC2, CPM_CLK13, 4},
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{CPM_CLK_FCC2, CPM_CLK14, 5},
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{CPM_CLK_FCC2, CPM_CLK15, 6},
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{CPM_CLK_FCC2, CPM_CLK16, 7},
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{CPM_CLK_FCC3, CPM_BRG5, 0},
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{CPM_CLK_FCC3, CPM_BRG6, 1},
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{CPM_CLK_FCC3, CPM_BRG7, 2},
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{CPM_CLK_FCC3, CPM_BRG8, 3},
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{CPM_CLK_FCC3, CPM_CLK13, 4},
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{CPM_CLK_FCC3, CPM_CLK14, 5},
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{CPM_CLK_FCC3, CPM_CLK15, 6},
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2007-07-16 12:26:35 -06:00
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{CPM_CLK_FCC3, CPM_CLK16, 7},
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{CPM_CLK_SCC1, CPM_BRG1, 0},
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{CPM_CLK_SCC1, CPM_BRG2, 1},
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{CPM_CLK_SCC1, CPM_BRG3, 2},
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{CPM_CLK_SCC1, CPM_BRG4, 3},
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{CPM_CLK_SCC1, CPM_CLK11, 4},
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{CPM_CLK_SCC1, CPM_CLK12, 5},
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{CPM_CLK_SCC1, CPM_CLK3, 6},
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{CPM_CLK_SCC1, CPM_CLK4, 7},
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{CPM_CLK_SCC2, CPM_BRG1, 0},
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{CPM_CLK_SCC2, CPM_BRG2, 1},
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{CPM_CLK_SCC2, CPM_BRG3, 2},
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{CPM_CLK_SCC2, CPM_BRG4, 3},
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{CPM_CLK_SCC2, CPM_CLK11, 4},
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{CPM_CLK_SCC2, CPM_CLK12, 5},
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{CPM_CLK_SCC2, CPM_CLK3, 6},
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{CPM_CLK_SCC2, CPM_CLK4, 7},
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{CPM_CLK_SCC3, CPM_BRG1, 0},
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{CPM_CLK_SCC3, CPM_BRG2, 1},
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{CPM_CLK_SCC3, CPM_BRG3, 2},
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{CPM_CLK_SCC3, CPM_BRG4, 3},
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{CPM_CLK_SCC3, CPM_CLK5, 4},
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{CPM_CLK_SCC3, CPM_CLK6, 5},
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{CPM_CLK_SCC3, CPM_CLK7, 6},
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{CPM_CLK_SCC3, CPM_CLK8, 7},
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{CPM_CLK_SCC4, CPM_BRG1, 0},
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{CPM_CLK_SCC4, CPM_BRG2, 1},
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{CPM_CLK_SCC4, CPM_BRG3, 2},
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{CPM_CLK_SCC4, CPM_BRG4, 3},
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{CPM_CLK_SCC4, CPM_CLK5, 4},
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{CPM_CLK_SCC4, CPM_CLK6, 5},
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{CPM_CLK_SCC4, CPM_CLK7, 6},
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{CPM_CLK_SCC4, CPM_CLK8, 7},
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};
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2006-09-21 12:38:05 -06:00
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|
im_cpmux = cpm2_map(im_cpmux);
|
|
|
|
|
|
|
|
switch (target) {
|
|
|
|
case CPM_CLK_SCC1:
|
|
|
|
reg = &im_cpmux->cmx_scr;
|
|
|
|
shift = 24;
|
|
|
|
case CPM_CLK_SCC2:
|
|
|
|
reg = &im_cpmux->cmx_scr;
|
|
|
|
shift = 16;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_SCC3:
|
|
|
|
reg = &im_cpmux->cmx_scr;
|
|
|
|
shift = 8;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_SCC4:
|
|
|
|
reg = &im_cpmux->cmx_scr;
|
|
|
|
shift = 0;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_FCC1:
|
|
|
|
reg = &im_cpmux->cmx_fcr;
|
|
|
|
shift = 24;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_FCC2:
|
|
|
|
reg = &im_cpmux->cmx_fcr;
|
|
|
|
shift = 16;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_FCC3:
|
|
|
|
reg = &im_cpmux->cmx_fcr;
|
|
|
|
shift = 8;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printk(KERN_ERR "cpm2_clock_setup: invalid clock target\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mode == CPM_CLK_RX)
|
2007-08-20 10:36:19 -06:00
|
|
|
shift += 3;
|
2006-09-21 12:38:05 -06:00
|
|
|
|
2007-07-16 12:26:35 -06:00
|
|
|
for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
|
2006-09-21 12:38:05 -06:00
|
|
|
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
|
|
|
|
bits = clk_map[i][2];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2007-07-16 12:26:35 -06:00
|
|
|
if (i == ARRAY_SIZE(clk_map))
|
2006-09-21 12:38:05 -06:00
|
|
|
ret = -EINVAL;
|
|
|
|
|
|
|
|
bits <<= shift;
|
|
|
|
mask <<= shift;
|
2007-07-16 12:26:35 -06:00
|
|
|
|
2006-09-21 12:38:05 -06:00
|
|
|
out_be32(reg, (in_be32(reg) & ~mask) | bits);
|
|
|
|
|
|
|
|
cpm2_unmap(im_cpmux);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-07-16 12:26:35 -06:00
|
|
|
int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
int shift;
|
|
|
|
int i, bits = 0;
|
|
|
|
cpmux_t __iomem *im_cpmux;
|
|
|
|
u8 __iomem *reg;
|
|
|
|
u8 mask = 3;
|
|
|
|
|
|
|
|
u8 clk_map[][3] = {
|
|
|
|
{CPM_CLK_SMC1, CPM_BRG1, 0},
|
|
|
|
{CPM_CLK_SMC1, CPM_BRG7, 1},
|
|
|
|
{CPM_CLK_SMC1, CPM_CLK7, 2},
|
|
|
|
{CPM_CLK_SMC1, CPM_CLK9, 3},
|
|
|
|
{CPM_CLK_SMC2, CPM_BRG2, 0},
|
|
|
|
{CPM_CLK_SMC2, CPM_BRG8, 1},
|
|
|
|
{CPM_CLK_SMC2, CPM_CLK4, 2},
|
|
|
|
{CPM_CLK_SMC2, CPM_CLK15, 3},
|
|
|
|
};
|
|
|
|
|
|
|
|
im_cpmux = cpm2_map(im_cpmux);
|
|
|
|
|
|
|
|
switch (target) {
|
|
|
|
case CPM_CLK_SMC1:
|
|
|
|
reg = &im_cpmux->cmx_smr;
|
|
|
|
mask = 3;
|
|
|
|
shift = 4;
|
|
|
|
break;
|
|
|
|
case CPM_CLK_SMC2:
|
|
|
|
reg = &im_cpmux->cmx_smr;
|
|
|
|
mask = 3;
|
|
|
|
shift = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printk(KERN_ERR "cpm2_smc_clock_setup: invalid clock target\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
|
|
|
|
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
|
|
|
|
bits = clk_map[i][2];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (i == ARRAY_SIZE(clk_map))
|
|
|
|
ret = -EINVAL;
|
|
|
|
|
|
|
|
bits <<= shift;
|
|
|
|
mask <<= shift;
|
|
|
|
|
|
|
|
out_8(reg, (in_8(reg) & ~mask) | bits);
|
|
|
|
|
|
|
|
cpm2_unmap(im_cpmux);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-09-28 13:06:16 -06:00
|
|
|
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
2006-09-21 12:18:53 -06:00
|
|
|
/*
|
|
|
|
* dpalloc / dpfree bits.
|
|
|
|
*/
|
|
|
|
static spinlock_t cpm_dpmem_lock;
|
|
|
|
/* 16 blocks should be enough to satisfy all requests
|
|
|
|
* until the memory subsystem goes up... */
|
|
|
|
static rh_block_t cpm_boot_dpmem_rh_block[16];
|
|
|
|
static rh_info_t cpm_dpmem_info;
|
2007-09-14 14:30:44 -06:00
|
|
|
static u8 __iomem *im_dprambase;
|
2006-09-21 12:18:53 -06:00
|
|
|
|
|
|
|
static void cpm2_dpinit(void)
|
|
|
|
{
|
2007-09-14 14:30:44 -06:00
|
|
|
spin_lock_init(&cpm_dpmem_lock);
|
POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
|
|
|
|
2006-09-21 12:18:53 -06:00
|
|
|
/* initialize the info header */
|
|
|
|
rh_init(&cpm_dpmem_info, 1,
|
|
|
|
sizeof(cpm_boot_dpmem_rh_block) /
|
|
|
|
sizeof(cpm_boot_dpmem_rh_block[0]),
|
|
|
|
cpm_boot_dpmem_rh_block);
|
|
|
|
|
2007-09-28 13:06:16 -06:00
|
|
|
im_dprambase = cpm2_immr;
|
|
|
|
|
2006-09-21 12:18:53 -06:00
|
|
|
/* Attach the usable dpmem area */
|
|
|
|
/* XXX: This is actually crap. CPM_DATAONLY_BASE and
|
|
|
|
* CPM_DATAONLY_SIZE is only a subset of the available dpram. It
|
|
|
|
* varies with the processor and the microcode patches activated.
|
|
|
|
* But the following should be at least safe.
|
|
|
|
*/
|
2007-09-28 13:06:16 -06:00
|
|
|
rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
|
2006-09-21 12:18:53 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* This function returns an index into the DPRAM area.
|
|
|
|
*/
|
2007-05-08 13:46:36 -06:00
|
|
|
unsigned long cpm_dpalloc(uint size, uint align)
|
2006-09-21 12:18:53 -06:00
|
|
|
{
|
2007-05-08 13:46:36 -06:00
|
|
|
unsigned long start;
|
2006-09-21 12:18:53 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
|
|
|
cpm_dpmem_info.alignment = align;
|
|
|
|
start = rh_alloc(&cpm_dpmem_info, size, "commproc");
|
|
|
|
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
|
|
|
|
|
|
|
return (uint)start;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cpm_dpalloc);
|
|
|
|
|
2007-05-08 13:46:36 -06:00
|
|
|
int cpm_dpfree(unsigned long offset)
|
2006-09-21 12:18:53 -06:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
2007-05-08 13:46:36 -06:00
|
|
|
ret = rh_free(&cpm_dpmem_info, offset);
|
2006-09-21 12:18:53 -06:00
|
|
|
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cpm_dpfree);
|
|
|
|
|
|
|
|
/* not sure if this is ever needed */
|
2007-05-08 13:46:36 -06:00
|
|
|
unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
|
2006-09-21 12:18:53 -06:00
|
|
|
{
|
2007-05-08 13:46:36 -06:00
|
|
|
unsigned long start;
|
2006-09-21 12:18:53 -06:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&cpm_dpmem_lock, flags);
|
|
|
|
cpm_dpmem_info.alignment = align;
|
2007-05-08 13:46:36 -06:00
|
|
|
start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
|
2006-09-21 12:18:53 -06:00
|
|
|
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
|
|
|
|
|
2007-05-08 13:46:36 -06:00
|
|
|
return start;
|
2006-09-21 12:18:53 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cpm_dpalloc_fixed);
|
|
|
|
|
|
|
|
void cpm_dpdump(void)
|
|
|
|
{
|
|
|
|
rh_dump(&cpm_dpmem_info);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cpm_dpdump);
|
|
|
|
|
2007-05-08 13:46:36 -06:00
|
|
|
void *cpm_dpram_addr(unsigned long offset)
|
2006-09-21 12:18:53 -06:00
|
|
|
{
|
POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 12:37:58 -06:00
|
|
|
return (void *)(im_dprambase + offset);
|
2006-09-21 12:18:53 -06:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cpm_dpram_addr);
|
2007-09-28 13:06:16 -06:00
|
|
|
#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
|
2007-07-16 12:32:24 -06:00
|
|
|
|
|
|
|
struct cpm2_ioports {
|
|
|
|
u32 dir, par, sor, odr, dat;
|
|
|
|
u32 res[3];
|
|
|
|
};
|
|
|
|
|
|
|
|
void cpm2_set_pin(int port, int pin, int flags)
|
|
|
|
{
|
|
|
|
struct cpm2_ioports __iomem *iop =
|
|
|
|
(struct cpm2_ioports __iomem *)&cpm2_immr->im_ioport;
|
|
|
|
|
|
|
|
pin = 1 << (31 - pin);
|
|
|
|
|
|
|
|
if (flags & CPM_PIN_OUTPUT)
|
|
|
|
setbits32(&iop[port].dir, pin);
|
|
|
|
else
|
|
|
|
clrbits32(&iop[port].dir, pin);
|
|
|
|
|
|
|
|
if (!(flags & CPM_PIN_GPIO))
|
|
|
|
setbits32(&iop[port].par, pin);
|
|
|
|
else
|
|
|
|
clrbits32(&iop[port].par, pin);
|
|
|
|
|
|
|
|
if (flags & CPM_PIN_SECONDARY)
|
|
|
|
setbits32(&iop[port].sor, pin);
|
|
|
|
else
|
|
|
|
clrbits32(&iop[port].sor, pin);
|
|
|
|
|
|
|
|
if (flags & CPM_PIN_OPENDRAIN)
|
|
|
|
setbits32(&iop[port].odr, pin);
|
|
|
|
else
|
|
|
|
clrbits32(&iop[port].odr, pin);
|
|
|
|
}
|