2019-06-04 02:11:33 -06:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2014-06-30 06:31:13 -06:00
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/*
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* rt5670-dsp.h -- RT5670 ALSA SoC DSP driver
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*
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* Copyright 2014 Realtek Microelectronics
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* Author: Bard Liao <bardliao@realtek.com>
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*/
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#ifndef __RT5670_DSP_H__
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#define __RT5670_DSP_H__
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#define RT5670_DSP_CTRL1 0xe0
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#define RT5670_DSP_CTRL2 0xe1
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#define RT5670_DSP_CTRL3 0xe2
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#define RT5670_DSP_CTRL4 0xe3
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#define RT5670_DSP_CTRL5 0xe4
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/* DSP Control 1 (0xe0) */
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#define RT5670_DSP_CMD_MASK (0xff << 8)
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#define RT5670_DSP_CMD_PE (0x0d << 8) /* Patch Entry */
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#define RT5670_DSP_CMD_MW (0x3b << 8) /* Memory Write */
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#define RT5670_DSP_CMD_MR (0x37 << 8) /* Memory Read */
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#define RT5670_DSP_CMD_RR (0x60 << 8) /* Register Read */
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#define RT5670_DSP_CMD_RW (0x68 << 8) /* Register Write */
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#define RT5670_DSP_REG_DATHI (0x26 << 8) /* High Data Addr */
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#define RT5670_DSP_REG_DATLO (0x25 << 8) /* Low Data Addr */
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#define RT5670_DSP_CLK_MASK (0x3 << 6)
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#define RT5670_DSP_CLK_SFT 6
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#define RT5670_DSP_CLK_768K (0x0 << 6)
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#define RT5670_DSP_CLK_384K (0x1 << 6)
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#define RT5670_DSP_CLK_192K (0x2 << 6)
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#define RT5670_DSP_CLK_96K (0x3 << 6)
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#define RT5670_DSP_BUSY_MASK (0x1 << 5)
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#define RT5670_DSP_RW_MASK (0x1 << 4)
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#define RT5670_DSP_DL_MASK (0x3 << 2)
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#define RT5670_DSP_DL_0 (0x0 << 2)
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#define RT5670_DSP_DL_1 (0x1 << 2)
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#define RT5670_DSP_DL_2 (0x2 << 2)
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#define RT5670_DSP_DL_3 (0x3 << 2)
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#define RT5670_DSP_I2C_AL_16 (0x1 << 1)
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#define RT5670_DSP_CMD_EN (0x1)
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struct rt5670_dsp_param {
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u16 cmd_fmt;
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u16 addr;
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u16 data;
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u8 cmd;
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};
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#endif /* __RT5670_DSP_H__ */
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