2019-05-29 08:17:58 -06:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2015-03-03 17:21:53 -07:00
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/*
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* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
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*
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* lpass.h - Definitions for the QTi LPASS
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*/
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#ifndef __LPASS_H__
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#define __LPASS_H__
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#include <linux/clk.h>
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#include <linux/compiler.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
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2015-05-21 15:52:49 -06:00
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#define LPASS_MAX_MI2S_PORTS (8)
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2015-05-21 15:53:14 -06:00
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#define LPASS_MAX_DMA_CHANNELS (8)
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2015-03-03 17:21:53 -07:00
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/* Both the CPU DAI and platform drivers will access this data */
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struct lpass_data {
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/* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
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struct clk *ahbix_clk;
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/* MI2S system clock */
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2015-05-21 15:52:49 -06:00
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struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];
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2015-03-03 17:21:53 -07:00
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/* MI2S bit clock (derived from system clock by a divider */
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2015-05-21 15:52:49 -06:00
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struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];
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2015-03-03 17:21:53 -07:00
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/* low-power audio interface (LPAIF) registers */
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void __iomem *lpaif;
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/* regmap backed by the low-power audio interface (LPAIF) registers */
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struct regmap *lpaif_map;
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/* interrupts from the low-power audio interface (LPAIF) */
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int lpaif_irq;
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2015-05-16 06:32:17 -06:00
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/* SOC specific variations in the LPASS IP integration */
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struct lpass_variant *variant;
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2015-05-21 15:53:14 -06:00
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2015-05-21 15:53:21 -06:00
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/* bit map to keep track of static channel allocations */
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2016-02-11 05:17:51 -07:00
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unsigned long dma_ch_bit_map;
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2015-05-21 15:53:21 -06:00
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2015-05-21 15:53:14 -06:00
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/* used it for handling interrupt per dma channel */
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struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
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2015-05-22 09:53:52 -06:00
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/* 8016 specific */
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struct clk *pcnoc_mport_clk;
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struct clk *pcnoc_sway_clk;
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2016-08-01 00:10:54 -06:00
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2015-05-16 06:32:17 -06:00
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};
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/* Vairant data per each SOC */
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struct lpass_variant {
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u32 i2sctrl_reg_base;
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u32 i2sctrl_reg_stride;
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u32 i2s_ports;
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u32 irq_reg_base;
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u32 irq_reg_stride;
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u32 irq_ports;
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u32 rdma_reg_base;
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u32 rdma_reg_stride;
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u32 rdma_channels;
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2016-02-11 05:17:23 -07:00
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u32 wrdma_reg_base;
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u32 wrdma_reg_stride;
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u32 wrdma_channels;
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2015-05-16 06:32:17 -06:00
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2015-05-21 15:53:05 -06:00
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/**
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* on SOCs like APQ8016 the channel control bits start
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* at different offset to ipq806x
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**/
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2016-02-11 05:17:30 -07:00
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u32 dmactl_audif_start;
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2016-02-11 05:17:23 -07:00
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u32 wrdma_channel_start;
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2017-02-27 15:29:20 -07:00
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/* SOC specific initialization like clocks */
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2015-05-16 06:32:17 -06:00
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int (*init)(struct platform_device *pdev);
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int (*exit)(struct platform_device *pdev);
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2016-02-11 05:17:37 -07:00
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int (*alloc_dma_channel)(struct lpass_data *data, int direction);
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2015-05-16 06:32:34 -06:00
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int (*free_dma_channel)(struct lpass_data *data, int ch);
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2015-05-16 06:32:17 -06:00
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/* SOC specific dais */
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struct snd_soc_dai_driver *dai_driver;
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int num_dai;
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2017-04-05 02:34:10 -06:00
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const char * const *dai_osr_clk_names;
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const char * const *dai_bit_clk_names;
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2015-03-03 17:21:53 -07:00
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};
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/* register the platform driver from the CPU DAI driver */
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int asoc_qcom_lpass_platform_register(struct platform_device *);
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2015-05-16 06:32:17 -06:00
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int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev);
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int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
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int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
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2015-08-27 20:53:31 -06:00
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extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
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2015-03-03 17:21:53 -07:00
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#endif /* __LPASS_H__ */
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