2015-10-08 04:13:31 -06:00
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/* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver
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*
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* Copyright (C) 2015 Atmel
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*
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* Author: Songjun Wu <songjun.wu@atmel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or later
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* as published by the Free Software Foundation.
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*/
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "atmel-classd.h"
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struct atmel_classd_pdata {
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bool non_overlap_enable;
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int non_overlap_time;
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int pwm_type;
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const char *card_name;
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};
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struct atmel_classd {
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dma_addr_t phy_base;
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struct regmap *regmap;
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struct clk *pclk;
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struct clk *gclk;
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2018-01-28 19:44:05 -07:00
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struct device *dev;
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2015-10-08 04:13:31 -06:00
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int irq;
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const struct atmel_classd_pdata *pdata;
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};
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#ifdef CONFIG_OF
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static const struct of_device_id atmel_classd_of_match[] = {
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{
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.compatible = "atmel,sama5d2-classd",
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(of, atmel_classd_of_match);
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static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev)
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{
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struct device_node *np = dev->of_node;
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struct atmel_classd_pdata *pdata;
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const char *pwm_type;
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int ret;
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if (!np) {
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dev_err(dev, "device node not found\n");
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return ERR_PTR(-EINVAL);
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}
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return ERR_PTR(-ENOMEM);
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ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type);
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if ((ret == 0) && (strcmp(pwm_type, "diff") == 0))
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pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
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else
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pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;
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ret = of_property_read_u32(np,
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"atmel,non-overlap-time", &pdata->non_overlap_time);
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if (ret)
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pdata->non_overlap_enable = false;
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else
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pdata->non_overlap_enable = true;
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ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
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if (ret)
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pdata->card_name = "CLASSD";
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return pdata;
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}
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#else
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static inline struct atmel_classd_pdata *
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atmel_classd_dt_init(struct device *dev)
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{
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return ERR_PTR(-EINVAL);
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}
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#endif
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#define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
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| SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \
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| SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \
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| SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \
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| SNDRV_PCM_RATE_96000)
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static const struct snd_pcm_hardware atmel_classd_hw = {
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.info = SNDRV_PCM_INFO_MMAP
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| SNDRV_PCM_INFO_MMAP_VALID
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| SNDRV_PCM_INFO_INTERLEAVED
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| SNDRV_PCM_INFO_RESUME
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| SNDRV_PCM_INFO_PAUSE,
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.formats = (SNDRV_PCM_FMTBIT_S16_LE),
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.rates = ATMEL_CLASSD_RATES,
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.rate_min = 8000,
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.rate_max = 96000,
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2015-11-18 20:45:32 -07:00
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.channels_min = 1,
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2015-10-08 04:13:31 -06:00
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.channels_max = 2,
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.buffer_bytes_max = 64 * 1024,
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.period_bytes_min = 256,
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.period_bytes_max = 32 * 1024,
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.periods_min = 2,
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.periods_max = 256,
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};
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#define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024)
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/* cpu dai component */
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static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
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regmap_write(dd->regmap, CLASSD_THR, 0x0);
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return clk_prepare_enable(dd->pclk);
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}
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static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
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clk_disable_unprepare(dd->pclk);
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}
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static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
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.startup = atmel_classd_cpu_dai_startup,
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.shutdown = atmel_classd_cpu_dai_shutdown,
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};
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static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
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.playback = {
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2015-11-18 20:45:32 -07:00
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.channels_min = 1,
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2015-10-08 04:13:31 -06:00
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.channels_max = 2,
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.rates = ATMEL_CLASSD_RATES,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.ops = &atmel_classd_cpu_dai_ops,
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};
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static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
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.name = "atmel-classd",
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};
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/* platform */
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static int
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atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct dma_slave_config *slave_config)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
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if (params_physical_width(params) != 16) {
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2018-01-28 19:44:05 -07:00
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dev_err(dd->dev,
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2015-10-08 04:13:31 -06:00
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"only supports 16-bit audio data\n");
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return -EINVAL;
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}
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2015-11-18 20:45:32 -07:00
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if (params_channels(params) == 1)
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slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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else
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slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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2015-10-08 04:13:31 -06:00
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slave_config->direction = DMA_MEM_TO_DEV;
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slave_config->dst_addr = dd->phy_base + CLASSD_THR;
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slave_config->dst_maxburst = 1;
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slave_config->src_maxburst = 1;
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slave_config->device_fc = false;
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return 0;
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}
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static const struct snd_dmaengine_pcm_config
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atmel_classd_dmaengine_pcm_config = {
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.prepare_slave_config = atmel_classd_platform_configure_dma,
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.pcm_hardware = &atmel_classd_hw,
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.prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE,
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};
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/* codec */
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static const char * const mono_mode_text[] = {
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"mix", "sat", "left", "right"
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};
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static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
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CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
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mono_mode_text);
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static const char * const eqcfg_text[] = {
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"Treble-12dB", "Treble-6dB",
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"Medium-8dB", "Medium-3dB",
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"Bass-12dB", "Bass-6dB",
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"0 dB",
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"Bass+6dB", "Bass+12dB",
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"Medium+3dB", "Medium+8dB",
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"Treble+6dB", "Treble+12dB",
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};
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static const unsigned int eqcfg_value[] = {
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CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
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CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
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CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
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CLASSD_INTPMR_EQCFG_FLAT,
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CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
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CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
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CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
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};
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static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
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CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
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eqcfg_text, eqcfg_value);
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static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);
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static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
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SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
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CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
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78, 1, classd_digital_tlv),
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SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
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CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),
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SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),
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SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),
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SOC_ENUM("Mono Mode", classd_mono_mode_enum),
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SOC_ENUM("EQ", classd_eqcfg_enum),
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};
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static const char * const pwm_type[] = {
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"Single ended", "Differential"
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};
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2018-01-28 21:27:39 -07:00
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static int atmel_classd_component_probe(struct snd_soc_component *component)
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2015-10-08 04:13:31 -06:00
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{
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2018-01-28 21:27:39 -07:00
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struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
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2015-10-08 04:13:31 -06:00
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struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
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const struct atmel_classd_pdata *pdata = dd->pdata;
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u32 mask, val;
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mask = CLASSD_MR_PWMTYP_MASK;
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val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;
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mask |= CLASSD_MR_NON_OVERLAP_MASK;
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if (pdata->non_overlap_enable) {
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val |= (CLASSD_MR_NON_OVERLAP_EN
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<< CLASSD_MR_NON_OVERLAP_SHIFT);
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mask |= CLASSD_MR_NOVR_VAL_MASK;
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switch (pdata->non_overlap_time) {
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case 5:
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val |= (CLASSD_MR_NOVR_VAL_5NS
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<< CLASSD_MR_NOVR_VAL_SHIFT);
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break;
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case 10:
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val |= (CLASSD_MR_NOVR_VAL_10NS
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<< CLASSD_MR_NOVR_VAL_SHIFT);
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break;
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case 15:
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val |= (CLASSD_MR_NOVR_VAL_15NS
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<< CLASSD_MR_NOVR_VAL_SHIFT);
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break;
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case 20:
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val |= (CLASSD_MR_NOVR_VAL_20NS
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<< CLASSD_MR_NOVR_VAL_SHIFT);
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break;
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default:
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val |= (CLASSD_MR_NOVR_VAL_10NS
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<< CLASSD_MR_NOVR_VAL_SHIFT);
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2018-01-28 21:27:39 -07:00
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dev_warn(component->dev,
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2015-10-08 04:13:31 -06:00
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"non-overlapping value %d is invalid, the default value 10 is specified\n",
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pdata->non_overlap_time);
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break;
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}
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}
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2018-01-28 21:27:39 -07:00
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snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
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2015-10-08 04:13:31 -06:00
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2018-01-28 21:27:39 -07:00
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dev_info(component->dev,
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2015-10-08 04:13:31 -06:00
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"PWM modulation type is %s, non-overlapping is %s\n",
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pwm_type[pdata->pwm_type],
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pdata->non_overlap_enable?"enabled":"disabled");
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return 0;
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}
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2018-01-28 21:27:39 -07:00
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static int atmel_classd_component_resume(struct snd_soc_component *component)
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2017-05-15 02:36:17 -06:00
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{
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2018-01-28 21:27:39 -07:00
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struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
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2017-05-15 02:36:17 -06:00
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struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
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return regcache_sync(dd->regmap);
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}
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2018-01-28 21:27:39 -07:00
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static struct snd_soc_component_driver soc_component_dev_classd = {
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.probe = atmel_classd_component_probe,
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.resume = atmel_classd_component_resume,
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.controls = atmel_classd_snd_controls,
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.num_controls = ARRAY_SIZE(atmel_classd_snd_controls),
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.idle_bias_on = 1,
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.use_pmdown_time = 1,
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.endianness = 1,
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.non_legacy_dai_naming = 1,
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2015-10-08 04:13:31 -06:00
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};
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/* codec dai component */
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static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *codec_dai)
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{
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|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
|
|
|
|
|
|
|
|
return clk_prepare_enable(dd->gclk);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai,
|
|
|
|
int mute)
|
|
|
|
{
|
2018-01-28 21:27:39 -07:00
|
|
|
struct snd_soc_component *component = codec_dai->component;
|
2015-10-08 04:13:31 -06:00
|
|
|
u32 mask, val;
|
|
|
|
|
|
|
|
mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK;
|
|
|
|
|
|
|
|
if (mute)
|
|
|
|
val = mask;
|
|
|
|
else
|
|
|
|
val = 0;
|
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-08-10 00:34:07 -06:00
|
|
|
#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
|
|
|
|
#define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
static struct {
|
|
|
|
int rate;
|
|
|
|
int sample_rate;
|
|
|
|
int dsp_clk;
|
2017-08-10 00:34:07 -06:00
|
|
|
unsigned long gclk_rate;
|
2015-10-08 04:13:31 -06:00
|
|
|
} const sample_rates[] = {
|
|
|
|
{ 8000, CLASSD_INTPMR_FRAME_8K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 16000, CLASSD_INTPMR_FRAME_16K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 32000, CLASSD_INTPMR_FRAME_32K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 48000, CLASSD_INTPMR_FRAME_48K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 96000, CLASSD_INTPMR_FRAME_96K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 22050, CLASSD_INTPMR_FRAME_22K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 44100, CLASSD_INTPMR_FRAME_44K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
{ 88200, CLASSD_INTPMR_FRAME_88K,
|
2017-08-10 00:34:07 -06:00
|
|
|
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
|
2015-10-08 04:13:31 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
static int
|
|
|
|
atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_pcm_hw_params *params,
|
|
|
|
struct snd_soc_dai *codec_dai)
|
|
|
|
{
|
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
|
2018-01-28 21:27:39 -07:00
|
|
|
struct snd_soc_component *component = codec_dai->component;
|
2015-10-08 04:13:31 -06:00
|
|
|
int fs;
|
|
|
|
int i, best, best_val, cur_val, ret;
|
|
|
|
u32 mask, val;
|
|
|
|
|
|
|
|
fs = params_rate(params);
|
|
|
|
|
|
|
|
best = 0;
|
|
|
|
best_val = abs(fs - sample_rates[0].rate);
|
|
|
|
for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
|
|
|
|
/* Closest match */
|
|
|
|
cur_val = abs(fs - sample_rates[i].rate);
|
|
|
|
if (cur_val < best_val) {
|
|
|
|
best = i;
|
|
|
|
best_val = cur_val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
dev_dbg(component->dev,
|
2017-08-10 00:34:07 -06:00
|
|
|
"Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
|
|
|
|
sample_rates[best].rate, sample_rates[best].gclk_rate);
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
clk_disable_unprepare(dd->gclk);
|
|
|
|
|
2017-08-10 00:34:07 -06:00
|
|
|
ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
|
2015-10-08 04:13:31 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK;
|
|
|
|
val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
|
|
|
|
| (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
|
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val);
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
return clk_prepare_enable(dd->gclk);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_soc_dai *codec_dai)
|
|
|
|
{
|
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
|
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
|
|
|
|
|
|
|
|
clk_disable_unprepare(dd->gclk);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_soc_dai *codec_dai)
|
|
|
|
{
|
2018-01-28 21:27:39 -07:00
|
|
|
struct snd_soc_component *component = codec_dai->component;
|
2015-10-08 04:13:31 -06:00
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
snd_soc_component_update_bits(component, CLASSD_MR,
|
2015-10-08 04:13:31 -06:00
|
|
|
CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK,
|
|
|
|
(CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
|
|
|
|
|(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream,
|
|
|
|
int cmd, struct snd_soc_dai *codec_dai)
|
|
|
|
{
|
2018-01-28 21:27:39 -07:00
|
|
|
struct snd_soc_component *component = codec_dai->component;
|
2015-10-08 04:13:31 -06:00
|
|
|
u32 mask, val;
|
|
|
|
|
|
|
|
mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
|
|
case SNDRV_PCM_TRIGGER_RESUME:
|
|
|
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
|
|
|
val = mask;
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
|
|
case SNDRV_PCM_TRIGGER_SUSPEND:
|
|
|
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
|
|
|
val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
|
|
|
|
| (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = {
|
|
|
|
.digital_mute = atmel_classd_codec_dai_digital_mute,
|
|
|
|
.startup = atmel_classd_codec_dai_startup,
|
|
|
|
.shutdown = atmel_classd_codec_dai_shutdown,
|
|
|
|
.hw_params = atmel_classd_codec_dai_hw_params,
|
|
|
|
.prepare = atmel_classd_codec_dai_prepare,
|
|
|
|
.trigger = atmel_classd_codec_dai_trigger,
|
|
|
|
};
|
|
|
|
|
|
|
|
#define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi"
|
|
|
|
|
|
|
|
static struct snd_soc_dai_driver atmel_classd_codec_dai = {
|
|
|
|
.name = ATMEL_CLASSD_CODEC_DAI_NAME,
|
|
|
|
.playback = {
|
|
|
|
.stream_name = "Playback",
|
2015-11-18 20:45:32 -07:00
|
|
|
.channels_min = 1,
|
2015-10-08 04:13:31 -06:00
|
|
|
.channels_max = 2,
|
|
|
|
.rates = ATMEL_CLASSD_RATES,
|
|
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE,
|
|
|
|
},
|
|
|
|
.ops = &atmel_classd_codec_dai_ops,
|
|
|
|
};
|
|
|
|
|
|
|
|
/* ASoC sound card */
|
|
|
|
static int atmel_classd_asoc_card_init(struct device *dev,
|
|
|
|
struct snd_soc_card *card)
|
|
|
|
{
|
|
|
|
struct snd_soc_dai_link *dai_link;
|
|
|
|
struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
|
|
|
|
|
|
|
|
dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
|
|
|
|
if (!dai_link)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dai_link->name = "CLASSD";
|
|
|
|
dai_link->stream_name = "CLASSD PCM";
|
|
|
|
dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME;
|
|
|
|
dai_link->cpu_dai_name = dev_name(dev);
|
|
|
|
dai_link->codec_name = dev_name(dev);
|
|
|
|
dai_link->platform_name = dev_name(dev);
|
|
|
|
|
|
|
|
card->dai_link = dai_link;
|
|
|
|
card->num_links = 1;
|
|
|
|
card->name = dd->pdata->card_name;
|
|
|
|
card->dev = dev;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* regmap configuration */
|
|
|
|
static const struct reg_default atmel_classd_reg_defaults[] = {
|
|
|
|
{ CLASSD_INTPMR, 0x00301212 },
|
|
|
|
};
|
|
|
|
|
|
|
|
#define ATMEL_CLASSD_REG_MAX 0xE4
|
|
|
|
static const struct regmap_config atmel_classd_regmap_config = {
|
|
|
|
.reg_bits = 32,
|
|
|
|
.reg_stride = 4,
|
|
|
|
.val_bits = 32,
|
|
|
|
.max_register = ATMEL_CLASSD_REG_MAX,
|
|
|
|
|
|
|
|
.cache_type = REGCACHE_FLAT,
|
|
|
|
.reg_defaults = atmel_classd_reg_defaults,
|
|
|
|
.num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults),
|
|
|
|
};
|
|
|
|
|
|
|
|
static int atmel_classd_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct atmel_classd *dd;
|
|
|
|
struct resource *res;
|
|
|
|
void __iomem *io_base;
|
|
|
|
const struct atmel_classd_pdata *pdata;
|
|
|
|
struct snd_soc_card *card;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
pdata = dev_get_platdata(dev);
|
|
|
|
if (!pdata) {
|
|
|
|
pdata = atmel_classd_dt_init(dev);
|
|
|
|
if (IS_ERR(pdata))
|
|
|
|
return PTR_ERR(pdata);
|
|
|
|
}
|
|
|
|
|
|
|
|
dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
|
|
|
|
if (!dd)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dd->pdata = pdata;
|
|
|
|
|
|
|
|
dd->irq = platform_get_irq(pdev, 0);
|
|
|
|
if (dd->irq < 0) {
|
|
|
|
ret = dd->irq;
|
|
|
|
dev_err(dev, "failed to could not get irq: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
dd->pclk = devm_clk_get(dev, "pclk");
|
|
|
|
if (IS_ERR(dd->pclk)) {
|
|
|
|
ret = PTR_ERR(dd->pclk);
|
|
|
|
dev_err(dev, "failed to get peripheral clock: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
dd->gclk = devm_clk_get(dev, "gclk");
|
|
|
|
if (IS_ERR(dd->gclk)) {
|
|
|
|
ret = PTR_ERR(dd->gclk);
|
|
|
|
dev_err(dev, "failed to get GCK clock: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
io_base = devm_ioremap_resource(dev, res);
|
2018-03-01 06:37:31 -07:00
|
|
|
if (IS_ERR(io_base))
|
|
|
|
return PTR_ERR(io_base);
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
dd->phy_base = res->start;
|
2018-01-28 19:44:05 -07:00
|
|
|
dd->dev = dev;
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
dd->regmap = devm_regmap_init_mmio(dev, io_base,
|
|
|
|
&atmel_classd_regmap_config);
|
|
|
|
if (IS_ERR(dd->regmap)) {
|
|
|
|
ret = PTR_ERR(dd->regmap);
|
|
|
|
dev_err(dev, "failed to init register map: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = devm_snd_soc_register_component(dev,
|
|
|
|
&atmel_classd_cpu_dai_component,
|
|
|
|
&atmel_classd_cpu_dai, 1);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "could not register CPU DAI: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = devm_snd_dmaengine_pcm_register(dev,
|
|
|
|
&atmel_classd_dmaengine_pcm_config,
|
|
|
|
0);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "could not register platform: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-01-28 21:27:39 -07:00
|
|
|
ret = devm_snd_soc_register_component(dev, &soc_component_dev_classd,
|
2015-10-08 04:13:31 -06:00
|
|
|
&atmel_classd_codec_dai, 1);
|
|
|
|
if (ret) {
|
2018-01-28 21:27:39 -07:00
|
|
|
dev_err(dev, "could not register component: %d\n", ret);
|
2015-10-08 04:13:31 -06:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* register sound card */
|
|
|
|
card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
|
2015-12-10 20:07:37 -07:00
|
|
|
if (!card) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto unregister_codec;
|
|
|
|
}
|
2015-10-08 04:13:31 -06:00
|
|
|
|
|
|
|
snd_soc_card_set_drvdata(card, dd);
|
|
|
|
|
|
|
|
ret = atmel_classd_asoc_card_init(dev, card);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "failed to init sound card\n");
|
2015-12-10 20:07:37 -07:00
|
|
|
goto unregister_codec;
|
2015-10-08 04:13:31 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = devm_snd_soc_register_card(dev, card);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "failed to register sound card: %d\n", ret);
|
2015-12-10 20:07:37 -07:00
|
|
|
goto unregister_codec;
|
2015-10-08 04:13:31 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2015-12-10 20:07:37 -07:00
|
|
|
|
|
|
|
unregister_codec:
|
|
|
|
return ret;
|
2015-10-08 04:13:31 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int atmel_classd_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver atmel_classd_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "atmel-classd",
|
|
|
|
.of_match_table = of_match_ptr(atmel_classd_of_match),
|
|
|
|
.pm = &snd_soc_pm_ops,
|
|
|
|
},
|
|
|
|
.probe = atmel_classd_probe,
|
|
|
|
.remove = atmel_classd_remove,
|
|
|
|
};
|
|
|
|
module_platform_driver(atmel_classd_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
|
|
|
|
MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|