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alistair23-linux/arch/arm/boot/dts/omap4.dtsi

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arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* Carveout for multimedia usecases
* It should be the last 48MB of the first 512MB memory part
* In theory, it should not even exist. That zone should be reserved
* dynamically during the .reserve callback.
*/
/memreserve/ 0x9d000000 0x03000000;
/include/ "skeleton.dtsi"
/ {
compatible = "ti,omap4430", "ti,omap4";
interrupt-parent = <&gic>;
aliases {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
};
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 03:49:08 -06:00
cpus {
cpu@0 {
compatible = "arm,cortex-a9";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 06:27:34 -06:00
next-level-cache = <&L2>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 03:49:08 -06:00
};
cpu@1 {
compatible = "arm,cortex-a9";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 06:27:34 -06:00
next-level-cache = <&L2>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 03:49:08 -06:00
};
};
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 06:27:34 -06:00
L2: l2-cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <2>;
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 03:49:08 -06:00
mpu {
compatible = "ti,omap4-mpu";
ti,hwmods = "mpu";
};
dsp {
compatible = "ti,omap3-c64";
ti,hwmods = "dsp";
};
iva {
compatible = "ti,ivahd";
ti,hwmods = "iva";
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
};
/*
* XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex.
*
* MPU -+-- MPU_PRIVATE - GIC, L2
* |
* +----------------+----------+
* | | |
* + +- EMIF - DDR |
* | | |
* | + +--------+
* | | |
* | +- L4_ABE - AESS, MCBSP, TIMERs...
* | |
* +- L3_MAIN --+- L4_CORE - IPs...
* |
* +- L4_PER - IPs...
* |
* +- L4_CFG -+- L4_WKUP - IPs...
* | |
* | +- IPs...
* +- IPU ----+
* | |
* +- DSP ----+
* | |
* +- DSS ----+
*
* Since that will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 05:48:47 -06:00
compatible = "ti,omap4-l3-noc", "simple-bus";
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
#address-cells = <1>;
#size-cells = <1>;
ranges;
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 05:48:47 -06:00
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
gic: interrupt-controller@48241000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
arm/dts: OMAP4: Update DTS file with new GIC bindings The GIC binding was updated in 3.2 and expects 3 interrupt-cells. - Update the #interrupt-cells Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
2011-11-25 04:11:52 -07:00
#interrupt-cells = <3>;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
reg = <0x48241000 0x1000>,
<0x48240100 0x0100>;
};
arm/dts: OMAP4: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP4. Remove gpio static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 03:51:54 -06:00
gpio1: gpio@4a310000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 03:55:27 -07:00
uart1: serial@4806a000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
compatible = "ti,omap4-uart";
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 03:55:27 -07:00
uart2: serial@4806c000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
compatible = "ti,omap4-uart";
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 03:55:27 -07:00
uart3: serial@48020000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
compatible = "ti,omap4-uart";
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 03:55:27 -07:00
uart4: serial@4806e000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 04:55:46 -07:00
compatible = "ti,omap4-uart";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
arm/dts: OMAP4: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-08-17 07:30:03 -06:00
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
};
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
};
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
};
i2c4: i2c@48350000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
};
arm/dts: OMAP4: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP4 device. Remove SPI static device initialisation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 06:15:58 -07:00
mcspi1: spi@48098000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>;
};
mcspi2: spi@4809a000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>;
};
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>;
};
mcspi4: spi@480ba000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>;
};
arm/dts: OMAP4: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP4. Currenly limited to only omap4-panda and omap4-sdp boards. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2011-10-04 05:40:27 -06:00
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc2";
ti,needs-special-reset;
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc3";
ti,needs-special-reset;
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc4";
ti,needs-special-reset;
};
mmc5: mmc@480d5000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc5";
ti,needs-special-reset;
};
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-31 22:44:14 -06:00
wdt2: wdt@4a314000 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 08:01:59 -06:00
mcpdm: mcpdm@40132000 {
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f>, /* MPU private access */
<0x49032000 0x7f>; /* L3 Interconnect */
interrupts = <0 112 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "mcpdm";
};
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 08:02:00 -06:00
dmic: dmic@4012e000 {
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f>, /* MPU private access */
<0x4902e000 0x7f>; /* L3 Interconnect */
interrupts = <0 114 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "dmic";
};
ARM: dts: omap4-sdp: Add keypad data Add keypad data node in omap4 device tree file. Also fill the device tree binding parameters with the required value in "omap4-sdp" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [b-cousson@ti.com: Re-align the entries and the comments]
2012-08-14 05:15:37 -06:00
keypad: keypad@4a31c000 {
compatible = "ti,omap4-keypad";
ti,hwmods = "kbd";
};
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 08:05:26 -07:00
emif1: emif@4c000000 {
compatible = "ti,emif-4d";
ti,hwmods = "emif1";
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
emif2: emif@4d000000 {
compatible = "ti,emif-4d";
ti,hwmods = "emif2";
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 09:15:17 -06:00
};
};