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alistair23-linux/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h

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MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
MIPS: Loongson: Change the Email address of Wu Zhangjin Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-04 02:16:51 -07:00
* Copyright (C) 2009 Wu Zhangjin <wuzhangjin@gmail.com>
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
* Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
* Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
*
* reference: /proc/cpuinfo,
MIPS: Whitespace cleanup. Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-22 04:59:30 -07:00
* arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
* arch/mips/kernel/proc.c(show_cpuinfo),
* loongson2f user manual.
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
*/
MIPS: Loongson: Naming style cleanup and rework Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-20 20:00:35 -06:00
#ifndef __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
#define cpu_has_32fpr 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_4kex 1
#define cpu_has_64bits 1
#define cpu_has_cache_cdex_p 0
#define cpu_has_cache_cdex_s 0
#define cpu_has_counter 1
MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-19 04:01:39 -06:00
#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
#define cpu_has_divec 0
#define cpu_has_ejtag 0
#define cpu_has_inclusive_pcaches 1
MIPS: Whitespace cleanup. Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-22 04:59:30 -07:00
#define cpu_has_llsc 1
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
#define cpu_has_mcheck 0
#define cpu_has_mdmx 0
#define cpu_has_mips16 0
#define cpu_has_mips3d 0
#define cpu_has_mipsmt 0
#define cpu_has_smartmips 0
#define cpu_has_tlb 1
#define cpu_has_tx39_cache 0
#define cpu_has_vce 0
MIPS: Loongson: update cpu-feature-overrides.h Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts (cpu_has_vint) and MIPSR2 external interrupt controller mode (cpu_has_veic) are 0. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 23:16:34 -06:00
#define cpu_has_veic 0
#define cpu_has_vint 0
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
#define cpu_has_vtag_icache 0
#define cpu_has_watch 1
MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem This and the next patch resolve memory corruption problems while CPU hotplug. Without these patches, memory corruption can triggered easily as below: On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http:// code.google.com/p/byte-unixbench/) and a CPU hotplug script like this (hotplug.sh): while true; do echo 0 >/sys/devices/system/cpu/cpu1/online echo 0 >/sys/devices/system/cpu/cpu2/online echo 0 >/sys/devices/system/cpu/cpu3/online sleep 1 echo 1 >/sys/devices/system/cpu/cpu1/online echo 1 >/sys/devices/system/cpu/cpu2/online echo 1 >/sys/devices/system/cpu/cpu3/online sleep 1 done Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault after a few minutes. This patch: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongbing Hu <huhb@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4994/ Acked-by: John Crispin <blogic@openwrt.org>
2013-03-17 05:49:38 -06:00
#define cpu_has_local_ebase 0
MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-04-02 01:41:45 -06:00
MIPS: Loongson: Add Loongson-3A R2 basic support Loongson-3 CPU family: Code-name Brand-name PRId Loongson-3A R1 Loongson-3A1000 0x6305 Loongson-3A R2 Loongson-3A2000 0x6308 Loongson-3B R1 Loongson-3B1000 0x6306 Loongson-3B R2 Loongson-3B1500 0x6307 Features of R2 revision of Loongson-3A: - Primary cache includes I-Cache, D-Cache and V-Cache (Victim Cache). - I-Cache, D-Cache and V-Cache are 16-way set-associative, linesize is 64 bytes. - 64 entries of VTLB (classic TLB), 1024 entries of FTLB (8-way set-associative). - Supports DSP/DSPv2 instructions, UserLocal register and Read-Inhibit/ Execute-Inhibit. [ralf@linux-mips.org: Resolved merge conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Steven J . Hill <sjhill@realitydiluted.com> Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12751/ Patchwork: https://patchwork.linux-mips.org/patch/13136/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-03-02 18:45:09 -07:00
#ifdef CONFIG_CPU_LOONGSON3
#define cpu_has_wsbh 1
#define cpu_has_ic_fills_f_dc 1
#define cpu_hwrena_impl_bits 0xc0000000
#endif
MIPS: Use WSBH/DSBH/DSHD on Loongson 3A Signed-off-by: chenj <chenj@lemote.com> Cc: linux-mips@linux-mips.org Cc: chenhc@lemote.com Patchwork: https://patchwork.linux-mips.org/patch/7542/ Patchwork: https://patchwork.linux-mips.org/patch/7550/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-15 02:56:58 -06:00
MIPS: Loongson: Naming style cleanup and rework Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-20 20:00:35 -06:00
#endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */