2018-01-10 08:21:13 -07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2020-07-08 01:47:08 -06:00
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/*
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* Internals of the DMA direct mapping implementation. Only for use by the
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* DMA mapping code and IOMMU drivers.
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*/
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2018-01-10 08:21:13 -07:00
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#ifndef _LINUX_DMA_DIRECT_H
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#define _LINUX_DMA_DIRECT_H 1
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#include <linux/dma-mapping.h>
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2020-07-08 01:47:08 -06:00
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#include <linux/dma-noncoherent.h>
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2019-11-07 08:06:44 -07:00
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#include <linux/memblock.h> /* for min_low_pfn */
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2018-03-19 04:38:24 -06:00
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#include <linux/mem_encrypt.h>
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2020-07-08 01:47:08 -06:00
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#include <linux/swiotlb.h>
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2018-01-10 08:21:13 -07:00
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2019-10-14 12:31:03 -06:00
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extern unsigned int zone_dma_bits;
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2018-01-10 08:21:13 -07:00
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#ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA
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#include <asm/dma-direct.h>
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#else
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2018-03-19 04:38:24 -06:00
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static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
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2018-01-10 08:21:13 -07:00
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{
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dma_addr_t dev_addr = (dma_addr_t)paddr;
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return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
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}
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2018-03-19 04:38:24 -06:00
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static inline phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dev_addr)
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2018-01-10 08:21:13 -07:00
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{
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phys_addr_t paddr = (phys_addr_t)dev_addr;
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return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
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}
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2019-11-12 09:06:04 -07:00
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#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */
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2018-01-10 08:21:13 -07:00
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2019-07-10 13:01:19 -06:00
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#ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED
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bool force_dma_unencrypted(struct device *dev);
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#else
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static inline bool force_dma_unencrypted(struct device *dev)
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{
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return false;
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}
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#endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */
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2018-03-19 04:38:24 -06:00
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/*
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* If memory encryption is supported, phys_to_dma will set the memory encryption
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* bit in the DMA address, and dma_to_phys will clear it. The raw __phys_to_dma
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* and __dma_to_phys versions should only be used on non-encrypted memory for
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* special occasions like DMA coherent buffers.
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*/
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return __sme_set(__phys_to_dma(dev, paddr));
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return __sme_clr(__dma_to_phys(dev, daddr));
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}
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2019-11-19 09:38:58 -07:00
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size,
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bool is_ram)
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{
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dma_addr_t end = addr + size - 1;
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if (!dev->dma_mask)
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return false;
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2019-11-19 09:38:58 -07:00
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if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &&
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2019-11-12 09:07:43 -07:00
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min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn)))
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return false;
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2019-11-21 02:26:44 -07:00
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return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit);
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2019-11-12 09:07:43 -07:00
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}
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2018-09-20 05:26:13 -06:00
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u64 dma_direct_get_required_mask(struct device *dev);
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2017-12-23 05:46:06 -07:00
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void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs);
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void dma_direct_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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2018-09-08 03:22:43 -06:00
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void *dma_direct_alloc_pages(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs);
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void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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2019-10-29 04:01:37 -06:00
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int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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bool dma_direct_can_mmap(struct device *dev);
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int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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2017-12-24 07:04:32 -07:00
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int dma_direct_supported(struct device *dev, u64 mask);
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2020-06-29 07:03:56 -06:00
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bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr);
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2020-07-08 01:45:11 -06:00
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int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir, unsigned long attrs);
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size_t dma_direct_max_mapping_size(struct device *dev);
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2020-07-08 01:45:11 -06:00
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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defined(CONFIG_SWIOTLB)
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2020-07-08 01:47:08 -06:00
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void dma_direct_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir);
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2020-07-08 01:45:11 -06:00
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#else
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static inline void dma_direct_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
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defined(CONFIG_SWIOTLB)
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void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir, unsigned long attrs);
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void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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#else
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static inline void dma_direct_unmap_sg(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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}
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2020-07-08 01:47:08 -06:00
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static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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static inline void dma_direct_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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phys_addr_t paddr = dma_to_phys(dev, addr);
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if (unlikely(is_swiotlb_buffer(paddr)))
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swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
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if (!dev_is_dma_coherent(dev))
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arch_sync_dma_for_device(paddr, size, dir);
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}
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2020-07-08 01:45:11 -06:00
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static inline void dma_direct_sync_single_for_cpu(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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2020-07-08 01:47:08 -06:00
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phys_addr_t paddr = dma_to_phys(dev, addr);
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if (!dev_is_dma_coherent(dev)) {
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arch_sync_dma_for_cpu(paddr, size, dir);
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arch_sync_dma_for_cpu_all();
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}
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if (unlikely(is_swiotlb_buffer(paddr)))
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swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
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}
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static inline dma_addr_t dma_direct_map_page(struct device *dev,
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struct page *page, unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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phys_addr_t phys = page_to_phys(page) + offset;
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dma_addr_t dma_addr = phys_to_dma(dev, phys);
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if (unlikely(swiotlb_force == SWIOTLB_FORCE))
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return swiotlb_map(dev, phys, size, dir, attrs);
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if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
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if (swiotlb_force != SWIOTLB_NO_FORCE)
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return swiotlb_map(dev, phys, size, dir, attrs);
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dev_WARN_ONCE(dev, 1,
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"DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
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&dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
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return DMA_MAPPING_ERROR;
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}
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if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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arch_sync_dma_for_device(phys, size, dir);
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return dma_addr;
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2020-07-08 01:45:11 -06:00
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}
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2020-07-08 01:47:08 -06:00
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static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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phys_addr_t phys = dma_to_phys(dev, addr);
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2020-07-08 01:45:11 -06:00
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2020-07-08 01:47:08 -06:00
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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dma_direct_sync_single_for_cpu(dev, addr, size, dir);
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if (unlikely(is_swiotlb_buffer(phys)))
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swiotlb_tbl_unmap_single(dev, phys, size, size, dir, attrs);
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}
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2018-01-10 08:21:13 -07:00
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#endif /* _LINUX_DMA_DIRECT_H */
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