2014-08-11 22:00:16 -06:00
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/*
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* GPIO Greybus driver.
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*
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* Copyright 2014 Google Inc.
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2014-12-12 11:08:42 -07:00
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* Copyright 2014 Linaro Ltd.
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2014-08-11 22:00:16 -06:00
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*
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* Released under the GPLv2 only.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/gpio.h>
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2015-02-17 08:48:23 -07:00
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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2015-05-26 07:29:24 -06:00
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#include <linux/mutex.h>
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2014-08-11 22:00:16 -06:00
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#include "greybus.h"
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2014-10-16 05:35:39 -06:00
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struct gb_gpio_line {
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/* The following has to be an array of line_max entries */
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/* --> make them just a flags field */
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u8 active: 1,
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direction: 1, /* 0 = output, 1 = input */
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value: 1; /* 0 = low, 1 = high */
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u16 debounce_usec;
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2015-05-26 07:29:24 -06:00
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u8 irq_type;
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bool irq_type_pending;
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bool masked;
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bool masked_pending;
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2014-10-16 05:35:39 -06:00
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};
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struct gb_gpio_controller {
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struct gb_connection *connection;
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u8 version_major;
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u8 version_minor;
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u8 line_max; /* max line number */
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struct gb_gpio_line *lines;
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struct gpio_chip chip;
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2015-02-17 08:48:23 -07:00
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struct irq_chip irqc;
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struct irq_chip *irqchip;
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struct irq_domain *irqdomain;
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unsigned int irq_base;
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irq_flow_handler_t irq_handler;
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unsigned int irq_default_type;
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2015-05-26 07:29:24 -06:00
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struct mutex irq_lock;
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2014-10-16 05:35:39 -06:00
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};
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#define gpio_chip_to_gb_gpio_controller(chip) \
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container_of(chip, struct gb_gpio_controller, chip)
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2015-02-17 08:48:23 -07:00
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#define irq_data_to_gpio_chip(d) (d->domain->host_data)
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2014-10-16 05:35:39 -06:00
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2015-01-21 05:42:36 -07:00
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/* Define get_version() routine */
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define_get_version(gb_gpio_controller, GPIO);
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2014-10-16 05:35:39 -06:00
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_line_count_operation(struct gb_gpio_controller *ggc)
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2014-08-11 22:00:16 -06:00
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_line_count_response response;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_LINE_COUNT,
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NULL, 0, &response, sizeof(response));
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if (!ret)
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ggc->line_max = response.count;
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2014-10-16 05:35:39 -06:00
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return ret;
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_activate_operation(struct gb_gpio_controller *ggc, u8 which)
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2014-10-16 05:35:39 -06:00
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_activate_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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request.which = which;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_ACTIVATE,
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&request, sizeof(request), NULL, 0);
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if (!ret)
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ggc->lines[which].active = true;
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2014-10-16 05:35:39 -06:00
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return ret;
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}
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2015-03-19 09:51:15 -06:00
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static void gb_gpio_deactivate_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_deactivate_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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request.which = which;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DEACTIVATE,
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&request, sizeof(request), NULL, 0);
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2015-03-19 09:55:23 -06:00
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if (ret) {
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dev_err(ggc->chip.dev, "failed to deactivate gpio %u\n",
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which);
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return;
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}
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ggc->lines[which].active = false;
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2014-10-16 05:35:39 -06:00
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_get_direction_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_get_direction_request request;
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struct gb_gpio_get_direction_response response;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-21 18:29:12 -07:00
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u8 direction;
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2014-10-16 05:35:39 -06:00
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2014-11-23 18:45:22 -07:00
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request.which = which;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_GET_DIRECTION,
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&request, sizeof(request),
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&response, sizeof(response));
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if (ret)
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return ret;
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2014-10-16 05:35:39 -06:00
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2014-11-23 18:45:22 -07:00
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direction = response.direction;
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2015-03-19 09:51:16 -06:00
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if (direction && direction != 1) {
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dev_warn(ggc->chip.dev,
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"gpio %u direction was %u (should be 0 or 1)\n",
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which, direction);
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}
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2014-11-23 18:45:22 -07:00
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ggc->lines[which].direction = direction ? 1 : 0;
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return 0;
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2014-10-16 05:35:39 -06:00
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_direction_in_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_direction_in_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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request.which = which;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DIRECTION_IN,
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&request, sizeof(request), NULL, 0);
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if (!ret)
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ggc->lines[which].direction = 1;
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2014-10-16 05:35:39 -06:00
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return ret;
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_direction_out_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which, bool value_high)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_direction_out_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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request.which = which;
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request.value = value_high ? 1 : 0;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DIRECTION_OUT,
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&request, sizeof(request), NULL, 0);
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if (!ret)
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ggc->lines[which].direction = 0;
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2014-10-16 05:35:39 -06:00
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return ret;
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_get_value_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_get_value_request request;
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struct gb_gpio_get_value_response response;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-21 18:29:12 -07:00
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u8 value;
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2014-10-16 05:35:39 -06:00
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2014-11-23 18:45:22 -07:00
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request.which = which;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_GET_VALUE,
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&request, sizeof(request),
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&response, sizeof(response));
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2015-03-19 09:55:23 -06:00
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if (ret) {
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dev_err(ggc->chip.dev, "failed to get value of gpio %u\n",
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which);
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2014-11-23 18:45:22 -07:00
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return ret;
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2015-03-19 09:55:23 -06:00
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}
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2014-10-16 05:35:39 -06:00
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2014-11-23 18:45:22 -07:00
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value = response.value;
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2015-03-19 09:51:16 -06:00
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if (value && value != 1) {
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dev_warn(ggc->chip.dev,
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"gpio %u value was %u (should be 0 or 1)\n",
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which, value);
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}
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2014-11-23 18:45:22 -07:00
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ggc->lines[which].value = value ? 1 : 0;
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return 0;
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2014-10-16 05:35:39 -06:00
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}
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2015-03-19 09:51:15 -06:00
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static void gb_gpio_set_value_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which, bool value_high)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_set_value_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2015-03-19 09:55:22 -06:00
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if (ggc->lines[which].direction == 1) {
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dev_warn(ggc->chip.dev,
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"refusing to set value of input gpio %u\n", which);
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return;
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}
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2014-11-23 18:45:22 -07:00
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request.which = which;
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request.value = value_high ? 1 : 0;
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_SET_VALUE,
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&request, sizeof(request), NULL, 0);
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2015-03-19 09:55:23 -06:00
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if (ret) {
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dev_err(ggc->chip.dev, "failed to set value of gpio %u\n",
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which);
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return;
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}
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ggc->lines[which].value = request.value;
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2014-10-16 05:35:39 -06:00
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}
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2014-11-23 18:45:22 -07:00
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static int gb_gpio_set_debounce_operation(struct gb_gpio_controller *ggc,
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2014-10-16 05:35:39 -06:00
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u8 which, u16 debounce_usec)
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{
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2014-11-23 18:45:22 -07:00
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struct gb_gpio_set_debounce_request request;
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2014-10-16 05:35:39 -06:00
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int ret;
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2014-11-23 18:45:22 -07:00
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request.which = which;
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request.usec = cpu_to_le16(debounce_usec);
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ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_SET_DEBOUNCE,
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&request, sizeof(request), NULL, 0);
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if (!ret)
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ggc->lines[which].debounce_usec = debounce_usec;
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2014-10-16 05:35:39 -06:00
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return ret;
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}
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2015-05-26 07:29:24 -06:00
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static void _gb_gpio_irq_mask(struct gb_gpio_controller *ggc, u8 hwirq)
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2015-02-17 08:48:23 -07:00
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{
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struct gb_gpio_irq_mask_request request;
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int ret;
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2015-05-26 07:29:24 -06:00
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request.which = hwirq;
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2015-02-17 08:48:23 -07:00
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ret = gb_operation_sync(ggc->connection,
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GB_GPIO_TYPE_IRQ_MASK,
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&request, sizeof(request), NULL, 0);
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if (ret)
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2015-05-26 07:29:24 -06:00
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dev_err(ggc->chip.dev, "failed to mask irq: %d\n", ret);
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2015-02-17 08:48:23 -07:00
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}
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2015-05-26 07:29:24 -06:00
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static void _gb_gpio_irq_unmask(struct gb_gpio_controller *ggc, u8 hwirq)
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2015-02-17 08:48:23 -07:00
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{
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struct gb_gpio_irq_unmask_request request;
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int ret;
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2015-05-26 07:29:24 -06:00
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request.which = hwirq;
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2015-02-17 08:48:23 -07:00
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ret = gb_operation_sync(ggc->connection,
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GB_GPIO_TYPE_IRQ_UNMASK,
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&request, sizeof(request), NULL, 0);
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if (ret)
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2015-05-26 07:29:24 -06:00
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dev_err(ggc->chip.dev, "failed to unmask irq: %d\n", ret);
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2015-02-17 08:48:23 -07:00
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}
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2015-05-26 07:29:24 -06:00
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static void _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc,
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u8 hwirq, u8 type)
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2015-02-17 08:48:23 -07:00
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{
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struct gb_gpio_irq_type_request request;
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2015-05-26 07:29:24 -06:00
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int ret;
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2015-02-17 08:48:23 -07:00
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2015-05-26 07:29:24 -06:00
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request.which = hwirq;
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2015-02-17 08:48:23 -07:00
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request.type = type;
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2015-05-26 07:29:24 -06:00
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ret = gb_operation_sync(ggc->connection,
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GB_GPIO_TYPE_IRQ_TYPE,
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&request, sizeof(request), NULL, 0);
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if (ret)
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dev_err(ggc->chip.dev, "failed to set irq type: %d\n", ret);
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}
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static void gb_gpio_irq_mask(struct irq_data *d)
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{
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struct gpio_chip *chip = irq_data_to_gpio_chip(d);
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struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
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struct gb_gpio_line *line = &ggc->lines[d->hwirq];
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line->masked = true;
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line->masked_pending = true;
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}
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static void gb_gpio_irq_unmask(struct irq_data *d)
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{
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struct gpio_chip *chip = irq_data_to_gpio_chip(d);
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struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
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struct gb_gpio_line *line = &ggc->lines[d->hwirq];
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line->masked = false;
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line->masked_pending = true;
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}
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static int gb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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{
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struct gpio_chip *chip = irq_data_to_gpio_chip(d);
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struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
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struct gb_gpio_line *line = &ggc->lines[d->hwirq];
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2015-05-28 11:03:34 -06:00
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u8 irq_type;
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2015-05-26 07:29:24 -06:00
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2015-02-17 08:48:23 -07:00
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switch (type) {
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case IRQ_TYPE_NONE:
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2015-05-28 11:03:34 -06:00
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irq_type = GB_GPIO_IRQ_TYPE_NONE;
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|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
case IRQ_TYPE_EDGE_RISING:
|
2015-05-28 11:03:34 -06:00
|
|
|
irq_type = GB_GPIO_IRQ_TYPE_EDGE_RISING;
|
|
|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
case IRQ_TYPE_EDGE_FALLING:
|
2015-05-28 11:03:34 -06:00
|
|
|
irq_type = GB_GPIO_IRQ_TYPE_EDGE_FALLING;
|
|
|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
case IRQ_TYPE_EDGE_BOTH:
|
2015-05-28 11:03:34 -06:00
|
|
|
irq_type = GB_GPIO_IRQ_TYPE_EDGE_BOTH;
|
|
|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
case IRQ_TYPE_LEVEL_LOW:
|
2015-05-28 11:03:34 -06:00
|
|
|
irq_type = GB_GPIO_IRQ_TYPE_LEVEL_LOW;
|
|
|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
case IRQ_TYPE_LEVEL_HIGH:
|
2015-05-28 11:03:34 -06:00
|
|
|
irq_type = GB_GPIO_IRQ_TYPE_LEVEL_HIGH;
|
2015-05-20 05:02:28 -06:00
|
|
|
break;
|
2015-02-17 08:48:23 -07:00
|
|
|
default:
|
2015-03-19 09:51:16 -06:00
|
|
|
dev_err(chip->dev, "unsupported irq type: %u\n", type);
|
2015-05-26 07:29:24 -06:00
|
|
|
return -EINVAL;
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
|
|
|
|
2015-05-28 11:03:34 -06:00
|
|
|
line->irq_type = irq_type;
|
2015-05-26 07:29:24 -06:00
|
|
|
line->irq_type_pending = true;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gb_gpio_irq_bus_lock(struct irq_data *d)
|
|
|
|
{
|
|
|
|
struct gpio_chip *chip = irq_data_to_gpio_chip(d);
|
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
|
|
|
|
|
|
|
mutex_lock(&ggc->irq_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gb_gpio_irq_bus_sync_unlock(struct irq_data *d)
|
|
|
|
{
|
|
|
|
struct gpio_chip *chip = irq_data_to_gpio_chip(d);
|
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
|
|
|
struct gb_gpio_line *line = &ggc->lines[d->hwirq];
|
|
|
|
|
|
|
|
if (line->irq_type_pending) {
|
|
|
|
_gb_gpio_irq_set_type(ggc, d->hwirq, line->irq_type);
|
|
|
|
line->irq_type_pending = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (line->masked_pending) {
|
|
|
|
if (line->masked)
|
|
|
|
_gb_gpio_irq_mask(ggc, d->hwirq);
|
|
|
|
else
|
|
|
|
_gb_gpio_irq_unmask(ggc, d->hwirq);
|
|
|
|
line->masked_pending = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&ggc->irq_lock);
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
|
|
|
|
2015-03-27 05:45:49 -06:00
|
|
|
static int gb_gpio_request_recv(u8 type, struct gb_operation *op)
|
2015-02-17 08:48:23 -07:00
|
|
|
{
|
2015-03-19 09:51:16 -06:00
|
|
|
struct gb_connection *connection = op->connection;
|
2015-03-27 05:45:43 -06:00
|
|
|
struct gb_gpio_controller *ggc = connection->private;
|
2015-02-17 08:48:23 -07:00
|
|
|
struct gb_message *request;
|
|
|
|
struct gb_gpio_irq_event_request *event;
|
|
|
|
int irq;
|
|
|
|
struct irq_desc *desc;
|
|
|
|
|
|
|
|
if (type != GB_GPIO_TYPE_IRQ_EVENT) {
|
2015-03-19 09:51:16 -06:00
|
|
|
dev_err(&connection->dev,
|
|
|
|
"unsupported unsolicited request: %u\n", type);
|
2015-03-27 05:45:49 -06:00
|
|
|
return -EINVAL;
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
request = op->request;
|
2015-03-27 05:45:41 -06:00
|
|
|
|
|
|
|
if (request->payload_size < sizeof(*event)) {
|
|
|
|
dev_err(ggc->chip.dev, "short event received\n");
|
2015-03-27 05:45:49 -06:00
|
|
|
return -EINVAL;
|
2015-03-27 05:45:41 -06:00
|
|
|
}
|
|
|
|
|
2015-02-17 08:48:23 -07:00
|
|
|
event = request->payload;
|
|
|
|
if (event->which > ggc->line_max) {
|
2015-03-19 09:51:16 -06:00
|
|
|
dev_err(ggc->chip.dev, "invalid hw irq: %d\n", event->which);
|
2015-03-27 05:45:49 -06:00
|
|
|
return -EINVAL;
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
2015-03-27 05:45:49 -06:00
|
|
|
|
2015-05-26 07:29:22 -06:00
|
|
|
irq = irq_find_mapping(ggc->irqdomain, event->which);
|
|
|
|
if (!irq) {
|
|
|
|
dev_err(ggc->chip.dev, "failed to find IRQ\n");
|
2015-03-27 05:45:49 -06:00
|
|
|
return -EINVAL;
|
2015-03-27 05:45:42 -06:00
|
|
|
}
|
2015-02-17 08:48:23 -07:00
|
|
|
desc = irq_to_desc(irq);
|
2015-03-27 05:45:42 -06:00
|
|
|
if (!desc) {
|
|
|
|
dev_err(ggc->chip.dev, "failed to look up irq\n");
|
2015-03-27 05:45:49 -06:00
|
|
|
return -EINVAL;
|
2015-03-27 05:45:42 -06:00
|
|
|
}
|
2015-02-17 08:48:23 -07:00
|
|
|
|
|
|
|
local_irq_disable();
|
2015-05-26 07:29:21 -06:00
|
|
|
generic_handle_irq_desc(irq, desc);
|
2015-02-17 08:48:23 -07:00
|
|
|
local_irq_enable();
|
|
|
|
|
2015-03-27 05:45:49 -06:00
|
|
|
return 0;
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
static int gb_gpio_request(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
return gb_gpio_activate_operation(ggc, (u8)offset);
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
static void gb_gpio_free(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
gb_gpio_deactivate_operation(ggc, (u8)offset);
|
2014-10-16 05:35:39 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int gb_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
u8 which;
|
|
|
|
int ret;
|
|
|
|
|
2014-10-20 04:39:45 -06:00
|
|
|
which = (u8)offset;
|
2015-03-19 09:51:14 -06:00
|
|
|
ret = gb_gpio_get_direction_operation(ggc, which);
|
2014-10-16 05:35:39 -06:00
|
|
|
if (ret)
|
2015-03-19 09:51:15 -06:00
|
|
|
return ret;
|
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
return ggc->lines[which].direction ? 1 : 0;
|
2014-10-16 05:35:39 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int gb_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
2014-08-11 22:00:16 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
return gb_gpio_direction_in_operation(ggc, (u8)offset);
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
static int gb_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
|
|
|
|
int value)
|
2014-08-11 22:00:16 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
return gb_gpio_direction_out_operation(ggc, (u8)offset, !!value);
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
static int gb_gpio_get(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
u8 which;
|
|
|
|
int ret;
|
|
|
|
|
2014-10-20 04:39:45 -06:00
|
|
|
which = (u8)offset;
|
2015-03-19 09:51:14 -06:00
|
|
|
ret = gb_gpio_get_value_operation(ggc, which);
|
2014-10-16 05:35:39 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2015-03-19 09:51:15 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
return ggc->lines[which].value;
|
2014-10-16 05:35:39 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static void gb_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
2014-08-11 22:00:16 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
gb_gpio_set_value_operation(ggc, (u8)offset, !!value);
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
static int gb_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
|
|
|
|
unsigned debounce)
|
2014-08-11 22:00:16 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
2014-10-16 05:35:39 -06:00
|
|
|
u16 usec;
|
|
|
|
|
2015-03-19 09:51:09 -06:00
|
|
|
if (debounce > U16_MAX)
|
2014-10-16 05:35:39 -06:00
|
|
|
return -EINVAL;
|
2015-03-19 09:51:09 -06:00
|
|
|
usec = (u16)debounce;
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:15 -06:00
|
|
|
return gb_gpio_set_debounce_operation(ggc, (u8)offset, usec);
|
2014-10-16 05:35:39 -06:00
|
|
|
}
|
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
static int gb_gpio_controller_setup(struct gb_gpio_controller *ggc)
|
2014-10-16 05:35:39 -06:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* First thing we need to do is check the version */
|
2015-03-19 09:51:14 -06:00
|
|
|
ret = get_version(ggc);
|
2014-10-16 05:35:39 -06:00
|
|
|
if (ret)
|
2015-03-19 09:51:15 -06:00
|
|
|
return ret;
|
2014-10-16 05:35:39 -06:00
|
|
|
|
|
|
|
/* Now find out how many lines there are */
|
2015-03-19 09:51:14 -06:00
|
|
|
ret = gb_gpio_line_count_operation(ggc);
|
2014-10-16 05:35:39 -06:00
|
|
|
if (ret)
|
2015-03-19 09:51:15 -06:00
|
|
|
return ret;
|
|
|
|
|
2015-03-19 09:51:17 -06:00
|
|
|
ggc->lines = kcalloc(ggc->line_max + 1, sizeof(*ggc->lines),
|
|
|
|
GFP_KERNEL);
|
2015-03-19 09:51:14 -06:00
|
|
|
if (!ggc->lines)
|
2014-10-16 05:35:39 -06:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-02-17 08:48:23 -07:00
|
|
|
/**
|
|
|
|
* gb_gpio_irq_map() - maps an IRQ into a GB gpio irqchip
|
|
|
|
* @d: the irqdomain used by this irqchip
|
|
|
|
* @irq: the global irq number used by this GB gpio irqchip irq
|
|
|
|
* @hwirq: the local IRQ/GPIO line offset on this GB gpio
|
|
|
|
*
|
|
|
|
* This function will set up the mapping for a certain IRQ line on a
|
|
|
|
* GB gpio by assigning the GB gpio as chip data, and using the irqchip
|
|
|
|
* stored inside the GB gpio.
|
|
|
|
*/
|
|
|
|
static int gb_gpio_irq_map(struct irq_domain *domain, unsigned int irq,
|
|
|
|
irq_hw_number_t hwirq)
|
|
|
|
{
|
|
|
|
struct gpio_chip *chip = domain->host_data;
|
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
|
|
|
|
|
|
|
irq_set_chip_data(irq, ggc);
|
|
|
|
irq_set_chip_and_handler(irq, ggc->irqchip, ggc->irq_handler);
|
|
|
|
#ifdef CONFIG_ARM
|
|
|
|
set_irq_flags(irq, IRQF_VALID);
|
|
|
|
#else
|
|
|
|
irq_set_noprobe(irq);
|
|
|
|
#endif
|
|
|
|
/*
|
|
|
|
* No set-up of the hardware will happen if IRQ_TYPE_NONE
|
|
|
|
* is passed as default type.
|
|
|
|
*/
|
|
|
|
if (ggc->irq_default_type != IRQ_TYPE_NONE)
|
|
|
|
irq_set_irq_type(irq, ggc->irq_default_type);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gb_gpio_irq_unmap(struct irq_domain *d, unsigned int irq)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARM
|
|
|
|
set_irq_flags(irq, 0);
|
|
|
|
#endif
|
|
|
|
irq_set_chip_and_handler(irq, NULL, NULL);
|
|
|
|
irq_set_chip_data(irq, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct irq_domain_ops gb_gpio_domain_ops = {
|
|
|
|
.map = gb_gpio_irq_map,
|
|
|
|
.unmap = gb_gpio_irq_unmap,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* gb_gpio_irqchip_remove() - removes an irqchip added to a gb_gpio_controller
|
|
|
|
* @ggc: the gb_gpio_controller to remove the irqchip from
|
|
|
|
*
|
|
|
|
* This is called only from gb_gpio_remove()
|
|
|
|
*/
|
|
|
|
static void gb_gpio_irqchip_remove(struct gb_gpio_controller *ggc)
|
|
|
|
{
|
|
|
|
unsigned int offset;
|
|
|
|
|
|
|
|
/* Remove all IRQ mappings and delete the domain */
|
|
|
|
if (ggc->irqdomain) {
|
|
|
|
for (offset = 0; offset < (ggc->line_max + 1); offset++)
|
|
|
|
irq_dispose_mapping(irq_find_mapping(ggc->irqdomain, offset));
|
|
|
|
irq_domain_remove(ggc->irqdomain);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ggc->irqchip) {
|
|
|
|
ggc->irqchip = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* gb_gpio_irqchip_add() - adds an irqchip to a gpio chip
|
|
|
|
* @chip: the gpio chip to add the irqchip to
|
|
|
|
* @irqchip: the irqchip to add to the adapter
|
|
|
|
* @first_irq: if not dynamically assigned, the base (first) IRQ to
|
|
|
|
* allocate gpio irqs from
|
|
|
|
* @handler: the irq handler to use (often a predefined irq core function)
|
|
|
|
* @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
|
|
|
|
* to have the core avoid setting up any default type in the hardware.
|
|
|
|
*
|
|
|
|
* This function closely associates a certain irqchip with a certain
|
|
|
|
* gpio chip, providing an irq domain to translate the local IRQs to
|
|
|
|
* global irqs, and making sure that the gpio chip
|
|
|
|
* is passed as chip data to all related functions. Driver callbacks
|
|
|
|
* need to use container_of() to get their local state containers back
|
|
|
|
* from the gpio chip passed as chip data. An irqdomain will be stored
|
|
|
|
* in the gpio chip that shall be used by the driver to handle IRQ number
|
|
|
|
* translation. The gpio chip will need to be initialized and registered
|
|
|
|
* before calling this function.
|
|
|
|
*/
|
|
|
|
static int gb_gpio_irqchip_add(struct gpio_chip *chip,
|
|
|
|
struct irq_chip *irqchip,
|
|
|
|
unsigned int first_irq,
|
|
|
|
irq_flow_handler_t handler,
|
|
|
|
unsigned int type)
|
|
|
|
{
|
|
|
|
struct gb_gpio_controller *ggc;
|
|
|
|
unsigned int offset;
|
|
|
|
unsigned irq_base;
|
|
|
|
|
|
|
|
if (!chip || !irqchip)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ggc = gpio_chip_to_gb_gpio_controller(chip);
|
|
|
|
|
|
|
|
ggc->irqchip = irqchip;
|
|
|
|
ggc->irq_handler = handler;
|
|
|
|
ggc->irq_default_type = type;
|
|
|
|
ggc->irqdomain = irq_domain_add_simple(NULL,
|
|
|
|
ggc->line_max + 1, first_irq,
|
|
|
|
&gb_gpio_domain_ops, chip);
|
|
|
|
if (!ggc->irqdomain) {
|
|
|
|
ggc->irqchip = NULL;
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Prepare the mapping since the irqchip shall be orthogonal to
|
|
|
|
* any gpio calls. If the first_irq was zero, this is
|
|
|
|
* necessary to allocate descriptors for all IRQs.
|
|
|
|
*/
|
|
|
|
for (offset = 0; offset < (ggc->line_max + 1); offset++) {
|
|
|
|
irq_base = irq_create_mapping(ggc->irqdomain, offset);
|
|
|
|
if (offset == 0)
|
|
|
|
ggc->irq_base = irq_base;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gb_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
|
|
|
|
{
|
|
|
|
struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
|
|
|
|
|
|
|
|
return irq_find_mapping(ggc->irqdomain, offset);
|
|
|
|
}
|
|
|
|
|
2014-10-27 05:04:30 -06:00
|
|
|
static int gb_gpio_connection_init(struct gb_connection *connection)
|
2014-10-16 05:35:39 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc;
|
2014-08-11 22:00:16 -06:00
|
|
|
struct gpio_chip *gpio;
|
2015-02-17 08:48:23 -07:00
|
|
|
struct irq_chip *irqc;
|
2014-10-16 05:35:39 -06:00
|
|
|
int ret;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
ggc = kzalloc(sizeof(*ggc), GFP_KERNEL);
|
|
|
|
if (!ggc)
|
2014-08-11 22:00:16 -06:00
|
|
|
return -ENOMEM;
|
2015-03-19 09:51:14 -06:00
|
|
|
ggc->connection = connection;
|
|
|
|
connection->private = ggc;
|
2014-10-16 05:35:39 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
ret = gb_gpio_controller_setup(ggc);
|
2014-10-16 05:35:39 -06:00
|
|
|
if (ret)
|
2015-02-12 23:58:04 -07:00
|
|
|
goto err_free_controller;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
irqc = &ggc->irqc;
|
2015-05-26 07:29:23 -06:00
|
|
|
irqc->irq_mask = gb_gpio_irq_mask;
|
|
|
|
irqc->irq_unmask = gb_gpio_irq_unmask;
|
2015-02-17 08:48:23 -07:00
|
|
|
irqc->irq_set_type = gb_gpio_irq_set_type;
|
2015-05-26 07:29:24 -06:00
|
|
|
irqc->irq_bus_lock = gb_gpio_irq_bus_lock;
|
|
|
|
irqc->irq_bus_sync_unlock = gb_gpio_irq_bus_sync_unlock;
|
2015-02-17 08:48:23 -07:00
|
|
|
irqc->name = "greybus_gpio";
|
|
|
|
|
2015-05-26 07:29:24 -06:00
|
|
|
mutex_init(&ggc->irq_lock);
|
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
gpio = &ggc->chip;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
|
|
|
gpio->label = "greybus_gpio";
|
2015-02-17 08:48:23 -07:00
|
|
|
gpio->dev = &connection->dev;
|
2015-03-19 09:51:10 -06:00
|
|
|
gpio->owner = THIS_MODULE;
|
2014-10-16 05:35:39 -06:00
|
|
|
|
|
|
|
gpio->request = gb_gpio_request;
|
|
|
|
gpio->free = gb_gpio_free;
|
|
|
|
gpio->get_direction = gb_gpio_get_direction;
|
|
|
|
gpio->direction_input = gb_gpio_direction_input;
|
|
|
|
gpio->direction_output = gb_gpio_direction_output;
|
|
|
|
gpio->get = gb_gpio_get;
|
|
|
|
gpio->set = gb_gpio_set;
|
|
|
|
gpio->set_debounce = gb_gpio_set_debounce;
|
2015-02-17 08:48:23 -07:00
|
|
|
gpio->to_irq = gb_gpio_to_irq;
|
2014-10-16 05:35:39 -06:00
|
|
|
gpio->base = -1; /* Allocate base dynamically */
|
2015-03-19 09:51:14 -06:00
|
|
|
gpio->ngpio = ggc->line_max + 1;
|
2015-03-19 09:51:10 -06:00
|
|
|
gpio->can_sleep = true;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
2014-10-16 05:35:39 -06:00
|
|
|
ret = gpiochip_add(gpio);
|
|
|
|
if (ret) {
|
2015-03-19 09:51:16 -06:00
|
|
|
dev_err(&connection->dev, "failed to add gpio chip: %d\n",
|
|
|
|
ret);
|
2015-02-12 23:58:04 -07:00
|
|
|
goto err_free_lines;
|
2015-02-17 08:48:23 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = gb_gpio_irqchip_add(gpio, irqc, 0,
|
2015-05-26 07:29:25 -06:00
|
|
|
handle_level_irq, IRQ_TYPE_NONE);
|
2015-02-17 08:48:23 -07:00
|
|
|
if (ret) {
|
2015-03-19 09:51:16 -06:00
|
|
|
dev_err(&connection->dev, "failed to add irq chip: %d\n", ret);
|
2015-02-17 08:48:23 -07:00
|
|
|
goto irqchip_err;
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2015-02-17 08:48:23 -07:00
|
|
|
|
|
|
|
irqchip_err:
|
|
|
|
gb_gpiochip_remove(gpio);
|
2015-02-12 23:58:04 -07:00
|
|
|
err_free_lines:
|
2015-03-19 09:51:14 -06:00
|
|
|
kfree(ggc->lines);
|
2015-02-12 23:58:04 -07:00
|
|
|
err_free_controller:
|
2015-03-19 09:51:14 -06:00
|
|
|
kfree(ggc);
|
2014-10-16 05:35:39 -06:00
|
|
|
return ret;
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-10-27 05:04:30 -06:00
|
|
|
static void gb_gpio_connection_exit(struct gb_connection *connection)
|
2014-08-11 22:00:16 -06:00
|
|
|
{
|
2015-03-19 09:51:14 -06:00
|
|
|
struct gb_gpio_controller *ggc = connection->private;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
if (!ggc)
|
2014-10-16 05:35:24 -06:00
|
|
|
return;
|
2014-08-11 22:00:16 -06:00
|
|
|
|
2015-03-19 09:51:14 -06:00
|
|
|
gb_gpio_irqchip_remove(ggc);
|
|
|
|
gb_gpiochip_remove(&ggc->chip);
|
|
|
|
/* kref_put(ggc->connection) */
|
|
|
|
kfree(ggc->lines);
|
|
|
|
kfree(ggc);
|
2014-08-11 22:00:16 -06:00
|
|
|
}
|
|
|
|
|
2014-11-05 15:12:53 -07:00
|
|
|
static struct gb_protocol gpio_protocol = {
|
2014-12-24 14:01:45 -07:00
|
|
|
.name = "gpio",
|
2014-11-05 15:12:53 -07:00
|
|
|
.id = GREYBUS_PROTOCOL_GPIO,
|
|
|
|
.major = 0,
|
|
|
|
.minor = 1,
|
2014-11-05 15:12:54 -07:00
|
|
|
.connection_init = gb_gpio_connection_init,
|
|
|
|
.connection_exit = gb_gpio_connection_exit,
|
2015-02-17 08:48:23 -07:00
|
|
|
.request_recv = gb_gpio_request_recv,
|
2014-11-05 15:12:53 -07:00
|
|
|
};
|
|
|
|
|
2015-07-01 00:43:52 -06:00
|
|
|
gb_builtin_protocol_driver(gpio_protocol);
|