alistair23-linux/arch/arm/boot/dts/qcom-msm8660.dtsi

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 08:07:57 -06:00
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "skeleton.dtsi"
ARM: dts: MSM8660 remove flags from SPMI/MPP IRQs The Qualcomm SPMI GPIO and MPP lines are problematic: the are fetched from the main MFD driver with platform_get_irq() which means that at this point they will all be assigned the flags set up for the interrupts in the device tree. That is problematic since these are flagged as rising edge and an this point the interrupt descriptor is assigned a rising edge, while the only thing the GPIO/MPP drivers really do is issue irq_get_irqchip_state() on the line to read it out and to provide a .to_irq() helper for *other* IRQ consumers. If another device tree node tries to flag the same IRQ for use as something else than rising edge, the kernel irqdomain core will protest like this: type mismatch, failed to map hwirq-NN for <FOO>! Which is what happens when the device tree defines two contradictory flags for the same interrupt line. To work around this and alleviate the problem, assign 0 as flag for the interrupts taken by the PM GPIO and MPP drivers. This will lead to the flag being unset, and a second consumer requesting rising, falling, both or level interrupts will be respected. This is what the qcom-pm*.dtsi files already do. Switched to using the symbolic name IRQ_TYPE_NONE so that we get this more readable. This misconfiguration was caused by a copy/pasting the APQ8064 set-up, the latter has been fixed in a separate patch. Tested with one of the SPMI GPIOs: after this I can successfully request one of these GPIOs as falling edge from the device tree. Fixes: 0840ea9e4457 ("ARM: dts: add GPIO and MPP to MSM8660 PMIC") Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-05 02:38:38 -06:00
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8660.h>
#include <dt-bindings/soc/qcom,gsbi.h>
/ {
model = "Qualcomm MSM8660";
compatible = "qcom,msm8660";
interrupt-parent = <&intc>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "qcom,scorpion";
enable-method = "qcom,gcc-msm8660";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "qcom,scorpion";
enable-method = "qcom,gcc-msm8660";
device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
};
};
cpu-pmu {
compatible = "qcom,scorpion-mp-pmu";
interrupts = <1 9 0x304>;
};
clocks {
cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
/*
* These channels from the ADC are simply hardware monitors.
* That is why the ADC is referred to as "HKADC" - HouseKeeping
* ADC.
*/
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&xoadc 0x00 0x01>, /* Battery */
<&xoadc 0x00 0x02>, /* DC in (charger) */
<&xoadc 0x00 0x04>, /* VPH the main system voltage */
<&xoadc 0x00 0x0b>, /* Die temperature */
<&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */
<&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */
<&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "simple-bus";
intc: interrupt-controller@2080000 {
compatible = "qcom,msm-8660-qgic";
interrupt-controller;
#interrupt-cells = <3>;
reg = < 0x02080000 0x1000 >,
< 0x02081000 0x1000 >;
};
timer@2000000 {
compatible = "qcom,scss-timer", "qcom,msm-timer";
interrupts = <1 0 0x301>,
<1 1 0x301>,
<1 2 0x301>;
reg = <0x02000000 0x100>;
clock-frequency = <27000000>,
<32768>;
cpu-offset = <0x40000>;
};
tlmm: pinctrl@800000 {
compatible = "qcom,msm8660-pinctrl";
reg = <0x800000 0x4000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 16 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8660";
#clock-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
gsbi6: gsbi@16500000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
reg = <0x16500000 0x100>;
clocks = <&gcc GSBI6_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon-tcsr = <&tcsr>;
gsbi6_serial: serial@16540000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16540000 0x1000>,
<0x16500000 0x1000>;
interrupts = <GIC_SPI 156 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
gsbi6_i2c: i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16580000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
gsbi7: gsbi@16600000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
reg = <0x16600000 0x100>;
clocks = <&gcc GSBI7_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon-tcsr = <&tcsr>;
gsbi7_serial: serial@16640000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16640000 0x1000>,
<0x16600000 0x1000>;
interrupts = <GIC_SPI 158 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
gsbi7_i2c: i2c@16680000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16680000 0x1000>;
interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
gsbi8: gsbi@19800000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
reg = <0x19800000 0x100>;
clocks = <&gcc GSBI8_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon-tcsr = <&tcsr>;
gsbi8_i2c: i2c@19880000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x19880000 0x1000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
gsbi12: gsbi@19c00000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <12>;
reg = <0x19c00000 0x100>;
clocks = <&gcc GSBI12_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
syscon-tcsr = <&tcsr>;
gsbi12_serial: serial@19c40000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x19c40000 0x1000>,
<0x19c00000 0x1000>;
interrupts = <0 195 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
gsbi12_i2c: i2c@19c80000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x19c80000 0x1000>;
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
external-bus@1a100000 {
compatible = "qcom,msm8660-ebi2";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0x0 0x1a800000 0x00800000>,
<1 0x0 0x1b000000 0x00800000>,
<2 0x0 0x1b800000 0x00800000>,
<3 0x0 0x1d000000 0x08000000>,
<4 0x0 0x1c800000 0x00800000>,
<5 0x0 0x1c000000 0x00800000>;
reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
reg-names = "ebi2", "xmem";
clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>;
clock-names = "ebi2x", "ebi2";
status = "disabled";
};
qcom,ssbi@500000 {
compatible = "qcom,ssbi";
reg = <0x500000 0x1000>;
qcom,controller-type = "pmic-arbiter";
pm8058: pmic@0 {
compatible = "qcom,pm8058";
interrupt-parent = <&tlmm>;
interrupts = <88 8>;
#interrupt-cells = <2>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
pm8058_gpio: gpio@150 {
compatible = "qcom,pm8058-gpio",
"qcom,ssbi-gpio";
reg = <0x150>;
interrupt-parent = <&pm8058>;
ARM: dts: MSM8660 remove flags from SPMI/MPP IRQs The Qualcomm SPMI GPIO and MPP lines are problematic: the are fetched from the main MFD driver with platform_get_irq() which means that at this point they will all be assigned the flags set up for the interrupts in the device tree. That is problematic since these are flagged as rising edge and an this point the interrupt descriptor is assigned a rising edge, while the only thing the GPIO/MPP drivers really do is issue irq_get_irqchip_state() on the line to read it out and to provide a .to_irq() helper for *other* IRQ consumers. If another device tree node tries to flag the same IRQ for use as something else than rising edge, the kernel irqdomain core will protest like this: type mismatch, failed to map hwirq-NN for <FOO>! Which is what happens when the device tree defines two contradictory flags for the same interrupt line. To work around this and alleviate the problem, assign 0 as flag for the interrupts taken by the PM GPIO and MPP drivers. This will lead to the flag being unset, and a second consumer requesting rising, falling, both or level interrupts will be respected. This is what the qcom-pm*.dtsi files already do. Switched to using the symbolic name IRQ_TYPE_NONE so that we get this more readable. This misconfiguration was caused by a copy/pasting the APQ8064 set-up, the latter has been fixed in a separate patch. Tested with one of the SPMI GPIOs: after this I can successfully request one of these GPIOs as falling edge from the device tree. Fixes: 0840ea9e4457 ("ARM: dts: add GPIO and MPP to MSM8660 PMIC") Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-05 02:38:38 -06:00
interrupts = <192 IRQ_TYPE_NONE>,
<193 IRQ_TYPE_NONE>,
<194 IRQ_TYPE_NONE>,
<195 IRQ_TYPE_NONE>,
<196 IRQ_TYPE_NONE>,
<197 IRQ_TYPE_NONE>,
<198 IRQ_TYPE_NONE>,
<199 IRQ_TYPE_NONE>,
<200 IRQ_TYPE_NONE>,
<201 IRQ_TYPE_NONE>,
<202 IRQ_TYPE_NONE>,
<203 IRQ_TYPE_NONE>,
<204 IRQ_TYPE_NONE>,
<205 IRQ_TYPE_NONE>,
<206 IRQ_TYPE_NONE>,
<207 IRQ_TYPE_NONE>,
<208 IRQ_TYPE_NONE>,
<209 IRQ_TYPE_NONE>,
<210 IRQ_TYPE_NONE>,
<211 IRQ_TYPE_NONE>,
<212 IRQ_TYPE_NONE>,
<213 IRQ_TYPE_NONE>,
<214 IRQ_TYPE_NONE>,
<215 IRQ_TYPE_NONE>,
<216 IRQ_TYPE_NONE>,
<217 IRQ_TYPE_NONE>,
<218 IRQ_TYPE_NONE>,
<219 IRQ_TYPE_NONE>,
<220 IRQ_TYPE_NONE>,
<221 IRQ_TYPE_NONE>,
<222 IRQ_TYPE_NONE>,
<223 IRQ_TYPE_NONE>,
<224 IRQ_TYPE_NONE>,
<225 IRQ_TYPE_NONE>,
<226 IRQ_TYPE_NONE>,
<227 IRQ_TYPE_NONE>,
<228 IRQ_TYPE_NONE>,
<229 IRQ_TYPE_NONE>,
<230 IRQ_TYPE_NONE>,
<231 IRQ_TYPE_NONE>,
<232 IRQ_TYPE_NONE>,
<233 IRQ_TYPE_NONE>,
<234 IRQ_TYPE_NONE>,
<235 IRQ_TYPE_NONE>;
gpio-controller;
#gpio-cells = <2>;
};
pm8058_mpps: mpps@50 {
compatible = "qcom,pm8058-mpp",
"qcom,ssbi-mpp";
reg = <0x50>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&pm8058>;
interrupts =
ARM: dts: MSM8660 remove flags from SPMI/MPP IRQs The Qualcomm SPMI GPIO and MPP lines are problematic: the are fetched from the main MFD driver with platform_get_irq() which means that at this point they will all be assigned the flags set up for the interrupts in the device tree. That is problematic since these are flagged as rising edge and an this point the interrupt descriptor is assigned a rising edge, while the only thing the GPIO/MPP drivers really do is issue irq_get_irqchip_state() on the line to read it out and to provide a .to_irq() helper for *other* IRQ consumers. If another device tree node tries to flag the same IRQ for use as something else than rising edge, the kernel irqdomain core will protest like this: type mismatch, failed to map hwirq-NN for <FOO>! Which is what happens when the device tree defines two contradictory flags for the same interrupt line. To work around this and alleviate the problem, assign 0 as flag for the interrupts taken by the PM GPIO and MPP drivers. This will lead to the flag being unset, and a second consumer requesting rising, falling, both or level interrupts will be respected. This is what the qcom-pm*.dtsi files already do. Switched to using the symbolic name IRQ_TYPE_NONE so that we get this more readable. This misconfiguration was caused by a copy/pasting the APQ8064 set-up, the latter has been fixed in a separate patch. Tested with one of the SPMI GPIOs: after this I can successfully request one of these GPIOs as falling edge from the device tree. Fixes: 0840ea9e4457 ("ARM: dts: add GPIO and MPP to MSM8660 PMIC") Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-05 02:38:38 -06:00
<128 IRQ_TYPE_NONE>,
<129 IRQ_TYPE_NONE>,
<130 IRQ_TYPE_NONE>,
<131 IRQ_TYPE_NONE>,
<132 IRQ_TYPE_NONE>,
<133 IRQ_TYPE_NONE>,
<134 IRQ_TYPE_NONE>,
<135 IRQ_TYPE_NONE>,
<136 IRQ_TYPE_NONE>,
<137 IRQ_TYPE_NONE>,
<138 IRQ_TYPE_NONE>,
<139 IRQ_TYPE_NONE>;
};
pwrkey@1c {
compatible = "qcom,pm8058-pwrkey";
reg = <0x1c>;
interrupt-parent = <&pm8058>;
interrupts = <50 1>, <51 1>;
debounce = <15625>;
pull-up;
};
keypad@148 {
compatible = "qcom,pm8058-keypad";
reg = <0x148>;
interrupt-parent = <&pm8058>;
interrupts = <74 1>, <75 1>;
debounce = <15>;
scan-delay = <32>;
row-hold = <91500>;
};
xoadc: xoadc@197 {
compatible = "qcom,pm8058-adc";
reg = <0x197>;
interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>;
#address-cells = <2>;
#size-cells = <0>;
#io-channel-cells = <2>;
vcoin: adc-channel@0 {
reg = <0x00 0x00>;
};
vbat: adc-channel@1 {
reg = <0x00 0x01>;
};
dcin: adc-channel@2 {
reg = <0x00 0x02>;
};
ichg: adc-channel@3 {
reg = <0x00 0x03>;
};
vph_pwr: adc-channel@4 {
reg = <0x00 0x04>;
};
usb_vbus: adc-channel@a {
reg = <0x00 0x0a>;
};
die_temp: adc-channel@b {
reg = <0x00 0x0b>;
};
ref_625mv: adc-channel@c {
reg = <0x00 0x0c>;
};
ref_1250mv: adc-channel@d {
reg = <0x00 0x0d>;
};
ref_325mv: adc-channel@e {
reg = <0x00 0x0e>;
};
ref_muxoff: adc-channel@f {
reg = <0x00 0x0f>;
};
};
rtc@1e8 {
compatible = "qcom,pm8058-rtc";
reg = <0x1e8>;
interrupt-parent = <&pm8058>;
interrupts = <39 1>;
allow-set-time;
};
vibrator@4a {
compatible = "qcom,pm8058-vib";
reg = <0x4a>;
};
};
};
l2cc: clock-controller@2082000 {
compatible = "syscon";
reg = <0x02082000 0x1000>;
};
rpm: rpm@104000 {
compatible = "qcom,rpm-msm8660";
reg = <0x00104000 0x1000>;
qcom,ipc = <&l2cc 0x8 2>;
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ack", "err", "wakeup";
clocks = <&gcc RPM_MSG_RAM_H_CLK>;
clock-names = "ram";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc";
#clock-cells = <1>;
};
pm8901-regulators {
compatible = "qcom,rpm-pm8901-regulators";
pm8901_l0: l0 {};
pm8901_l1: l1 {};
pm8901_l2: l2 {};
pm8901_l3: l3 {};
pm8901_l4: l4 {};
pm8901_l5: l5 {};
pm8901_l6: l6 {};
/* S0 and S1 Handled as SAW regulators by SPM */
pm8901_s2: s2 {};
pm8901_s3: s3 {};
pm8901_s4: s4 {};
pm8901_lvs0: lvs0 {};
pm8901_lvs1: lvs1 {};
pm8901_lvs2: lvs2 {};
pm8901_lvs3: lvs3 {};
pm8901_mvs: mvs {};
};
pm8058-regulators {
compatible = "qcom,rpm-pm8058-regulators";
pm8058_l0: l0 {};
pm8058_l1: l1 {};
pm8058_l2: l2 {};
pm8058_l3: l3 {};
pm8058_l4: l4 {};
pm8058_l5: l5 {};
pm8058_l6: l6 {};
pm8058_l7: l7 {};
pm8058_l8: l8 {};
pm8058_l9: l9 {};
pm8058_l10: l10 {};
pm8058_l11: l11 {};
pm8058_l12: l12 {};
pm8058_l13: l13 {};
pm8058_l14: l14 {};
pm8058_l15: l15 {};
pm8058_l16: l16 {};
pm8058_l17: l17 {};
pm8058_l18: l18 {};
pm8058_l19: l19 {};
pm8058_l20: l20 {};
pm8058_l21: l21 {};
pm8058_l22: l22 {};
pm8058_l23: l23 {};
pm8058_l24: l24 {};
pm8058_l25: l25 {};
pm8058_s0: s0 {};
pm8058_s1: s1 {};
pm8058_s2: s2 {};
pm8058_s3: s3 {};
pm8058_s4: s4 {};
pm8058_lvs0: lvs0 {};
pm8058_lvs1: lvs1 {};
pm8058_ncp: ncp {};
};
};
amba {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sdcc1: sdcc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
reg = <0x12400000 0x8000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <8>;
max-frequency = <48000000>;
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
};
sdcc2: sdcc@12140000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
reg = <0x12140000 0x8000>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <8>;
max-frequency = <48000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
};
sdcc3: sdcc@12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x12180000 0x8000>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <48000000>;
no-1-8-v;
};
sdcc4: sdcc@121c0000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x121c0000 0x8000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
max-frequency = <48000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
};
sdcc5: sdcc@12200000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";
reg = <0x12200000 0x8000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>;
clock-names = "mclk", "apb_pclk";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <48000000>;
};
};
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-msm8660", "syscon";
reg = <0x1a400000 0x100>;
};
};
};