2009-10-14 16:13:45 -06:00
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/*******************************************************************************
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STMMAC Ethernet Driver -- MDIO bus implementation
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Provides Bus interface for MII registers
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Carl Shaw <carl.shaw@st.com>
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Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/mii.h>
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#include <linux/phy.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2009-10-14 16:13:45 -06:00
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#include "stmmac.h"
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#define MII_BUSY 0x00000001
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#define MII_WRITE 0x00000002
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/**
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* stmmac_mdio_read
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* @bus: points to the mii_bus structure
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* @phyaddr: MII addr reg bits 15-11
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* @phyreg: MII addr reg bits 10-6
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* Description: it reads data from the MII register from within the phy device.
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* For the 7111 GMAC, we must set the bit 0 in the MII address register while
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* accessing the PHY registers.
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* Fortunately, it seems this has no drawback for the 7109 MAC.
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*/
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static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
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{
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struct net_device *ndev = bus->priv;
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struct stmmac_priv *priv = netdev_priv(ndev);
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unsigned long ioaddr = ndev->base_addr;
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2010-01-06 16:07:17 -07:00
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unsigned int mii_address = priv->hw->mii.addr;
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unsigned int mii_data = priv->hw->mii.data;
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2009-10-14 16:13:45 -06:00
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int data;
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u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
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((phyreg << 6) & (0x000007C0)));
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regValue |= MII_BUSY; /* in case of GMAC */
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do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
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writel(regValue, ioaddr + mii_address);
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do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
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/* Read the data from the MII data register */
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data = (int)readl(ioaddr + mii_data);
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return data;
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}
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/**
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* stmmac_mdio_write
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* @bus: points to the mii_bus structure
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* @phyaddr: MII addr reg bits 15-11
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* @phyreg: MII addr reg bits 10-6
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* @phydata: phy data
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* Description: it writes the data into the MII register from within the device.
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*/
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static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
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u16 phydata)
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{
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struct net_device *ndev = bus->priv;
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struct stmmac_priv *priv = netdev_priv(ndev);
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unsigned long ioaddr = ndev->base_addr;
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2010-01-06 16:07:17 -07:00
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unsigned int mii_address = priv->hw->mii.addr;
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unsigned int mii_data = priv->hw->mii.data;
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2009-10-14 16:13:45 -06:00
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u16 value =
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(((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
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| MII_WRITE;
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value |= MII_BUSY;
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/* Wait until any existing MII operation is complete */
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do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
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/* Set the MII address register to write */
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writel(phydata, ioaddr + mii_data);
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writel(value, ioaddr + mii_address);
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/* Wait until any existing MII operation is complete */
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do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
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return 0;
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}
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/**
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* stmmac_mdio_reset
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* @bus: points to the mii_bus structure
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* Description: reset the MII bus
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*/
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static int stmmac_mdio_reset(struct mii_bus *bus)
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{
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struct net_device *ndev = bus->priv;
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struct stmmac_priv *priv = netdev_priv(ndev);
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unsigned long ioaddr = ndev->base_addr;
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2010-01-06 16:07:17 -07:00
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unsigned int mii_address = priv->hw->mii.addr;
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2009-10-14 16:13:45 -06:00
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if (priv->phy_reset) {
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pr_debug("stmmac_mdio_reset: calling phy_reset\n");
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priv->phy_reset(priv->bsp_priv);
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}
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/* This is a workaround for problems with the STE101P PHY.
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* It doesn't complete its reset until at least one clock cycle
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* on MDC, so perform a dummy mdio read.
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*/
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writel(0, ioaddr + mii_address);
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return 0;
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}
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/**
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* stmmac_mdio_register
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* @ndev: net device structure
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* Description: it registers the MII bus
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*/
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int stmmac_mdio_register(struct net_device *ndev)
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{
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int err = 0;
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struct mii_bus *new_bus;
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int *irqlist;
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struct stmmac_priv *priv = netdev_priv(ndev);
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int addr, found;
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new_bus = mdiobus_alloc();
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if (new_bus == NULL)
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return -ENOMEM;
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irqlist = kzalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
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if (irqlist == NULL) {
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err = -ENOMEM;
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goto irqlist_alloc_fail;
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}
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/* Assign IRQ to phy at address phy_addr */
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if (priv->phy_addr != -1)
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irqlist[priv->phy_addr] = priv->phy_irq;
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new_bus->name = "STMMAC MII Bus";
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new_bus->read = &stmmac_mdio_read;
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new_bus->write = &stmmac_mdio_write;
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new_bus->reset = &stmmac_mdio_reset;
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
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new_bus->priv = ndev;
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new_bus->irq = irqlist;
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new_bus->phy_mask = priv->phy_mask;
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new_bus->parent = priv->device;
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err = mdiobus_register(new_bus);
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if (err != 0) {
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pr_err("%s: Cannot register as MDIO bus\n", new_bus->name);
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goto bus_register_fail;
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}
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priv->mii = new_bus;
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found = 0;
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for (addr = 0; addr < 32; addr++) {
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struct phy_device *phydev = new_bus->phy_map[addr];
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if (phydev) {
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if (priv->phy_addr == -1) {
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priv->phy_addr = addr;
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phydev->irq = priv->phy_irq;
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irqlist[addr] = priv->phy_irq;
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}
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pr_info("%s: PHY ID %08x at %d IRQ %d (%s)%s\n",
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ndev->name, phydev->phy_id, addr,
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phydev->irq, dev_name(&phydev->dev),
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(addr == priv->phy_addr) ? " active" : "");
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found = 1;
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}
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}
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if (!found)
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pr_warning("%s: No PHY found\n", ndev->name);
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return 0;
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bus_register_fail:
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kfree(irqlist);
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irqlist_alloc_fail:
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kfree(new_bus);
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return err;
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}
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/**
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* stmmac_mdio_unregister
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* @ndev: net device structure
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* Description: it unregisters the MII bus
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*/
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int stmmac_mdio_unregister(struct net_device *ndev)
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{
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struct stmmac_priv *priv = netdev_priv(ndev);
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mdiobus_unregister(priv->mii);
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priv->mii->priv = NULL;
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kfree(priv->mii);
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return 0;
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}
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