2005-04-16 16:20:36 -06:00
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/*
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* $Id: hd64465_ss.c,v 1.7 2003/07/06 14:42:50 lethal Exp $
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*
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* Device driver for the PCMCIA controller module of the
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* Hitachi HD64465 handheld companion chip.
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*
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* Note that the HD64465 provides a very thin PCMCIA host bridge
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* layer, requiring a lot of the work of supporting cards to be
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* performed by the processor. For example: mapping of card
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* interrupts to processor IRQs is done by IRQ demuxing software;
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* IO and memory mappings are fixed; setting voltages according
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* to card Voltage Select pins etc is done in software.
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*
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* Note also that this driver uses only the simple, fixed,
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* 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
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* HD64465. Larger mappings, smaller mappings, or mappings of
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* different width to the same socket, are all possible only by
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* involving the SH7750's MMU, which is considered unnecessary here.
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* The downside is that it may be possible for some drivers to
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* break because they need or expect 8-bit mappings.
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*
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* This driver currently supports only the following configuration:
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* SH7750 CPU, HD64465, TPS2206 voltage control chip.
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*
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* by Greg Banks <gbanks@pocketpenguins.com>
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* (c) 2000 PocketPenguins Inc
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <asm/errno.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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2005-10-29 12:07:23 -06:00
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#include <linux/platform_device.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/io.h>
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#include <asm/hd64465/hd64465.h>
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#include <asm/hd64465/io.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/ds.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/bulkmem.h>
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#include "cs_internal.h"
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#define MODNAME "hd64465_ss"
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/* #define HD64465_DEBUG 1 */
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#if HD64465_DEBUG
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#define DPRINTK(args...) printk(MODNAME ": " args)
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#else
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#define DPRINTK(args...)
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#endif
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extern int hd64465_io_debug;
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extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
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extern void p3_iounmap(void *addr);
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/*============================================================*/
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#define HS_IO_MAP_SIZE (64*1024)
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typedef struct hs_socket_t
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{
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unsigned int number;
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u_int irq;
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u_long mem_base;
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void *io_base;
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u_long mem_length;
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u_int ctrl_base;
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socket_state_t state;
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pccard_io_map io_maps[MAX_IO_WIN];
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pccard_mem_map mem_maps[MAX_WIN];
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struct pcmcia_socket socket;
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} hs_socket_t;
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#define HS_MAX_SOCKETS 2
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static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
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#define hs_in(sp, r) inb((sp)->ctrl_base + (r))
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#define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
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/* translate a boolean value to a bit in a register */
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#define bool_to_regbit(sp, r, bi, bo) \
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do { \
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unsigned short v = hs_in(sp, r); \
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if (bo) \
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v |= (bi); \
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else \
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v &= ~(bi); \
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hs_out(sp, v, r); \
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} while(0)
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/* register offsets from HD64465_REG_PCC[01]ISR */
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#define ISR 0x0
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#define GCR 0x2
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#define CSCR 0x4
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#define CSCIER 0x6
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#define SCR 0x8
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/* Mask and values for CSCIER register */
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#define IER_MASK 0x80
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#define IER_ON 0x3f /* interrupts on */
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#define IER_OFF 0x00 /* interrupts off */
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/*============================================================*/
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#if HD64465_DEBUG > 10
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static void cis_hex_dump(const unsigned char *x, int len)
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{
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int i;
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for (i=0 ; i<len ; i++)
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{
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if (!(i & 0xf))
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printk("\n%08x", (unsigned)(x + i));
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printk(" %02x", *(volatile unsigned short*)x);
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x += 2;
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}
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printk("\n");
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}
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#endif
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/*============================================================*/
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/*
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* This code helps create the illusion that the IREQ line from
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* the PC card is mapped to one of the CPU's IRQ lines by the
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* host bridge hardware (which is how every host bridge *except*
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* the HD64465 works). In particular, it supports enabling
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* and disabling the IREQ line by code which knows nothing
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* about the host bridge (e.g. device drivers, IDE code) using
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* the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
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* functions. Also, it supports sharing the mapped IRQ with
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* real hardware IRQs from the -IRL0-3 lines.
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*/
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#define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
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static struct
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{
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/* index is mapped irq number */
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hs_socket_t *sock;
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hw_irq_controller *old_handler;
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} hs_mapped_irq[HS_NUM_MAPPED_IRQS];
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static void hs_socket_enable_ireq(hs_socket_t *sp)
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{
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unsigned short cscier;
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DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
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cscier = hs_in(sp, CSCIER);
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cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
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cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
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hs_out(sp, cscier, CSCIER);
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}
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static void hs_socket_disable_ireq(hs_socket_t *sp)
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{
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unsigned short cscier;
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DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
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cscier = hs_in(sp, CSCIER);
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cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
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hs_out(sp, cscier, CSCIER);
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}
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static unsigned int hs_startup_irq(unsigned int irq)
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{
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hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
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hs_mapped_irq[irq].old_handler->startup(irq);
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return 0;
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}
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static void hs_shutdown_irq(unsigned int irq)
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{
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hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
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hs_mapped_irq[irq].old_handler->shutdown(irq);
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}
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static void hs_enable_irq(unsigned int irq)
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{
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hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
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hs_mapped_irq[irq].old_handler->enable(irq);
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}
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static void hs_disable_irq(unsigned int irq)
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{
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hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
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hs_mapped_irq[irq].old_handler->disable(irq);
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}
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extern struct hw_interrupt_type no_irq_type;
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static void hs_mask_and_ack_irq(unsigned int irq)
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{
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hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
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/* ack_none() spuriously complains about an unexpected IRQ */
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if (hs_mapped_irq[irq].old_handler != &no_irq_type)
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hs_mapped_irq[irq].old_handler->ack(irq);
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}
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static void hs_end_irq(unsigned int irq)
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{
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hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
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hs_mapped_irq[irq].old_handler->end(irq);
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}
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static struct hw_interrupt_type hd64465_ss_irq_type = {
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.typename = "PCMCIA-IRQ",
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.startup = hs_startup_irq,
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.shutdown = hs_shutdown_irq,
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.enable = hs_enable_irq,
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.disable = hs_disable_irq,
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.ack = hs_mask_and_ack_irq,
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.end = hs_end_irq
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};
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/*
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* This function should only ever be called with interrupts disabled.
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*/
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static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
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{
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DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
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if (irq >= HS_NUM_MAPPED_IRQS)
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return;
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hs_mapped_irq[irq].sock = sp;
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/* insert ourselves as the irq controller */
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hs_mapped_irq[irq].old_handler = irq_desc[irq].handler;
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irq_desc[irq].handler = &hd64465_ss_irq_type;
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}
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/*
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* This function should only ever be called with interrupts disabled.
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*/
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static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
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{
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DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
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if (irq >= HS_NUM_MAPPED_IRQS)
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return;
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/* restore the original irq controller */
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irq_desc[irq].handler = hs_mapped_irq[irq].old_handler;
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}
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/*============================================================*/
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/*
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* Set Vpp and Vcc (in tenths of a Volt). Does not
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* support the hi-Z state.
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*
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* Note, this assumes the board uses a TPS2206 chip to control
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* the Vcc and Vpp voltages to the hs_sockets. If your board
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* uses the MIC2563 (also supported by the HD64465) then you
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* will have to modify this function.
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*/
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/* 0V 3.3V 5.5V */
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static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
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static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
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static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
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{
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u_int psr;
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u_int vcci = 0;
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u_int sock = sp->number;
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DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
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switch (Vcc)
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{
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case 0: vcci = 0; break;
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case 33: vcci = 1; break;
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case 50: vcci = 2; break;
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default: return 0;
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}
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/* Note: Vpp = 120 not supported -- Greg Banks */
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if (Vpp != 0 && Vpp != Vcc)
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return 0;
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/* The PSR register holds 8 of the 9 bits which control
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* the TPS2206 via its serial interface.
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*/
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psr = inw(HD64465_REG_PCCPSR);
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switch (sock)
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{
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case 0:
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psr &= 0x0f;
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psr |= hs_tps2206_avcc[vcci];
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psr |= (Vpp == 0 ? 0x00 : 0x02);
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break;
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case 1:
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psr &= 0xf0;
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psr |= hs_tps2206_bvcc[vcci];
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psr |= (Vpp == 0 ? 0x00 : 0x20);
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break;
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};
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outw(psr, HD64465_REG_PCCPSR);
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return 1;
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}
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/*============================================================*/
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/*
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* Drive the RESET line to the card.
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*/
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static void hs_reset_socket(hs_socket_t *sp, int on)
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{
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unsigned short v;
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v = hs_in(sp, GCR);
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if (on)
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v |= HD64465_PCCGCR_PCCR;
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else
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v &= ~HD64465_PCCGCR_PCCR;
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hs_out(sp, v, GCR);
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}
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/*============================================================*/
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static int hs_init(struct pcmcia_socket *s)
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{
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hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
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DPRINTK("hs_init(%d)\n", sp->number);
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return 0;
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}
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/*============================================================*/
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static int hs_get_status(struct pcmcia_socket *s, u_int *value)
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{
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hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
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unsigned int isr;
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u_int status = 0;
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isr = hs_in(sp, ISR);
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/* Card is seated and powered when *both* CD pins are low */
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if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
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{
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status |= SS_DETECT; /* card present */
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switch (isr & HD64465_PCCISR_PBVD_MASK)
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{
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case HD64465_PCCISR_PBVD_BATGOOD:
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break;
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|
|
case HD64465_PCCISR_PBVD_BATWARN:
|
|
|
|
status |= SS_BATWARN;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
status |= SS_BATDEAD;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (isr & HD64465_PCCISR_PREADY)
|
|
|
|
status |= SS_READY;
|
|
|
|
|
|
|
|
if (isr & HD64465_PCCISR_PMWP)
|
|
|
|
status |= SS_WRPROT;
|
|
|
|
|
|
|
|
/* Voltage Select pins interpreted as per Table 4-5 of the std.
|
|
|
|
* Assuming we have the TPS2206, the socket is a "Low Voltage
|
|
|
|
* key, 3.3V and 5V available, no X.XV available".
|
|
|
|
*/
|
|
|
|
switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
|
|
|
|
{
|
|
|
|
case HD64465_PCCISR_PVS1:
|
|
|
|
printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
|
|
|
|
status = 0;
|
|
|
|
break;
|
|
|
|
case 0:
|
|
|
|
case HD64465_PCCISR_PVS2:
|
|
|
|
/* 3.3V */
|
|
|
|
status |= SS_3VCARD;
|
|
|
|
break;
|
|
|
|
case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
|
|
|
|
/* 5V */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO: SS_POWERON */
|
|
|
|
/* TODO: SS_STSCHG */
|
|
|
|
}
|
|
|
|
|
|
|
|
DPRINTK("hs_get_status(%d) = %x\n", sock, status);
|
|
|
|
|
|
|
|
*value = status;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
|
|
|
|
{
|
|
|
|
hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
|
|
|
|
u_long flags;
|
|
|
|
u_int changed;
|
|
|
|
unsigned short cscier;
|
|
|
|
|
|
|
|
DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
|
|
|
|
sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
|
|
|
|
|
|
|
|
local_irq_save(flags); /* Don't want interrupts happening here */
|
|
|
|
|
|
|
|
if (state->Vpp != sp->state.Vpp ||
|
|
|
|
state->Vcc != sp->state.Vcc) {
|
|
|
|
if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
|
|
|
|
local_irq_restore(flags);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* hd64465_io_debug = 1; */
|
|
|
|
/*
|
|
|
|
* Handle changes in the Card Status Change mask,
|
|
|
|
* by propagating to the CSCR register
|
|
|
|
*/
|
|
|
|
changed = sp->state.csc_mask ^ state->csc_mask;
|
|
|
|
cscier = hs_in(sp, CSCIER);
|
|
|
|
|
|
|
|
if (changed & SS_DETECT) {
|
|
|
|
if (state->csc_mask & SS_DETECT)
|
|
|
|
cscier |= HD64465_PCCCSCIER_PCDE;
|
|
|
|
else
|
|
|
|
cscier &= ~HD64465_PCCCSCIER_PCDE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_READY) {
|
|
|
|
if (state->csc_mask & SS_READY)
|
|
|
|
cscier |= HD64465_PCCCSCIER_PRE;
|
|
|
|
else
|
|
|
|
cscier &= ~HD64465_PCCCSCIER_PRE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_BATDEAD) {
|
|
|
|
if (state->csc_mask & SS_BATDEAD)
|
|
|
|
cscier |= HD64465_PCCCSCIER_PBDE;
|
|
|
|
else
|
|
|
|
cscier &= ~HD64465_PCCCSCIER_PBDE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_BATWARN) {
|
|
|
|
if (state->csc_mask & SS_BATWARN)
|
|
|
|
cscier |= HD64465_PCCCSCIER_PBWE;
|
|
|
|
else
|
|
|
|
cscier &= ~HD64465_PCCCSCIER_PBWE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_STSCHG) {
|
|
|
|
if (state->csc_mask & SS_STSCHG)
|
|
|
|
cscier |= HD64465_PCCCSCIER_PSCE;
|
|
|
|
else
|
|
|
|
cscier &= ~HD64465_PCCCSCIER_PSCE;
|
|
|
|
}
|
|
|
|
|
|
|
|
hs_out(sp, cscier, CSCIER);
|
|
|
|
|
|
|
|
if (sp->state.io_irq && !state->io_irq)
|
|
|
|
hs_unmap_irq(sp, sp->state.io_irq);
|
|
|
|
else if (!sp->state.io_irq && state->io_irq)
|
|
|
|
hs_map_irq(sp, state->io_irq);
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle changes in the flags field,
|
|
|
|
* by propagating to config registers.
|
|
|
|
*/
|
|
|
|
changed = sp->state.flags ^ state->flags;
|
|
|
|
|
|
|
|
if (changed & SS_IOCARD) {
|
|
|
|
DPRINTK("card type: %s\n",
|
|
|
|
(state->flags & SS_IOCARD ? "i/o" : "memory" ));
|
|
|
|
bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
|
|
|
|
state->flags & SS_IOCARD);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_RESET) {
|
|
|
|
DPRINTK("%s reset card\n",
|
|
|
|
(state->flags & SS_RESET ? "start" : "stop"));
|
|
|
|
bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
|
|
|
|
state->flags & SS_RESET);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (changed & SS_OUTPUT_ENA) {
|
|
|
|
DPRINTK("%sabling card output\n",
|
|
|
|
(state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
|
|
|
|
bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
|
|
|
|
state->flags & SS_OUTPUT_ENA);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO: SS_SPKR_ENA */
|
|
|
|
|
|
|
|
/* hd64465_io_debug = 0; */
|
|
|
|
sp->state = *state;
|
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
|
|
|
#if HD64465_DEBUG > 10
|
|
|
|
if (state->flags & SS_OUTPUT_ENA)
|
|
|
|
cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
|
|
|
|
{
|
|
|
|
hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
|
|
|
|
int map = io->map;
|
|
|
|
int sock = sp->number;
|
|
|
|
struct pccard_io_map *sio;
|
|
|
|
pgprot_t prot;
|
|
|
|
|
|
|
|
DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
|
|
|
|
sock, map, io->flags, io->speed, io->start, io->stop);
|
|
|
|
if (map >= MAX_IO_WIN)
|
|
|
|
return -EINVAL;
|
|
|
|
sio = &sp->io_maps[map];
|
|
|
|
|
|
|
|
/* check for null changes */
|
|
|
|
if (io->flags == sio->flags &&
|
|
|
|
io->start == sio->start &&
|
|
|
|
io->stop == sio->stop)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (io->flags & MAP_AUTOSZ)
|
|
|
|
prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
|
|
|
|
else if (io->flags & MAP_16BIT)
|
|
|
|
prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
|
|
|
|
else
|
|
|
|
prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
|
|
|
|
|
|
|
|
/* TODO: handle MAP_USE_WAIT */
|
|
|
|
if (io->flags & MAP_USE_WAIT)
|
|
|
|
printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
|
|
|
|
/* TODO: handle MAP_PREFETCH */
|
|
|
|
if (io->flags & MAP_PREFETCH)
|
|
|
|
printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
|
|
|
|
/* TODO: handle MAP_WRPROT */
|
|
|
|
if (io->flags & MAP_WRPROT)
|
|
|
|
printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
|
|
|
|
/* TODO: handle MAP_0WS */
|
|
|
|
if (io->flags & MAP_0WS)
|
|
|
|
printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
|
|
|
|
|
|
|
|
if (io->flags & MAP_ACTIVE) {
|
|
|
|
unsigned long pstart, psize, paddrbase;
|
|
|
|
|
|
|
|
paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
|
|
|
|
pstart = io->start & PAGE_MASK;
|
|
|
|
psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Change PTEs in only that portion of the mapping requested
|
|
|
|
* by the caller. This means that most of the time, most of
|
|
|
|
* the PTEs in the io_vma will be unmapped and only the bottom
|
|
|
|
* page will be mapped. But the code allows for weird cards
|
|
|
|
* that might want IO ports > 4K.
|
|
|
|
*/
|
|
|
|
sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Change the mapping used by inb() outb() etc
|
|
|
|
*/
|
|
|
|
hd64465_port_map(io->start,
|
|
|
|
io->stop - io->start + 1,
|
|
|
|
(unsigned long)sp->io_base + io->start, 0);
|
|
|
|
} else {
|
|
|
|
hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
|
|
|
|
p3_iounmap(sp->io_base);
|
|
|
|
}
|
|
|
|
|
|
|
|
*sio = *io;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
|
|
|
|
{
|
|
|
|
hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
|
|
|
|
struct pccard_mem_map *smem;
|
|
|
|
int map = mem->map;
|
|
|
|
unsigned long paddr;
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
|
|
|
|
sock, map, mem->flags, mem->card_start);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (map >= MAX_WIN)
|
|
|
|
return -EINVAL;
|
|
|
|
smem = &sp->mem_maps[map];
|
|
|
|
|
|
|
|
paddr = sp->mem_base; /* base of Attribute mapping */
|
|
|
|
if (!(mem->flags & MAP_ATTRIB))
|
|
|
|
paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
|
|
|
|
paddr += mem->card_start;
|
|
|
|
|
|
|
|
/* Because we specified SS_CAP_STATIC_MAP, we are obliged
|
|
|
|
* at this time to report the system address corresponding
|
|
|
|
* to the card address requested. This is how Socket Services
|
|
|
|
* queries our fixed mapping. I wish this fact had been
|
|
|
|
* documented - Greg Banks.
|
|
|
|
*/
|
|
|
|
mem->static_start = paddr;
|
|
|
|
|
|
|
|
*smem = *mem;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO: do we need to use the MMU to access Common memory ??? */
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function is registered with the HD64465 glue code to do a
|
|
|
|
* secondary demux step on the PCMCIA interrupts. It handles
|
|
|
|
* mapping the IREQ request from the card to a standard Linux
|
|
|
|
* IRQ, as requested by SocketServices.
|
|
|
|
*/
|
|
|
|
static int hs_irq_demux(int irq, void *dev)
|
|
|
|
{
|
|
|
|
hs_socket_t *sp = (hs_socket_t *)dev;
|
|
|
|
u_int cscr;
|
|
|
|
|
|
|
|
DPRINTK("hs_irq_demux(irq=%d)\n", irq);
|
|
|
|
|
|
|
|
if (sp->state.io_irq &&
|
|
|
|
(cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PIREQ;
|
|
|
|
hs_out(sp, cscr, CSCR);
|
|
|
|
return sp->state.io_irq;
|
|
|
|
}
|
|
|
|
|
|
|
|
return irq;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Interrupt handling routine.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static irqreturn_t hs_interrupt(int irq, void *dev, struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
hs_socket_t *sp = (hs_socket_t *)dev;
|
|
|
|
u_int events = 0;
|
|
|
|
u_int cscr;
|
|
|
|
|
|
|
|
|
|
|
|
cscr = hs_in(sp, CSCR);
|
|
|
|
|
|
|
|
DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
|
|
|
|
|
|
|
|
/* check for bus-related changes to be reported to Socket Services */
|
|
|
|
if (cscr & HD64465_PCCCSCR_PCDC) {
|
|
|
|
/* double-check for a 16-bit card, as we don't support CardBus */
|
|
|
|
if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
|
|
|
|
printk(KERN_NOTICE MODNAME
|
|
|
|
": socket %d, card not a supported card type or not inserted correctly\n",
|
|
|
|
sp->number);
|
|
|
|
/* Don't do the rest unless a card is present */
|
|
|
|
cscr &= ~(HD64465_PCCCSCR_PCDC|
|
|
|
|
HD64465_PCCCSCR_PRC|
|
|
|
|
HD64465_PCCCSCR_PBW|
|
|
|
|
HD64465_PCCCSCR_PBD|
|
|
|
|
HD64465_PCCCSCR_PSC);
|
|
|
|
} else {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PCDC;
|
|
|
|
events |= SS_DETECT; /* card insertion or removal */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (cscr & HD64465_PCCCSCR_PRC) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PRC;
|
|
|
|
events |= SS_READY; /* ready signal changed */
|
|
|
|
}
|
|
|
|
if (cscr & HD64465_PCCCSCR_PBW) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PSC;
|
|
|
|
events |= SS_BATWARN; /* battery warning */
|
|
|
|
}
|
|
|
|
if (cscr & HD64465_PCCCSCR_PBD) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PSC;
|
|
|
|
events |= SS_BATDEAD; /* battery dead */
|
|
|
|
}
|
|
|
|
if (cscr & HD64465_PCCCSCR_PSC) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PSC;
|
|
|
|
events |= SS_STSCHG; /* STSCHG (status changed) signal */
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cscr & HD64465_PCCCSCR_PIREQ) {
|
|
|
|
cscr &= ~HD64465_PCCCSCR_PIREQ;
|
|
|
|
|
|
|
|
/* This should have been dealt with during irq demux */
|
|
|
|
printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
hs_out(sp, cscr, CSCR);
|
|
|
|
|
|
|
|
if (events)
|
|
|
|
pcmcia_parse_events(&sp->socket, events);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
|
|
|
|
static struct pccard_operations hs_operations = {
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.init = hs_init,
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.get_status = hs_get_status,
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.set_socket = hs_set_socket,
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.set_io_map = hs_set_io_map,
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.set_mem_map = hs_set_mem_map,
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};
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static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
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unsigned int ctrl_base)
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{
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unsigned short v;
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int i, err;
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memset(sp, 0, sizeof(*sp));
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sp->irq = irq;
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sp->mem_base = mem_base;
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sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
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sp->ctrl_base = ctrl_base;
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for (i=0 ; i<MAX_IO_WIN ; i++)
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sp->io_maps[i].map = i;
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for (i=0 ; i<MAX_WIN ; i++)
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sp->mem_maps[i].map = i;
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hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
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if ((err = request_irq(sp->irq, hs_interrupt, SA_INTERRUPT, MODNAME, sp)) < 0)
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return err;
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if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
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sp->mem_base = 0;
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return -ENOMEM;
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}
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/* According to section 3.2 of the PCMCIA standard, low-voltage
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* capable cards must implement cold insertion, i.e. Vpp and
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* Vcc set to 0 before card is inserted.
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*/
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/*hs_set_voltages(sp, 0, 0);*/
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/* hi-Z the outputs to the card and set 16MB map mode */
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v = hs_in(sp, GCR);
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v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
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hs_out(sp, v, GCR);
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v = hs_in(sp, GCR);
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v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
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hs_out(sp, v, GCR);
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v = hs_in(sp, GCR);
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v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
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hs_out(sp, v, GCR);
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v = hs_in(sp, GCR);
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|
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/* lowest 16MB of Common */
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v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
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hs_out(sp, v, GCR);
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hs_reset_socket(sp, 1);
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printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
|
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|
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i, sp->mem_base, sp->irq);
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return 0;
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}
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static void hs_exit_socket(hs_socket_t *sp)
|
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|
{
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|
unsigned short cscier, gcr;
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|
|
unsigned long flags;
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|
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|
|
local_irq_save(flags);
|
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|
|
/* turn off interrupts in hardware */
|
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|
|
cscier = hs_in(sp, CSCIER);
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|
cscier = (cscier & IER_MASK) | IER_OFF;
|
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|
|
hs_out(sp, cscier, CSCIER);
|
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|
|
|
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|
|
/* hi-Z the outputs to the card */
|
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|
|
gcr = hs_in(sp, GCR);
|
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|
|
gcr &= HD64465_PCCGCR_PDRV;
|
|
|
|
hs_out(sp, gcr, GCR);
|
|
|
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|
|
/* power the card down */
|
|
|
|
hs_set_voltages(sp, 0, 0);
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|
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|
|
if (sp->mem_base != 0)
|
|
|
|
release_mem_region(sp->mem_base, sp->mem_length);
|
|
|
|
if (sp->irq != 0) {
|
|
|
|
free_irq(sp->irq, hs_interrupt);
|
|
|
|
hd64465_unregister_irq_demux(sp->irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct device_driver hd64465_driver = {
|
|
|
|
.name = "hd64465-pcmcia",
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|
|
|
.bus = &platform_bus_type,
|
2005-10-28 10:52:56 -06:00
|
|
|
.suspend = pcmcia_socket_dev_suspend,
|
|
|
|
.resume = pcmcia_socket_dev_resume,
|
2005-04-16 16:20:36 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device hd64465_device = {
|
|
|
|
.name = "hd64465-pcmcia",
|
|
|
|
.id = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init init_hs(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
unsigned short v;
|
|
|
|
|
|
|
|
/* hd64465_io_debug = 1; */
|
|
|
|
if (driver_register(&hd64465_driver))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* Wake both sockets out of STANDBY mode */
|
|
|
|
/* TODO: wait 15ms */
|
|
|
|
v = inw(HD64465_REG_SMSCR);
|
|
|
|
v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
|
|
|
|
outw(v, HD64465_REG_SMSCR);
|
|
|
|
|
|
|
|
/* keep power controller out of shutdown mode */
|
|
|
|
v = inb(HD64465_REG_PCC0SCR);
|
|
|
|
v |= HD64465_PCCSCR_SHDN;
|
|
|
|
outb(v, HD64465_REG_PCC0SCR);
|
|
|
|
|
|
|
|
/* use serial (TPS2206) power controller */
|
|
|
|
v = inb(HD64465_REG_PCC0CSCR);
|
|
|
|
v |= HD64465_PCCCSCR_PSWSEL;
|
|
|
|
outb(v, HD64465_REG_PCC0CSCR);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Setup hs_sockets[] structures and request system resources.
|
|
|
|
* TODO: on memory allocation failure, power down the socket
|
|
|
|
* before quitting.
|
|
|
|
*/
|
|
|
|
for (i=0; i<HS_MAX_SOCKETS; i++) {
|
|
|
|
hs_set_voltages(&hs_sockets[i], 0, 0);
|
|
|
|
|
|
|
|
hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
|
|
|
|
hs_sockets[i].socket.resource_ops = &pccard_static_ops;
|
|
|
|
hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
|
|
|
|
hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
|
|
|
|
|
|
|
|
hs_sockets[i].socket.owner = THIS_MODULE;
|
|
|
|
hs_sockets[i].socket.ss_entry = &hs_operations;
|
|
|
|
}
|
|
|
|
|
|
|
|
i = hs_init_socket(&hs_sockets[0],
|
|
|
|
HD64465_IRQ_PCMCIA0,
|
|
|
|
HD64465_PCC0_BASE,
|
|
|
|
HD64465_REG_PCC0ISR);
|
|
|
|
if (i < 0) {
|
|
|
|
unregister_driver(&hd64465_driver);
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
i = hs_init_socket(&hs_sockets[1],
|
|
|
|
HD64465_IRQ_PCMCIA1,
|
|
|
|
HD64465_PCC1_BASE,
|
|
|
|
HD64465_REG_PCC1ISR);
|
|
|
|
if (i < 0) {
|
|
|
|
unregister_driver(&hd64465_driver);
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* hd64465_io_debug = 0; */
|
|
|
|
|
|
|
|
platform_device_register(&hd64465_device);
|
|
|
|
|
|
|
|
for (i=0; i<HS_MAX_SOCKETS; i++) {
|
|
|
|
unsigned int ret;
|
|
|
|
hs_sockets[i].socket.dev.dev = &hd64465_device.dev;
|
|
|
|
hs_sockets[i].number = i;
|
|
|
|
ret = pcmcia_register_socket(&hs_sockets[i].socket);
|
|
|
|
if (ret && i)
|
|
|
|
pcmcia_unregister_socket(&hs_sockets[0].socket);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit exit_hs(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
|
|
|
|
pcmcia_unregister_socket(&hs_sockets[i].socket);
|
|
|
|
hs_exit_socket(&hs_sockets[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_device_unregister(&hd64465_device);
|
|
|
|
unregister_driver(&hd64465_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(init_hs);
|
|
|
|
module_exit(exit_hs);
|
|
|
|
|
|
|
|
/*============================================================*/
|
|
|
|
/*END*/
|